coreboot April 2010

coreboot@coreboot.org

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402 discussions

[PATCH]Move cpu includes to cpus
by Patrick Georgi 12 Apr '10

12 Apr '10

Hi, attached patch moves the CPU specific includes from src/arch/i386/Makefile.inc to the respective CPU directories. One exception is the tyan/s2735 rule, as this is a weird situation: CAR code for exactly one board. As soon as sibling boards are identified and CAR enabled, it would make sense to move that include out as well. For now, for the increased visibility (and because I'm a bit puzzled where a good location for that file would be), I left it there. The cpu/x86/car/cache_as_ram.lds is useless, so deleting it is also part of this change (not tracked in this patch) Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>

3 5

[PATCH] cleanup model 6ex CAR
by Stefan Reinauer 12 Apr '10

12 Apr '10

See patch cpu/intel/model_6ex/cache_as_ram.inc | 83 ++++++++++++++++++- cpu/intel/model_6ex/cache_as_ram_disable.c | 89 -------------------- cpu/intel/model_6ex/cache_as_ram_post.c | 125 ----------------------------- mainboard/kontron/986lcd-m/romstage.c | 4 mainboard/roda/rk886ex/romstage.c | 3 5 files changed, 82 insertions(+), 222 deletions(-) -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

2 1

[commit] r5411 - in trunk/src: arch/i386 cpu/amd/model_gx1 cpu/amd/model_lx cpu/amd/socket_754 cpu/amd/socket_939 cpu/amd/socket_940 cpu/amd/socket_AM2 cpu/amd/socket_AM2r2 cpu/amd/socket_F cpu/amd...
by repository service 12 Apr '10

12 Apr '10

Author: oxygene Date: Mon Apr 12 17:28:34 2010 New Revision: 5411 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5411 Log: Move the CPU specific includes from src/arch/i386/Makefile.inc to the respective CPU directories. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Deleted: trunk/src/cpu/x86/car/cache_as_ram.lds Modified: trunk/src/arch/i386/Makefile.inc trunk/src/cpu/amd/model_gx1/Makefile.inc trunk/src/cpu/amd/model_lx/Makefile.inc trunk/src/cpu/amd/socket_754/Makefile.inc trunk/src/cpu/amd/socket_939/Makefile.inc trunk/src/cpu/amd/socket_940/Makefile.inc trunk/src/cpu/amd/socket_AM2/Makefile.inc trunk/src/cpu/amd/socket_AM2r2/Makefile.inc trunk/src/cpu/amd/socket_F/Makefile.inc trunk/src/cpu/amd/socket_F_1207/Makefile.inc trunk/src/cpu/amd/socket_S1G1/Makefile.inc trunk/src/cpu/intel/bga956/Makefile.inc trunk/src/cpu/intel/model_106cx/Makefile.inc trunk/src/cpu/intel/model_6ex/Makefile.inc trunk/src/cpu/intel/socket_mFCBGA479/Makefile.inc trunk/src/cpu/via/model_c7/Makefile.inc Modified: trunk/src/arch/i386/Makefile.inc ============================================================================== --- trunk/src/arch/i386/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/arch/i386/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -117,61 +117,17 @@ endif crt0s += $(src)/cpu/x86/fpu_enable.inc -ifeq ($(CONFIG_CPU_AMD_GX1),y) -crt0s += $(src)/cpu/amd/model_gx1/cpu_setup.inc -crt0s += $(src)/cpu/amd/model_gx1/gx_setup.inc -endif ifeq ($(CONFIG_SSE),y) crt0s += $(src)/cpu/x86/sse_enable.inc endif -ifeq ($(CONFIG_CPU_AMD_LX),y) -crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc -endif -ifeq ($(CONFIG_CPU_AMD_SOCKET_F),y) -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -endif -ifeq ($(CONFIG_CPU_AMD_SOCKET_F_1207),y) -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -endif -ifeq ($(CONFIG_CPU_AMD_SOCKET_AM2R2),y) -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -endif -ifeq ($(CONFIG_CPU_AMD_SOCKET_AM2),y) -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -endif -ifeq ($(CONFIG_CPU_AMD_SOCKET_S1G1),y) -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -endif -ifeq ($(CONFIG_CPU_AMD_SOCKET_754),y) -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -endif -ifeq ($(CONFIG_CPU_AMD_SOCKET_939),y) -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -endif -ifeq ($(CONFIG_CPU_AMD_SOCKET_940),y) -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -endif -ifeq ($(CONFIG_CPU_INTEL_ATOM_230),y) -crt0s += $(src)/cpu/intel/model_106cx/cache_as_ram.inc -endif -ifeq ($(CONFIG_CPU_INTEL_CORE),y) -crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc -endif -# Use Intel Core (not Core 2) code for CAR init, any CPU might be used. -ifeq ($(CONFIG_CPU_INTEL_SOCKET_BGA956),y) -crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc -endif -ifeq ($(CONFIG_CPU_INTEL_SOCKET_MFCBGA479),y) -crt0s += $(src)/cpu/x86/car/cache_as_ram.inc -endif -ifeq ($(CONFIG_CPU_VIA_C7),y) -crt0s += $(src)/cpu/via/car/cache_as_ram.inc -endif -# who else could use this? +crt0s += $(cpu_incs) + +# +# FIXME move to CPU_INTEL_SOCKET_MPGA604 +# ifeq ($(CONFIG_BOARD_TYAN_S2735),y) crt0s += $(src)/cpu/x86/car/cache_as_ram.inc -ldscripts += $(src)/cpu/x86/car/cache_as_ram.lds endif ifeq ($(CONFIG_LLSHELL),y) Modified: trunk/src/cpu/amd/model_gx1/Makefile.inc ============================================================================== --- trunk/src/cpu/amd/model_gx1/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/amd/model_gx1/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -23,3 +23,6 @@ subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm driver-y += model_gx1_init.o + +cpu_incs += $(src)/cpu/amd/model_gx1/cpu_setup.inc +cpu_incs += $(src)/cpu/amd/model_gx1/gx_setup.inc Modified: trunk/src/cpu/amd/model_lx/Makefile.inc ============================================================================== --- trunk/src/cpu/amd/model_lx/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/amd/model_lx/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -6,3 +6,5 @@ driver-y += model_lx_init.o obj-y += cpubug.o obj-y += vsmsetup.o + +cpu_incs += $(src)/cpu/amd/model_lx/cache_as_ram.inc Modified: trunk/src/cpu/amd/socket_754/Makefile.inc ============================================================================== --- trunk/src/cpu/amd/socket_754/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/amd/socket_754/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -8,3 +8,5 @@ subdirs-y += ../../x86/cache subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/pae + +cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc Modified: trunk/src/cpu/amd/socket_939/Makefile.inc ============================================================================== --- trunk/src/cpu/amd/socket_939/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/amd/socket_939/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -8,3 +8,5 @@ subdirs-y += ../../x86/cache subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/pae + +cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc Modified: trunk/src/cpu/amd/socket_940/Makefile.inc ============================================================================== --- trunk/src/cpu/amd/socket_940/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/amd/socket_940/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -8,3 +8,5 @@ subdirs-y += ../../x86/cache subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/pae + +cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc Modified: trunk/src/cpu/amd/socket_AM2/Makefile.inc ============================================================================== --- trunk/src/cpu/amd/socket_AM2/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/amd/socket_AM2/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -9,3 +9,5 @@ subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/pae subdirs-y += ../../x86/smm + +cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc Modified: trunk/src/cpu/amd/socket_AM2r2/Makefile.inc ============================================================================== --- trunk/src/cpu/amd/socket_AM2r2/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/amd/socket_AM2r2/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -9,3 +9,5 @@ subdirs-y += ../../x86/pae subdirs-y += ../../x86/smm subdirs-y += ../../x86/mtrr + +cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc Modified: trunk/src/cpu/amd/socket_F/Makefile.inc ============================================================================== --- trunk/src/cpu/amd/socket_F/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/amd/socket_F/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -9,3 +9,5 @@ subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/pae subdirs-y += ../../x86/smm + +cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc Modified: trunk/src/cpu/amd/socket_F_1207/Makefile.inc ============================================================================== --- trunk/src/cpu/amd/socket_F_1207/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/amd/socket_F_1207/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -9,3 +9,5 @@ subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/pae subdirs-y += ../../x86/smm + +cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc Modified: trunk/src/cpu/amd/socket_S1G1/Makefile.inc ============================================================================== --- trunk/src/cpu/amd/socket_S1G1/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/amd/socket_S1G1/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -10,3 +10,4 @@ subdirs-y += ../../x86/smm subdirs-y += ../../x86/mtrr +cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc Modified: trunk/src/cpu/intel/bga956/Makefile.inc ============================================================================== --- trunk/src/cpu/intel/bga956/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/intel/bga956/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -8,3 +8,5 @@ subdirs-y += ../microcode subdirs-y += ../hyperthreading +# Use Intel Core (not Core 2) code for CAR init, any CPU might be used. +cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc Modified: trunk/src/cpu/intel/model_106cx/Makefile.inc ============================================================================== --- trunk/src/cpu/intel/model_106cx/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/intel/model_106cx/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -1 +1,3 @@ driver-y += model_106cx_init.o + +cpu_incs += $(src)/cpu/intel/model_106cx/cache_as_ram.inc Modified: trunk/src/cpu/intel/model_6ex/Makefile.inc ============================================================================== --- trunk/src/cpu/intel/model_6ex/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/intel/model_6ex/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -1 +1,3 @@ driver-y += model_6ex_init.o + +cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc Modified: trunk/src/cpu/intel/socket_mFCBGA479/Makefile.inc ============================================================================== --- trunk/src/cpu/intel/socket_mFCBGA479/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/intel/socket_mFCBGA479/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -6,3 +6,5 @@ subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm subdirs-y += ../microcode + +cpu_incs += $(src)/cpu/x86/car/cache_as_ram.inc Modified: trunk/src/cpu/via/model_c7/Makefile.inc ============================================================================== --- trunk/src/cpu/via/model_c7/Makefile.inc Mon Apr 12 12:22:20 2010 (r5410) +++ trunk/src/cpu/via/model_c7/Makefile.inc Mon Apr 12 17:28:34 2010 (r5411) @@ -6,3 +6,5 @@ subdirs-y += ../../intel/microcode driver-y += model_c7_init.o + +cpu_incs += $(src)/cpu/via/car/cache_as_ram.inc

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[commit] r5330 - in trunk: . src/arch/i386
by repository service 12 Apr '10

12 Apr '10

Author: stepan Date: Tue Mar 30 22:32:01 2010 New Revision: 5330 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5330 Log: make crt0s and ldscripts evaluate late, so the chipset_* variables are there at the time they are finally used. This should solve the Problem Myles was seeing earlier today. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/Makefile trunk/src/arch/i386/Makefile.inc Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Tue Mar 30 17:49:14 2010 (r5329) +++ trunk/Makefile Tue Mar 30 22:32:01 2010 (r5330) @@ -165,8 +165,6 @@ initobjs:= drivers:= smmobjs:= -crt0s:= -ldscripts:= types:=obj initobj driver smmobj # Clean -y variables, include Makefile.inc @@ -263,7 +261,8 @@ @echo LIBGCC_FILE_NAME=$(LIBGCC_FILE_NAME) printcrt0s: - @echo $(patsubst $(top)/%,%,$(crt0s)) + @echo crt0s=$(crt0s) + @echo ldscripts=$(ldscripts) OBJS := $(patsubst %,$(obj)/%,$(TARGETS-y)) INCLUDES := -Isrc -Isrc/include -I$(obj) -Isrc/arch/$(ARCHDIR-y)/include Modified: trunk/src/arch/i386/Makefile.inc ============================================================================== --- trunk/src/arch/i386/Makefile.inc Tue Mar 30 17:49:14 2010 (r5329) +++ trunk/src/arch/i386/Makefile.inc Tue Mar 30 22:32:01 2010 (r5330) @@ -83,8 +83,8 @@ ####################################################################### # done -crt0s := -ldscripts := +crt0s = +ldscripts = ldscripts += $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ifeq ($(CONFIG_BIG_BOOTBLOCK),y) crt0s += $(src)/cpu/x86/16bit/entry16.inc

5 11

[commit] r5410 - trunk/src/arch/i386
by repository service 12 Apr '10

12 Apr '10

Author: oxygene Date: Mon Apr 12 12:22:20 2010 New Revision: 5410 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5410 Log: Enable lazy evaluation of incs/lds for tiny bootblock, too. Necessary for romstraps Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Modified: trunk/src/arch/i386/Makefile.bootblock.inc Modified: trunk/src/arch/i386/Makefile.bootblock.inc ============================================================================== --- trunk/src/arch/i386/Makefile.bootblock.inc Mon Apr 12 11:50:53 2010 (r5409) +++ trunk/src/arch/i386/Makefile.bootblock.inc Mon Apr 12 12:22:20 2010 (r5410) @@ -23,13 +23,13 @@ @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" $(OBJCOPY) -O binary $< $@ -bootblock_lds := $(src)/arch/i386/init/ldscript_failover.lb +bootblock_lds = $(src)/arch/i386/init/ldscript_failover.lb bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds bootblock_lds += $(src)/arch/i386/lib/id.lds bootblock_lds += $(chipset_bootblock_lds) -bootblock_inc := $(src)/arch/i386/init/bootblock_prologue.c +bootblock_inc = $(src)/arch/i386/init/bootblock_prologue.c bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc

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[commit] r5409 - in trunk/src: . cpu/via/car cpu/x86 mainboard/via/vt8454c
by repository service 12 Apr '10

12 Apr '10

Author: oxygene Date: Mon Apr 12 11:50:53 2010 New Revision: 5409 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5409 Log: - move the XIP_ROM_* flags to src/cpu/x86/Kconfig exclusively - set them to span the last 64k, instead of the last 128k by default - fixes via CAR for tiny bootblock - enabled tiny bootblock for via/vt8454c Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/Kconfig trunk/src/cpu/via/car/cache_as_ram.inc trunk/src/cpu/x86/Kconfig trunk/src/mainboard/via/vt8454c/Kconfig Modified: trunk/src/Kconfig ============================================================================== --- trunk/src/Kconfig Sun Apr 11 22:04:50 2010 (r5408) +++ trunk/src/Kconfig Mon Apr 12 11:50:53 2010 (r5409) @@ -116,14 +116,6 @@ int default 36 -config XIP_ROM_BASE - hex - default 0xfffe0000 - -config XIP_ROM_SIZE - hex - default 0x20000 - config LOGICAL_CPUS bool default y Modified: trunk/src/cpu/via/car/cache_as_ram.inc ============================================================================== --- trunk/src/cpu/via/car/cache_as_ram.inc Sun Apr 11 22:04:50 2010 (r5408) +++ trunk/src/cpu/via/car/cache_as_ram.inc Mon Apr 12 11:50:53 2010 (r5409) @@ -139,7 +139,7 @@ xorl $0x5c5c5c5c,%eax rep stosl - movl CONFIG_XIP_ROM_BASE, %esi + movl REAL_XIP_ROM_BASE, %esi movl %esi, %edi movl $(CONFIG_XIP_ROM_SIZE>>2), %ecx rep lodsl @@ -241,10 +241,10 @@ movl $((~(( 0 + 0x40000) - 1)) | 0x800), %eax wrmsr - /* cache CONFIG_XIP_ROM_BASE-SIZE to speedup coreboot code */ + /* cache XIP_ROM_BASE-SIZE to speedup coreboot code */ movl $0x206, %ecx xorl %edx, %edx - movl $CONFIG_XIP_ROM_BASE,%eax + movl $REAL_XIP_ROM_BASE,%eax orl $(0 | 6), %eax wrmsr Modified: trunk/src/cpu/x86/Kconfig ============================================================================== --- trunk/src/cpu/x86/Kconfig Sun Apr 11 22:04:50 2010 (r5408) +++ trunk/src/cpu/x86/Kconfig Mon Apr 12 11:50:53 2010 (r5409) @@ -25,8 +25,8 @@ config XIP_ROM_BASE hex - default 0xfffe0000 + default 0xffff0000 config XIP_ROM_SIZE hex - default 0x20000 + default 0x10000 Modified: trunk/src/mainboard/via/vt8454c/Kconfig ============================================================================== --- trunk/src/mainboard/via/vt8454c/Kconfig Sun Apr 11 22:04:50 2010 (r5408) +++ trunk/src/mainboard/via/vt8454c/Kconfig Mon Apr 12 11:50:53 2010 (r5409) @@ -12,6 +12,7 @@ select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_512 select USE_DCACHE_RAM + select TINY_BOOTBLOCK config MAINBOARD_DIR string

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[PATCH]CAR and Tiny bootblock for via/vt8454c (and fixes that help other via c7 based systems)
by Patrick Georgi 12 Apr '10

12 Apr '10

Hi, attached patch does: - move the XIP_ROM_* flags to src/cpu/x86/Kconfig exclusively - set them to span the last 64k, instead of the last 128k by default - fixes via CAR for tiny bootblock - enabled tiny bootblock for via/vt8454c Other C7 based boards should be simple to adapt, too. They will however require some refactoring if ROM mappings must be configured. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>

3 2

Asus M2V-TVM....
by Chi Min Wang 12 Apr '10

12 Apr '10

3 4

Re: [coreboot] coreboot Digest, Vol 62, Issue 47
by Keith Hui 11 Apr '10

11 Apr '10

> > This patch adds preliminary and untested ACPI support to Intel 440BX/82371EB > (e.g. ASUS P2B and its variants/similar boards). > It focuses on an/the ASUS P2B which comes with three ram slots, hence the > change to src/northbridge/intel/i440bx/raminit.c. > > Some parts are based on code from other boards and need some work. > It is also based on a patch [1] from Keith Hui: in the attached patch parts > of src/southbridge/intel/i82371eb/i82371.h are and > src/southbridge/intel/i82371eb/i82371eb_smbus.c is (C) Keith Hui. > > Todo: > - create PRT objects > - finish/fix FADT > - finish all other ACPI tables (RSDT, RSDP, DSDT etcetera) > - PIRQ routing > - standby/suspend > - ? > > Not Signing-off-by at this point. > > Idwer > > > > [1] http://www.coreboot.org/pipermail/coreboot/2010-March/056996.html >

2 2

[RFC] ACPI for ASUS P2B (Intel 440BX/82371EB)
by Idwer Vollering 11 Apr '10

11 Apr '10

This patch adds preliminary and untested ACPI support to Intel 440BX/82371EB (e.g. ASUS P2B and its variants/similar boards). It focuses on an/the ASUS P2B which comes with three ram slots, hence the change to src/northbridge/intel/i440bx/raminit.c. Some parts are based on code from other boards and need some work. It is also based on a patch [1] from Keith Hui: in the attached patch parts of src/southbridge/intel/i82371eb/i82371.h are and src/southbridge/intel/i82371eb/i82371eb_smbus.c is (C) Keith Hui. Todo: - create PRT objects - finish/fix FADT - finish all other ACPI tables (RSDT, RSDP, DSDT etcetera) - PIRQ routing - standby/suspend - ? Not Signing-off-by at this point. Idwer [1] http://www.coreboot.org/pipermail/coreboot/2010-March/056996.html

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coreboot April 2010