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Hi @ all,
is there a Coroboot for the Lenovo T410 Laptop?
Greetings
Alex Veek
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All,
After reviewing some of the comments on the ASUS KGPE-D16 being
essentially too large of a system and too expensive for many people, and
the fact that modern, blob-free systems are not really available in the
mid-range arena, Raptor Engineering would like to offer to create a
native initalization blob-free port for the ASUS KCMA-D8, which is
essentially the KGPE-D16's ATX-compatible "little brother".
We would be asking $15,000 for the port, including upstreaming to the
master coreboot tree. We already have extensive experience with these
Family 10h/15h boards, and would be able to create a port of similar
quality to the existing KGPE-D16 source in terms of both code quality
and overall functionality.
If this is something you might be interested in please let me know. We
are able to accept multiple payments from various sources for the same
project (within limits), so if this is something your local Linux groups
or similar might be interested in we should be able to keep the cost on
any one individual or organization to a reasonable level.
Thank you for your consideration,
- --
Timothy Pearson
Raptor Engineering
+1 (415) 727-8645 (direct line)
+1 (512) 690-0200 (switchboard)
http://www.raptorengineeringinc.com
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On 01/10/2016 10:23 AM, ron minnich wrote:
> One thing I think you'd enjoy doing is building the qemu target, setting
> up qemu with gdb, and just watching what happens, instruction by
> instruction, as the system boots.
One exercise I liked doing was to rewrite the entire boot flow, from
reset vector to protected mode entry. Tested on qemu, put it on
hardware, nothing burned.
Alex
> ron
>
> On Sun, Jan 10, 2016 at 3:28 AM Rafael Machado
> <rafaelrodrigues.machado(a)gmail.com
> <mailto:rafaelrodrigues.machado@gmail.com>> wrote:
>
> Hi Peter and Rudolf.
> Thanks for the answers and tips. They are realy helpfull !
> I'll take a look.
>
> Rafael R. Machado
>
>
> Em Sáb, 9 de jan de 2016 17:19, Rudolf Marek <r.marek(a)assembler.cz
> <mailto:r.marek@assembler.cz>> escreveu:
>
> Hi,
>
> I guess your question is more general than the coreboot related
> right?
>
> If you have a firmware image dump of the flash (not the file you
> download from
> board vendor) then yes, first location to be executed is the
> instruction located
> 16 bytes before end of the image.
>
> In coreboot see in build/ bootblock_inc.S which also has
> reset16.inc and
> entry16.inc which is a real start. Consult the Intel or AMD
> manual to see the
> CPU state after reset. The CPU starts in real mode, but CS base
> is shifted to
> last 64KB before end of 4GB address space. In general your CPU
> starts in
> compatible mode with 8086 manufactured in 1978.
>
> Thanks
> Rudolf
>
> --
> coreboot mailing list: coreboot(a)coreboot.org
> <mailto:coreboot@coreboot.org>
> http://www.coreboot.org/mailman/listinfo/coreboot
>
>
>
Hello everyone,
I am currently a computing student at the University of Abertay in
Scotland and I would like to take part in this year GSOC.
The proposal that I want to submit concerns the coreboot panic room idea
since it looks like something that could really benefit the project as a
whole and also because it seems like a really interesting technical
challenge.
I already digged through the blog and the mail exchanges of the previous
developer working on this, Tadas Slotkus, and took a look at the patches
that he wrote so I already have a general understanding of their aim.
I would like to concentrate most of my efforts towards improving and
upstreaming the previous efforts, implementing a way to easily access
the recovery mode when needed and further the integration between
coreboot, serialICE and flashrom for this use-case.
Regarding the existing patches I would like to know if they would need
to stay romc-compatible or should the scope be limited to CAR boards?
Any suggestions on how to tackle this project or GSOC in general?
Thanks in advance.
Hi Iru,
we aren't still sure which boards use Intel Boot Guard and which doesn't use it. But we expect most board use it,
because it's "recommended" by intel - as we dont recommend it.
Also there isn't yet a test script for Intel Boot Guard.
Can you post a link to that forum post?
I would like to look into a x240 flash image. If you have such board it would be nice
if you can send me a copy of the flash image via private mail.
Cheers,
lynxis
--
Alexander Couzens
mail: lynxis(a)fe80.eu
jabber: lynxis(a)jabber.ccc.de
mobile: +4915123277221
> We're looking at cleaning up gerrit, so we're planning on abandoning
> some older commits. To keep from overwhelming people, we're going to
> do it in stages. Right now we're looking at abandoning all commits
> that haven't been updated in 18 Months. This is around 90 commits.
nice you're doing this.
--
Alexander Couzens
mail: lynxis(a)fe80.eu
jabber: lynxis(a)fe80.eu
mobile: +4915123277221
gpg: 390D CF78 8BF9 AA50 4F8F F1E2 C29E 9DA6 A0DF 8604
Recently, we have received a number of questions about where to go for
professional coreboot consulting services.
To address this:
We are proud to announce the coreboot consultant licensing program and
consulting page.
https://www.coreboot.org/consulting.html
The consulting page lists companies that supply professional coreboot
consulting services.
The coreboot license program aims to help guarantee quality and commitment
of the coreboot consultants. The coreboot project will address any issues
with our licensees, and will be available work with the consultants and
their customers when coreboot related issues arise.
We currently have five agreements in place, and are in communication with
other companies about joining the program.
For more information on how to become a coreboot licensed consultant and
get your company listed, please contact martin(a)coreboot.org
Martin Roth
Hi folks,
Paul and I came up with the idea of doing a coreboot community meeting
every 2 weeks. The plan for this meeting is to sync the development
state between us and provide some sort of better communication and
organization. Therefore we will provide an initial agenda which can
change and be improved by all.
The meeting will be announced two weeks before the next via coreboot ml
so that you have time to do your planning. The meeting room is provided
by an open source WebRTC implementation called jitsi meet. Access link:
https://meet.jit.si/Apyy6SbOxSxJXnNtcv6hI6Stuzdfu5NTONYI8qWpMrq38y9y9EOPMIq…
You can use it without an account but you need a modern firefox, chrome
or chromium to use it. There is also a extension for jitsi meet screen
sharing which can be easily installed via browser ext. store.
During the meeting it would be nice if only the speaker activates his
cam to save bandwidth.
Every meeting will be documented by a report. The report is published
after the meeting via a Google link
on the mailing list in the next meeting announcement.
The only rule in this meeting is to be kind to each other.
### So no flamewar, offence or individual criticism ! ###
1st Coreboot Community Meeting
====================================================
Date: 04.04.2016
San Francisco time: Begin at 09.00 a.m.
Berlin time: Begin at 17.00 p.m.
Meeting time: Max. 1 hour.
Who is invited: Everyone who is or intends to
become developer !
Agenda:
-----------
1) Introduction
-> Everyone introduces themselves (Only for new developers).
Every developer gives a short overview what he did the last
two weeks and what he want to do the next two weeks.
(max. 5 min. per person, daily scrum like).
2) News
-> Developers with interesting news keep the other
up-to-date but no discussion.
3) Maintainer Orga
-> Issues
-> Requests
4) Project Orga
-> Gather topics which need to be discussed or improve
the project itself.
-> Find tasks and developer which a responsible for a task.
5) Admin Orga
-> Access requests
-> Questions
-> Issues
6) GSoC Orga
7) Other topics which are not on the agenda.
99) Developer Topics / Split Up / Have fun to discuss your idea
-> Gather developer topics which seem to be important and
interesting to solve.
-> Gather groups of developers who are interested in the same topic.
-> For deeper information exchange split up in different jitsi meet
channels and close meeting.
100) End
=====================================================
Best Regards
Zaolin
Hi all,
We're looking at cleaning up gerrit, so we're planning on abandoning some
older commits. To keep from overwhelming people, we're going to do it in
stages. Right now we're looking at abandoning all commits that haven't
been updated in 18 Months. This is around 90 commits.
Please look through the commits in this list, and see if there are any that
you'd like to work on. If there are, please let the original author know -
if they don't respond, feel free to take the commit over.
https://review.coreboot.org/#/q/status:open+before:2014-09-01
<https://www.google.com/url?q=https%3A%2F%2Freview.coreboot.org%2F%23%2Fq%2F…>
We will abandon any patches that have not been updated claimed or updated
by 4/6.
We will look at further cleanups shortly.
Martin
