coreboot March 2006

coreboot@coreboot.org

27 participants
45 discussions

by Ken Fuchs

> On Wed, Aug 03, 2005 at 11:59:20AM +0900, Jun OKAJIMA wrote: > > Probably, most guys here use BIOS Saver. > > And it works well? > > In mine, RD1 for PLCC gets not being writable suddenly. > > I mean, it seems writable but # flash_rom -v fails. > > I solved this problem by a quick hack. > > > > How about yours? You can write RD1 or W49F002U well? > > Any problem happen? Johnathan McDowell wrote: > Even after that it's sometimes a bit flakey and I have to erase, then > write it. I've put the board's original BIOS in the RD1 and am writing > to the SST 39SF020A instead, which works without problems. I've read posts about the RD1 that suggest its integrated flash device is low quality and it may take 10 or more flash attempts to get a good flash update to the RD1 flash device. As a result, many RD1 BIOS Savior users will flash the commercial BIOS image (or other known good BIOS image) into the RD1 integrated flash device as many times as needed to get an image that boots. Then use the original BIOS device to flash test BIOS image (usually LinuxBIOS images among this group), since the original BIOS device usually flashes OK on the first attempt. I've used the RD1 in the above fashion with great success on the Tyan S2885 mainboard. The same RD1 would not work on the nVidia CK8-04 CRB mainboard. I think the CK8-04 CRB requires a flash device that the RD1 does not support. However, the RD1 worked well as an "do nothing" adapter which allowed swapping the BIOS flash device between my flash burner and the mainboard without any wear to the mainboard's BIOS socket. BTW, my flash burner is an older Enhanced Willem Universal Programmer. I got mine for only $60 US over a year ago. I've seen it for less than $40 on eBay a few weeks ago. The newest model is going for about $50 US. It does a LinuxBIOS flash in about 5 minutes; not bad for a $60 burner. However, it does require changing DIP switches to match an image for each device it can program. Great for the amateur or professional with a small budget. > > BTW, a cable of your RD1 is not broken? > > I needed soldering to fix it. > Mine was fine out of the box. Mine cable and switch worked fine out of the box as well. Sincerely, Ken Fuchs <kfuchs(a)winternet.com> ami-mac-sun

13 years, 10 months

[LinuxBIOS] Kernel will not boot

by Philipp Degler

Hi, I tried various payloads to boot the system. Filo could not find my hda saying floating bus. Etherboot loads OK and gets a kernel elf image via tftp but kernel is not loading. Do you have an idea what could be the problem? Maybe some PCI-Devices not initialized correctly? VGA-Support is turned off, no pci cards in the slots, 2GB RAM, Using 2.6 static kernel with vga and fb options turned completely off. LinuxBIOS was compiled with gcc (GCC) 3.3.3 (SuSE Linux) and binutils-2.15.90.0.1.1-30 (binutils-32bit-9.1-200404070910) I appended the trace of LinuxBIOS with loglevel 9. thx phil --------- LinuxBIOS-1.1.8_Fallback Mon Mar 27 15:51:01 CEST 2006 starting... i386 console_init report_bist_failure setup_default_resource_map setting up resource map.... 0000c144 <-00000000 0000c14c <-00000001 0000c154 <-00000002 0000c15c <-00000003 0000c164 <-00000004 0000c16c <-00000005 0000c174 <-00000006 0000c17c <-00000007 0000c140 <-00000000 0000c148 <-00000000 0000c150 <-00000000 0000c158 <-00000000 0000c160 <-00000000 0000c168 <-00000000 0000c170 <-00000000 0000c178 <-00000000 0000c184 <-00000000 0000c18c <-00000000 0000c194 <-00000000 0000c19c <-00000000 0000c1a4 <-00000000 0000c1ac <-00000000 0000c1b4 <-00000000 0000c180 <-00000000 0000c188 <-00000000 0000c190 <-00000000 0000c198 <-00000000 0000c1a0 <-00000000 0000c1a8 <-00000000 0000c1b0 <-00000000 0000c1cc <-00000000 0000c1d4 <-00000000 0000c1dc <-00000000 0000c1c8 <-00000000 0000c1d0 <-00000000 0000c1d8 <-00000000 0000c1e4 <-00000000 0000c1e8 <-00000000 0000c1ec <-00000000 done. setup_coherent_ht_domain Enabling routing table for node 00 done. Enabling SMP settings (0,1) link=01 (1,0) link=01 setup_remote_node: done Renaming current temporary node to 01 done. Enabling routing table for node 01 done. 02 nodes initialized. coherent_ht_finalize done needs_reset ht reset - enable_smbus SMBus controller enabled memreset_setup sdram_initialize Ram1.00 setting up CPU00 northbridge registers done. Ram1.01 setting up CPU01 northbridge registers done. Ram2.00 Enabling dual channel memory 200Mhz Interleaved RAM: 0x00100000 KB Ram2.01 Enabling dual channel memory 200Mhz Interleaved RAM: 0x00200000 KB Ram3 ECC enabled ECC enabled Initializing memory: done Initializing memory: done Clearing initial memory region: done Ram4 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. test LinuxBIOS-1.1.8_Fallback Mon Mar 27 15:51:01 CEST 2006 booting... Enumerating buses... scan_static_bus for Root Device PCI_DOMAIN: 0000 enabled APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 0 PCI: 00:18.0 [1022/1100] bus ops PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] ops PCI: 00:18.3 [1022/1103] enabled PCI: devfn 0xc4, bad id 0xffffffff PCI: devfn 0xc5, bad id 0xffffffff PCI: devfn 0xc6, bad id 0xffffffff PCI: devfn 0xc7, bad id 0xffffffff PCI: 00:19.0 [1022/1100] bus ops PCI: 00:19.0 [1022/1100] enabled PCI: 00:19.1 [1022/1101] enabled PCI: 00:19.2 [1022/1102] enabled PCI: 00:19.3 [1022/1103] ops PCI: 00:19.3 [1022/1103] enabled PCI: devfn 0xcc, bad id 0xffffffff PCI: devfn 0xcd, bad id 0xffffffff PCI: devfn 0xce, bad id 0xffffffff PCI: devfn 0xcf, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00040000 malloc 0x00040000 PCI: 01:00.0 [1022/7450] bus ops PCI: 01:00.0 [1022/7450] enabled Capability: 0x08 @ 0xa0 Capability: 0x08 @ 0xb8 flags: 0x8000 Capability: 0x08 @ 0xa0 Capability: 0x08 @ 0xb8 Capability: 0x08 @ 0xc0 flags: 0x0040 PCI: 01:01.0 count: 0002 static_count: 0001 PCI: 01:01.0 [1022/7450] enabled next_unitid: 0003 malloc Enter, size 668, free_mem_ptr 0004029c malloc 0x0004029c PCI: 01:00.0 [1022/7460] bus ops PCI: 01:00.0 [1022/7460] enabled Capability: 0x08 @ 0xc0 flags: 0x0080 PCI: 01:03.0 count: 0004 static_count: 0001 PCI: 01:03.0 [1022/7460] enabled next_unitid: 0007 PCI: pci_scan_bus for bus 1 PCI: devfn 0x0, bad id 0xffffffff PCI: 01:01.0 [1022/7450] enabled malloc Enter, size 668, free_mem_ptr 00040538 malloc 0x00040538 PCI: 01:01.1 [1022/7451] ops PCI: 01:01.1 [1022/7451] enabled PCI: devfn 0xa, bad id 0xffffffff PCI: devfn 0xb, bad id 0xffffffff PCI: devfn 0xc, bad id 0xffffffff PCI: devfn 0xd, bad id 0xffffffff PCI: devfn 0xe, bad id 0xffffffff PCI: devfn 0xf, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 000407d4 malloc 0x000407d4 PCI: 01:02.0 [1022/7450] bus ops PCI: 01:02.0 [1022/7450] enabled malloc Enter, size 668, free_mem_ptr 00040a70 malloc 0x00040a70 PCI: 01:02.1 [1022/7451] ops PCI: 01:02.1 [1022/7451] enabled PCI: devfn 0x12, bad id 0xffffffff PCI: devfn 0x13, bad id 0xffffffff PCI: devfn 0x14, bad id 0xffffffff PCI: devfn 0x15, bad id 0xffffffff PCI: devfn 0x16, bad id 0xffffffff PCI: devfn 0x17, bad id 0xffffffff PCI: 01:03.0 [1022/7460] enabled malloc Enter, size 668, free_mem_ptr 00040d0c malloc 0x00040d0c PCI: 01:04.0 [1022/7468] bus ops PCI: 01:04.0 [1022/7468] enabled malloc Enter, size 668, free_mem_ptr 00040fa8 malloc 0x00040fa8 PCI: 01:04.1 [1022/7469] ops PCI: 01:04.1 [1022/7469] enabled malloc Enter, size 668, free_mem_ptr 00041244 malloc 0x00041244 PCI: 01:04.2 [1022/746a] bus ops PCI: 01:04.2 [1022/746a] enabled malloc Enter, size 668, free_mem_ptr 000414e0 malloc 0x000414e0 PCI: 01:04.3 [1022/746b] bus ops PCI: 01:04.3 [1022/746b] enabled PCI: devfn 0x24, bad id 0x0 malloc Enter, size 668, free_mem_ptr 0004177c malloc 0x0004177c PCI: 01:04.5 [1022/746d] ops PCI: 01:04.5 [1022/746d] enabled malloc Enter, size 668, free_mem_ptr 00041a18 malloc 0x00041a18 PCI: 01:04.6 [1022/746e] ops PCI: 01:04.6 [1022/746e] enabled PCI: devfn 0x27, bad id 0x0 PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff do_pci_scan_bridge for PCI: 01:01.0 PCI: pci_scan_bus for bus 2 PCI: devfn 0x0, bad id 0xffffffff PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00041cb4 malloc 0x00041cb4 PCI: 02:03.0 [8086/1076] enabled malloc Enter, size 668, free_mem_ptr 00041f50 malloc 0x00041f50 PCI: 02:04.0 [8086/1076] enabled malloc Enter, size 668, free_mem_ptr 000421ec malloc 0x000421ec PCI: 02:05.0 [1095/3114] enabled PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff PCI: pci_scan_bus returning with max=02 Capability: 0x07 @ 0xa0 PCI: 02: Conventional PCI do_pci_scan_bridge returns max 2 do_pci_scan_bridge for PCI: 01:02.0 PCI: pci_scan_bus for bus 3 PCI: devfn 0x0, bad id 0xffffffff PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff PCI: pci_scan_bus returning with max=03 Capability: 0x07 @ 0xa0 PCI: 03: 133MHz PCI-X do_pci_scan_bridge returns max 3 do_pci_scan_bridge for PCI: 01:03.0 PCI: pci_scan_bus for bus 4 malloc Enter, size 668, free_mem_ptr 00042488 malloc 0x00042488 PCI: 04:00.0 [1022/7464] bus ops PCI: 04:00.0 [1022/7464] enabled malloc Enter, size 668, free_mem_ptr 00042724 malloc 0x00042724 PCI: 04:00.1 [1022/7464] bus ops PCI: 04:00.1 [1022/7464] enabled malloc Enter, size 668, free_mem_ptr 000429c0 malloc 0x000429c0 PCI: 04:00.2 [1022/7463] ops USB2 disabled. PCI: 04:00.2 [1022/7463] disabled PCI: devfn 0x3, bad id 0xffffffff PCI: devfn 0x4, bad id 0xffffffff PCI: devfn 0x5, bad id 0xffffffff PCI: devfn 0x6, bad id 0xffffffff PCI: devfn 0x7, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00042c5c malloc 0x00042c5c PCI: 04:01.0 [1022/7462] ops PCI: 04:01.0 [1022/7462] enabled PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00042ef8 malloc 0x00042ef8 PCI: 04:06.0 [1002/4752] enabled PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff scan_static_bus for PCI: 04:00.0 scan_static_bus for PCI: 04:00.0 done scan_static_bus for PCI: 04:00.1 scan_static_bus for PCI: 04:00.1 done PCI: pci_scan_bus returning with max=04 do_pci_scan_bridge returns max 4 scan_static_bus for PCI: 01:04.0 scan_static_bus for PCI: 01:04.0 done scan_static_bus for PCI: 01:04.2 scan_static_bus for PCI: 01:04.2 done scan_static_bus for PCI: 01:04.3 scan_static_bus for PCI: 01:04.3 done PCI: pci_scan_bus returning with max=04 PCI: pci_scan_bus returning with max=04 PCI_DOMAIN: 0000 passpw: enabled PCI_DOMAIN: 0000 passpw: enabled APIC_CLUSTER: 0 scanning... PCI: 00:18.3 siblings=0 CPU: APIC: 00 enabled PCI: 00:19.3 siblings=0 CPU: APIC: 01 enabled scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI: 00:18.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 done PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 01:01.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 02:03.0 18 * [0x00000000 - 0x0000003f] io PCI: 02:04.0 18 * [0x00000040 - 0x0000007f] io PCI: 02:05.0 20 * [0x00000080 - 0x0000008f] io PCI: 02:05.0 10 * [0x00000090 - 0x00000097] io PCI: 02:05.0 18 * [0x000000a0 - 0x000000a7] io PCI: 02:05.0 14 * [0x000000b0 - 0x000000b3] io PCI: 02:05.0 1c * [0x000000c0 - 0x000000c3] io PCI: 01:01.0 compute_allocate_io: base: 000000c4 size: 00001000 align: 12 gran: 12 done PCI: 01:01.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 01:01.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 01:01.0 compute_allocate_prefmem: base: fffffffffff00000 size: 00000000 align: 20 gran: 20 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 01:01.0 compute_allocate_prefmem: base: fffffffffff00000 size: 00000000 align: 20 gran: 20 done PCI: 01:01.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] bus 2 prefmem PCI: 01:01.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 02:05.0 30 * [0x00000000 - 0x0007ffff] mem PCI: 02:03.0 10 * [0x00080000 - 0x0009ffff] mem PCI: 02:04.0 10 * [0x000a0000 - 0x000bffff] mem PCI: 02:04.0 14 * [0x000c0000 - 0x000dffff] mem PCI: 02:04.0 30 * [0x000e0000 - 0x000fffff] mem PCI: 02:05.0 24 * [0x00100000 - 0x001003ff] mem PCI: 01:01.0 compute_allocate_mem: base: 00100400 size: 00200000 align: 20 gran: 20 done PCI: 01:03.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 04:06.0 14 * [0x00000000 - 0x000000ff] io PCI: 01:03.0 compute_allocate_io: base: 00000100 size: 00001000 align: 12 gran: 12 done PCI: 01:03.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 01:03.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 01:03.0 compute_allocate_prefmem: base: fff00000 size: 00000000 align: 20 gran: 20 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 01:03.0 compute_allocate_prefmem: base: fff00000 size: 00000000 align: 20 gran: 20 done PCI: 01:03.0 24 <- [0x00fff00000 - 0x00ffefffff] bus 4 prefmem PCI: 01:03.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 04:06.0 10 * [0x00000000 - 0x00ffffff] mem PCI: 04:06.0 30 * [0x01000000 - 0x0101ffff] mem PCI: 04:01.0 30 * [0x01020000 - 0x0102ffff] mem PCI: 04:00.0 10 * [0x01030000 - 0x01030fff] mem PCI: 04:00.1 10 * [0x01031000 - 0x01031fff] mem PCI: 04:01.0 10 * [0x01032000 - 0x01032fff] mem PCI: 04:06.0 18 * [0x01033000 - 0x01033fff] mem PCI: 01:03.0 compute_allocate_mem: base: 01034000 size: 01100000 align: 24 gran: 20 done PCI: 01:04.0 read_resources bus 0 link: 0 PCI: 01:04.0 read_resources bus 0 link: 0 done PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 01:01.0 1c * [0x00000000 - 0x00000fff] io PCI: 01:03.0 1c * [0x00001000 - 0x00001fff] io PCI: 01:04.3 58 * [0x00002000 - 0x000020ff] io PCI: 01:04.5 10 * [0x00002400 - 0x000024ff] io PCI: 01:04.6 10 * [0x00002800 - 0x000028ff] io PCI: 01:04.6 14 * [0x00002c00 - 0x00002c7f] io PCI: 01:04.5 14 * [0x00002c80 - 0x00002cbf] io PCI: 01:04.2 10 * [0x00002cc0 - 0x00002cdf] io PCI: 01:04.1 20 * [0x00002ce0 - 0x00002cef] io PCI: 00:18.0 compute_allocate_io: base: 00002cf0 size: 00003000 align: 12 gran: 12 done PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 01:03.0 20 * [0x00000000 - 0x010fffff] mem PCI: 01:01.0 20 * [0x01100000 - 0x012fffff] mem PCI: 01:01.1 10 * [0x01300000 - 0x01300fff] mem PCI: 01:02.1 10 * [0x01301000 - 0x01301fff] mem PCI: 00:18.0 compute_allocate_mem: base: 01302000 size: 01400000 align: 24 gran: 20 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:18.0 1d2 * [0x00001000 - 0x00003fff] io PCI: 00:18.0 1d8 * [0x00004000 - 0x00003fff] io Root Device compute_allocate_io: base: 00004000 size: 00003c00 align: 12 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:18.3 94 * [0x00000000 - 0x03ffffff] mem PCI: 00:18.0 1a2 * [0x04000000 - 0x053fffff] mem PCI: 00:18.0 1b8 * [0x05400000 - 0x053fffff] prefmem PCI: 00:18.0 1b0 * [0x05400000 - 0x053fffff] mem PCI: 00:18.0 1aa * [0x05400000 - 0x053fffff] prefmem Root Device compute_allocate_mem: base: 05400000 size: 05400000 align: 26 gran: 0 done Done reading resources. Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00003c00 align: 12 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:18.0 1d2 * [0x00001000 - 0x00003fff] io PCI: 00:18.0 1d8 * [0x00004000 - 0x00003fff] io Root Device compute_allocate_io: base: 00004000 size: 00003000 align: 12 gran: 0 done Root Device compute_allocate_mem: base: f8000000 size: 05400000 align: 26 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:18.3 94 * [0xf8000000 - 0xfbffffff] mem PCI: 00:18.0 1a2 * [0xfc000000 - 0xfd3fffff] mem PCI: 00:18.0 1b8 * [0xfd400000 - 0xfd3fffff] prefmem PCI: 00:18.0 1b0 * [0xfd400000 - 0xfd3fffff] mem PCI: 00:18.0 1aa * [0xfd400000 - 0xfd3fffff] prefmem Root Device compute_allocate_mem: base: fd400000 size: 05400000 align: 26 gran: 0 done Root Device assign_resources, bus 0 link: 0 PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:18.0 compute_allocate_io: base: 00004000 size: 00000000 align: 12 gran: 12 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_io: base: 00004000 size: 00000000 align: 12 gran: 12 done PCI: 00:18.0 1d8 <- [0x0000004000 - 0x0000003fff] io <node 0 link 0> PCI: 00:18.0 compute_allocate_prefmem: base: fd400000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_prefmem: base: fd400000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 1b8 <- [0x00fd400000 - 0x00fd3fffff] prefmem <node 0 link 0> PCI: 00:18.0 compute_allocate_mem: base: fd400000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_mem: base: fd400000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 1b0 <- [0x00fd400000 - 0x00fd3fffff] mem <node 0 link 0> PCI: 00:18.0 compute_allocate_io: base: 00001000 size: 00003000 align: 12 gran: 12 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 01:01.0 1c * [0x00001000 - 0x00001fff] io PCI: 01:03.0 1c * [0x00002000 - 0x00002fff] io PCI: 01:04.3 58 * [0x00003000 - 0x000030ff] io PCI: 01:04.5 10 * [0x00003400 - 0x000034ff] io PCI: 01:04.6 10 * [0x00003800 - 0x000038ff] io PCI: 01:04.6 14 * [0x00003c00 - 0x00003c7f] io PCI: 01:04.5 14 * [0x00003c80 - 0x00003cbf] io PCI: 01:04.2 10 * [0x00003cc0 - 0x00003cdf] io PCI: 01:04.1 20 * [0x00003ce0 - 0x00003cef] io PCI: 00:18.0 compute_allocate_io: base: 00003cf0 size: 00003000 align: 12 gran: 12 done PCI: 00:18.0 1d2 <- [0x0000001000 - 0x0000003fff] io <node 0 link 2> PCI: 00:18.0 compute_allocate_prefmem: base: fd400000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 00:18.0 compute_allocate_prefmem: base: fd400000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 1aa <- [0x00fd400000 - 0x00fd3fffff] prefmem <node 0 link 2> PCI: 00:18.0 compute_allocate_mem: base: fc000000 size: 01400000 align: 24 gran: 20 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 01:03.0 20 * [0xfc000000 - 0xfd0fffff] mem PCI: 01:01.0 20 * [0xfd100000 - 0xfd2fffff] mem PCI: 01:01.1 10 * [0xfd300000 - 0xfd300fff] mem PCI: 01:02.1 10 * [0xfd301000 - 0xfd301fff] mem PCI: 00:18.0 compute_allocate_mem: base: fd302000 size: 01400000 align: 24 gran: 20 done PCI: 00:18.0 1a2 <- [0x00fc000000 - 0x00fd3fffff] mem <node 0 link 2> PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:18.0 assign_resources, bus 1 link: 2 PCI: 01:01.0 compute_allocate_io: base: 00001000 size: 00001000 align: 12 gran: 12 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 02:03.0 18 * [0x00001000 - 0x0000103f] io PCI: 02:04.0 18 * [0x00001040 - 0x0000107f] io PCI: 02:05.0 20 * [0x00001080 - 0x0000108f] io PCI: 02:05.0 10 * [0x00001090 - 0x00001097] io PCI: 02:05.0 18 * [0x000010a0 - 0x000010a7] io PCI: 02:05.0 14 * [0x000010b0 - 0x000010b3] io PCI: 02:05.0 1c * [0x000010c0 - 0x000010c3] io PCI: 01:01.0 compute_allocate_io: base: 000010c4 size: 00001000 align: 12 gran: 12 done PCI: 01:01.0 1c <- [0x0000001000 - 0x0000001fff] bus 2 io PCI: 01:01.0 compute_allocate_mem: base: fd100000 size: 00200000 align: 20 gran: 20 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 02:05.0 30 * [0xfd100000 - 0xfd17ffff] mem PCI: 02:03.0 10 * [0xfd180000 - 0xfd19ffff] mem PCI: 02:04.0 10 * [0xfd1a0000 - 0xfd1bffff] mem PCI: 02:04.0 14 * [0xfd1c0000 - 0xfd1dffff] mem PCI: 02:04.0 30 * [0xfd1e0000 - 0xfd1fffff] mem PCI: 02:05.0 24 * [0xfd200000 - 0xfd2003ff] mem PCI: 01:01.0 compute_allocate_mem: base: fd200400 size: 00200000 align: 20 gran: 20 done PCI: 01:01.0 20 <- [0x00fd100000 - 0x00fd2fffff] bus 2 mem PCI: 01:01.0 assign_resources, bus 2 link: 0 PCI: 02:03.0 10 <- [0x00fd180000 - 0x00fd19ffff] mem PCI: 02:03.0 18 <- [0x0000001000 - 0x000000103f] io PCI: 02:04.0 10 <- [0x00fd1a0000 - 0x00fd1bffff] mem PCI: 02:04.0 14 <- [0x00fd1c0000 - 0x00fd1dffff] mem PCI: 02:04.0 18 <- [0x0000001040 - 0x000000107f] io PCI: 02:04.0 30 <- [0x00fd1e0000 - 0x00fd1fffff] romem PCI: 02:05.0 10 <- [0x0000001090 - 0x0000001097] io PCI: 02:05.0 14 <- [0x00000010b0 - 0x00000010b3] io PCI: 02:05.0 18 <- [0x00000010a0 - 0x00000010a7] io PCI: 02:05.0 1c <- [0x00000010c0 - 0x00000010c3] io PCI: 02:05.0 20 <- [0x0000001080 - 0x000000108f] io PCI: 02:05.0 24 <- [0x00fd200000 - 0x00fd2003ff] mem PCI: 02:05.0 30 <- [0x00fd100000 - 0x00fd17ffff] romem PCI: 01:01.0 assign_resources, bus 2 link: 0 PCI: 01:01.1 10 <- [0x00fd300000 - 0x00fd300fff] mem64 PCI: 01:02.1 10 <- [0x00fd301000 - 0x00fd301fff] mem64 PCI: 01:03.0 compute_allocate_io: base: 00002000 size: 00001000 align: 12 gran: 12 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 04:06.0 14 * [0x00002000 - 0x000020ff] io PCI: 01:03.0 compute_allocate_io: base: 00002100 size: 00001000 align: 12 gran: 12 done PCI: 01:03.0 1c <- [0x0000002000 - 0x0000002fff] bus 4 io PCI: 01:03.0 compute_allocate_mem: base: fc000000 size: 01100000 align: 24 gran: 20 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 04:06.0 10 * [0xfc000000 - 0xfcffffff] mem PCI: 04:06.0 30 * [0xfd000000 - 0xfd01ffff] mem PCI: 04:01.0 30 * [0xfd020000 - 0xfd02ffff] mem PCI: 04:00.0 10 * [0xfd030000 - 0xfd030fff] mem PCI: 04:00.1 10 * [0xfd031000 - 0xfd031fff] mem PCI: 04:01.0 10 * [0xfd032000 - 0xfd032fff] mem PCI: 04:06.0 18 * [0xfd033000 - 0xfd033fff] mem PCI: 01:03.0 compute_allocate_mem: base: fd034000 size: 01100000 align: 24 gran: 20 done PCI: 01:03.0 20 <- [0x00fc000000 - 0x00fd0fffff] bus 4 mem PCI: 01:03.0 assign_resources, bus 4 link: 0 PCI: 04:00.0 10 <- [0x00fd030000 - 0x00fd030fff] mem PCI: 04:00.1 10 <- [0x00fd031000 - 0x00fd031fff] mem PCI: 04:01.0 10 <- [0x00fd032000 - 0x00fd032fff] mem PCI: 04:01.0 30 <- [0x00fd020000 - 0x00fd02ffff] romem PCI: 04:06.0 10 <- [0x00fc000000 - 0x00fcffffff] mem PCI: 04:06.0 14 <- [0x0000002000 - 0x00000020ff] io PCI: 04:06.0 18 <- [0x00fd033000 - 0x00fd033fff] mem PCI: 04:06.0 30 <- [0x00fd000000 - 0x00fd01ffff] romem PCI: 01:03.0 assign_resources, bus 4 link: 0 PCI: 01:04.1 20 <- [0x0000003ce0 - 0x0000003cef] io PCI: 01:04.2 10 <- [0x0000003cc0 - 0x0000003cdf] io PCI: 01:04.3 58 <- [0x0000003000 - 0x00000030ff] io PCI: 01:04.5 10 <- [0x0000003400 - 0x00000034ff] io PCI: 01:04.5 14 <- [0x0000003c80 - 0x0000003cbf] io PCI: 01:04.6 10 <- [0x0000003800 - 0x00000038ff] io PCI: 01:04.6 14 <- [0x0000003c00 - 0x0000003c7f] io PCI: 00:18.0 assign_resources, bus 1 link: 2 PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> PCI: 00:19.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resourcess... PCI: 00:18.0 cmd <- 140 PCI: 00:00.0 missing enable_resources PCI: 00:00.1 missing enable_resources PCI: 00:01.0 missing enable_resources PCI: 00:01.1 missing enable_resources PCI: 00:00.0 missing enable_resources PCI: 00:01.0 missing enable_resources PCI: 00:01.1 missing enable_resources PCI: 00:01.2 missing enable_resources PCI: 00:01.3 missing enable_resources PCI: 01:01.0 bridge ctrl <- 0003 PCI: 01:01.0 cmd <- 147 PCI: 02:03.0 cmd <- 143 PCI: 02:04.0 cmd <- 143 PCI: 02:05.0 cmd <- 143 PCI: 01:01.1 cmd <- 146 PCI: 01:02.1 cmd <- 146 PCI: 01:03.0 bridge ctrl <- 0003 PCI: 01:03.0 cmd <- 147 PCI: 04:00.0 cmd <- 142 PCI: 04:00.1 cmd <- 142 PCI: 04:01.0 cmd <- 142 PCI: 04:06.0 cmd <- 1c3 PCI: 01:04.0 cmd <- 14f PCI: 01:04.1 cmd <- 141 PCI: 01:04.2 cmd <- 141 PCI: 01:04.3 cmd <- 141 PCI: 01:04.5 cmd <- 141 PCI: 01:04.6 cmd <- 141 PCI: 00:18.1 subsystem <- 161f/3017 PCI: 00:18.1 cmd <- 140 PCI: 00:18.2 subsystem <- 161f/3017 PCI: 00:18.2 cmd <- 140 PCI: 00:18.3 cmd <- 140 PCI: 00:19.0 cmd <- 140 PCI: 00:19.1 subsystem <- 161f/3017 PCI: 00:19.1 cmd <- 140 PCI: 00:19.2 subsystem <- 161f/3017 PCI: 00:19.2 cmd <- 140 PCI: 00:19.3 cmd <- 140 done. Initializing devices... Root Device init PCI: 00:18.0 init PCI: 00:18.1 init PCI: 00:18.2 init PCI: 00:18.3 init NB: Function 3 Misc Control.. done. PCI: 00:19.0 init PCI: 00:19.1 init PCI: 00:19.2 init PCI: 00:19.3 init NB: Function 3 Misc Control.. done. APIC_CLUSTER: 0 init Initializing CPU #0 CPU: vendor AMD device f5a Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB ADDRESS_MASK_HIGH=0xff DONE variable MTRRs Clear out the extra MTRR's ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled microcode: equivalent processor rev id = 0x004a, patch id = 0x00000000 microcode: patch id that want to apply= 0x00000047 microcode: updated to patch id = 0x00000047 success Setting up local apic... apic_id: 0 done. Clearing memory 1024K - 1048576K: --------------- done CPU #0 Initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +start_eip=0x00010000 #startup loops: 2. Sending STARTUP #1 to 1. After apic_write. Initializing CPU #1 Startup point 1. Waiting for send to finish... +CPU: vendor AMD device f5a Sending STARTUP #2 to 1. After apic_write. Enabling cache at rSteutpt ipnogi nfti x1e.d fMWTaRiRtsi(n0g- 8f8o)r tsyepned: tUoC inish... fAfter SSteatrttiunpg. RiWxaeidt iMnTgR Rfso(r0 -11 6C)P UTSy pteo: sWtBo,p dMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB ADDRESS_MASK_HIGH=0xff DONE variable MTRRs Clear out the extra MTRR's ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled microcode: equivalent processor rev id = 0x004a, patch id = 0x00000000 microcode: patch id that want to apply= 0x00000047 microcode: updated to patch id = 0x00000047 success Setting up local apic... apic_id: 1 done. Clearing memory 1048576K - 2097152K: ---------------- done CPU #1 Initialized All AP CPUs stopped PCI: 01:01.0 init PCI: 01:03.0 init PCI: 01:04.0 init for IRQ, reg 0x00000000 value 0x00000700 0x00000000 for IRQ, reg 0x00000001 value 0x00010000 0x00000000 for IRQ, reg 0x00000002 value 0x00010000 0x00000000 for IRQ, reg 0x00000003 value 0x00010000 0x00000000 for IRQ, reg 0x00000004 value 0x00010000 0x00000000 for IRQ, reg 0x00000005 value 0x00010000 0x00000000 for IRQ, reg 0x00000006 value 0x00010000 0x00000000 for IRQ, reg 0x00000007 value 0x00010000 0x00000000 for IRQ, reg 0x00000008 value 0x00010000 0x00000000 for IRQ, reg 0x00000009 value 0x00010000 0x00000000 for IRQ, reg 0x0000000a value 0x00010000 0x00000000 for IRQ, reg 0x0000000b value 0x00010000 0x00000000 for IRQ, reg 0x0000000c value 0x00010000 0x00000000 for IRQ, reg 0x0000000d value 0x00010000 0x00000000 for IRQ, reg 0x0000000e value 0x00010000 0x00000000 for IRQ, reg 0x0000000f value 0x00010000 0x00000000 for IRQ, reg 0x00000010 value 0x00010000 0x00000000 for IRQ, reg 0x00000011 value 0x00010000 0x00000000 for IRQ, reg 0x00000012 value 0x00010000 0x00000000 for IRQ, reg 0x00000013 value 0x00010000 0x00000000 for IRQ, reg 0x00000014 value 0x00010000 0x00000000 for IRQ, reg 0x00000015 value 0x00010000 0x00000000 for IRQ, reg 0x00000016 value 0x00010000 0x00000000 for IRQ, reg 0x00000017 value 0x00010000 0x00000000 RTC Init RTC: Checksum invalid zeroing cmos Invalid CMOS LB checksum enabling HPET @0xfed00000 PCI: 01:04.1 init PCI: 01:04.3 init set power on after power fail PCI: 02:03.0 init PCI: 02:04.0 init PCI: 02:05.0 init PCI: 04:01.0 init Reseting PHY... Done PCI: 04:06.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 done. Wrote the mp table end at: 00000020 - 0000021c Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 00000df8 checksum 5f51 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 33:stream_init() - rom_stream: 0xfffd0000 - 0xfffdee87 Found ELF candiate at offset 0 header_offset is 0 Try to load at offset 0x0 n_type: 00000001 n_name(8): ELFBoot n_desc(10): Etherboot n_type: 00000002 n_name(8): ELFBoot n_desc(6): 5.2.6 Loading Etherboot version: 5.2.6 Dropping non PT_LOAD segment malloc Enter, size 32, free_mem_ptr 00043194 malloc 0x00043194 New segment addr 0x20000 size 0x18024 offset 0xb0 filesize 0x891c (cleaned up) New segment addr 0x20000 size 0x18024 offset 0xb0 filesize 0x891c lb: [0x0000000000004000, 0x000000000004e000) segment: [0x0000000000020000, 0x000000000002891c, 0x0000000000038024) bounce: [0x000000007ff88000, 0x000000007ff9091c, 0x000000007ffa0024) Loading Segment: addr: 0x000000007ff88000 memsz: 0x0000000000018024 filesz: 0x000000000000891c [ 0x000000007ff88000, 000000007ff9091c, 0x000000007ffa0024) <- 00000000000000b0 Clearing Segment: addr: 0x000000007ff9091c memsz: 0x000000000000f708 Loaded segments verified segments closed down stream Jumping to boot code at 0x20000 entry = 0x00020000 lb_start = 0x00004000 lb_size = 0x0004a000 adjust = 0x7ffb2000 buffer = 0x7ff6c000 elf_boot_notes = 0x0001b160 adjusted_boot_notes = 0x7ffcd160 ROM segment 0x0000 length 0x0000 reloc 0x00020000 CPU 2088 Mhz Etherboot 5.2.6 (GPL) http://etherboot.org Tagged ELF for [E1000] Relocating _text from: [00020000,00039710) to [7fee68f0,7ff00000) Boot from (N)etwork or (Q)uit? N .Probing pci nic... [e1000-82541gi]Ethernet addr: 00:D0:68:09:EC:FD e1000: Valid Link not detected [e1000-82541gi]Ethernet addr: 00:D0:68:09:EC:FE Searching for server (DHCP)... ...Me: xxx.xxx.xxx.xxx, Server: 134.155.45.16, Gateway xxx.xxx.xxx.xxx Loading xxx.xxx.xxx.xxx:/htxlinux.0 ... (ELF)... ............................................................................................................. ........................................................................................................................................................... ........................................................................................................................................................... ........................................................................................................................................................... ........................................................................................................................................................... ...................................................................done Firmware type: LinuxBIOS

14 years, 9 months

[LinuxBIOS] LinuxBIOS support for nvidia CK804 northbridge?

by Carl-Daniel Hailfinger

Hi, in the process of trying to find any motherboard with more than 3 PCI-Express slots and LinuxBIOS support, I failed miserably. It seems such boards only exist with nVidia CK804 northbridges for which I couldn't find any code in the LinuxBIOS source code. Section 2.9 of the LinuxBIOS FAQ suggests to send lspci -vvv to this list for closer inspection. One of those systems with 4 PCIe slots is the Asus K8N-SLI Deluxe. The lspci below contains four PCIe gigabit ethernet controllers at 0000:01:00.0, 0000:02:00.0, 0000:03:00.0 and 0000:04:00.0. It's the only motherboard with this northbridge I have access to at the moment. switch:~ # lspci -vvv 0000:00:00.0 Memory controller: nVidia Corporation CK804 Memory Controller (rev a3) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Capabilities: [44] #08 [01e0] Capabilities: [e0] #08 [a801] 0000:00:01.0 ISA bridge: nVidia Corporation: Unknown device 0050 (rev a3) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 0000:00:01.1 SMBus: nVidia Corporation CK804 SMBus (rev a2) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 11 Region 0: I/O ports at e400 [size=32] Region 4: I/O ports at 4c00 [size=64] Region 5: I/O ports at 4c40 [size=64] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:02.0 USB Controller: nVidia Corporation CK804 USB Controller (rev a2) (prog-if 10 [OHCI]) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 201 Region 0: Memory at d3004000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:02.1 USB Controller: nVidia Corporation CK804 USB Controller (rev a3) (prog-if 20 [EHCI]) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin B routed to IRQ 177 Region 0: Memory at d3005000 (32-bit, non-prefetchable) [size=256] Capabilities: [44] #0a [2098] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:04.0 Multimedia audio controller: nVidia Corporation CK804 AC'97 Audio Controller (rev a2) Subsystem: ASUSTeK Computer Inc.: Unknown device 812a Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (500ns min, 1250ns max) Interrupt: pin A routed to IRQ 10 Region 0: I/O ports at dc00 [size=256] Region 1: I/O ports at e000 [size=256] Region 2: Memory at d3003000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:06.0 IDE interface: nVidia Corporation CK804 IDE (rev a2) (prog-if 8a [Master SecP PriP]) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Region 4: I/O ports at f000 [size=16] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:07.0 IDE interface: nVidia Corporation CK804 Serial ATA Controller (rev a3) (prog-if 85 [Master SecO PriO]) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 177 Region 0: I/O ports at 09f0 [size=8] Region 1: I/O ports at 0bf0 [size=4] Region 2: I/O ports at 0970 [size=8] Region 3: I/O ports at 0b70 [size=4] Region 4: I/O ports at d800 [size=16] Region 5: Memory at d3002000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:08.0 IDE interface: nVidia Corporation CK804 Serial ATA Controller (rev a3) (prog-if 85 [Master SecO PriO]) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 185 Region 0: I/O ports at 09e0 [size=8] Region 1: I/O ports at 0be0 [size=4] Region 2: I/O ports at 0960 [size=8] Region 3: I/O ports at 0b60 [size=4] Region 4: I/O ports at c400 [size=16] Region 5: Memory at d3001000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:09.0 PCI bridge: nVidia Corporation CK804 PCI Bridge (rev a2) (prog-if 01 [Subtractive decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap- 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Bus: primary=00, secondary=05, subordinate=05, sec-latency=128 I/O behind bridge: 0000a000-0000afff Memory behind bridge: ce000000-d0ffffff Prefetchable memory behind bridge: c0000000-c7ffffff BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B- 0000:00:0a.0 Bridge: nVidia Corporation CK804 Ethernet Controller (rev a3) Subsystem: ASUSTeK Computer Inc.: Unknown device 8141 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (250ns min, 5000ns max) Interrupt: pin A routed to IRQ 193 Region 0: Memory at d3000000 (32-bit, non-prefetchable) [size=4K] Region 1: I/O ports at b000 [size=8] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:0b.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, cache line size 08 Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 I/O behind bridge: 00009000-00009fff Memory behind bridge: cc000000-cdffffff Prefetchable memory behind bridge: 00000000fff00000-0000000000000000 BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [58] #08 [a800] Capabilities: [80] #10 [0141] 0000:00:0c.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, cache line size 08 Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 00008000-00008fff Memory behind bridge: ca000000-cbffffff Prefetchable memory behind bridge: 00000000fff00000-0000000000000000 BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [58] #08 [a800] Capabilities: [80] #10 [0141] 0000:00:0d.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, cache line size 08 Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 00007000-00007fff Memory behind bridge: c8000000-c9ffffff Prefetchable memory behind bridge: 00000000fff00000-0000000000000000 BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [58] #08 [a800] Capabilities: [80] #10 [0141] 0000:00:0e.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, cache line size 08 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 00006000-00006fff Memory behind bridge: d1000000-d2ffffff Prefetchable memory behind bridge: 00000000fff00000-0000000000000000 BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [58] #08 [a800] Capabilities: [80] #10 [0141] 0000:00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Capabilities: [80] #08 [2101] 0000:00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 0000:00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 0000:00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 0000:01:00.0 Ethernet controller: SysKonnect SK-9Exx 10/100/1000Base-T Adapter (rev 10) Subsystem: SysKonnect SK-9E21D 10/100/1000Base-T Adapter Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- Latency: 0, cache line size 08 Interrupt: pin A routed to IRQ 233 Region 0: Memory at d2000000 (64-bit, non-prefetchable) [size=16K] Region 2: I/O ports at 6000 [size=256] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data Capabilities: [5c] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [e0] #10 [0011] 0000:02:00.0 Ethernet controller: SysKonnect SK-9Exx 10/100/1000Base-T Adapter (rev 10) Subsystem: SysKonnect SK-9E21D 10/100/1000Base-T Adapter Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- Latency: 0, cache line size 08 Interrupt: pin A routed to IRQ 225 Region 0: Memory at c9000000 (64-bit, non-prefetchable) [size=16K] Region 2: I/O ports at 7000 [size=256] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data Capabilities: [5c] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [e0] #10 [0011] 0000:03:00.0 Ethernet controller: SysKonnect SK-9Exx 10/100/1000Base-T Adapter (rev 10) Subsystem: SysKonnect SK-9E21D 10/100/1000Base-T Adapter Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- Latency: 0, cache line size 08 Interrupt: pin A routed to IRQ 217 Region 0: Memory at cb000000 (64-bit, non-prefetchable) [size=16K] Region 2: I/O ports at 8000 [size=256] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data Capabilities: [5c] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [e0] #10 [0011] 0000:04:00.0 Ethernet controller: SysKonnect SK-9Exx 10/100/1000Base-T Adapter (rev 10) Subsystem: SysKonnect SK-9E21D 10/100/1000Base-T Adapter Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- Latency: 0, cache line size 08 Interrupt: pin A routed to IRQ 209 Region 0: Memory at cd000000 (64-bit, non-prefetchable) [size=16K] Region 2: I/O ports at 9000 [size=256] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data Capabilities: [5c] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [e0] #10 [0011] 0000:05:06.0 VGA compatible controller: nVidia Corporation NV18 [GeForce4 MX 4000 AGP 8x] (rev c1) (prog-if 00 [VGA]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (1250ns min, 250ns max) Interrupt: pin A routed to IRQ 12 Region 0: Memory at ce000000 (32-bit, non-prefetchable) [size=16M] Region 1: Memory at c0000000 (32-bit, prefetchable) [size=128M] Capabilities: [60] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:05:0b.0 FireWire (IEEE 1394): Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) (prog-if 10 [OHCI]) Subsystem: ASUSTeK Computer Inc.: Unknown device 808b Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (500ns min, 1000ns max), cache line size 08 Interrupt: pin A routed to IRQ 12 Region 0: Memory at d0008000 (32-bit, non-prefetchable) [size=2K] Region 1: Memory at d0000000 (32-bit, non-prefetchable) [size=16K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:05:0c.0 Ethernet controller: Marvell Technology Group Ltd. Gigabit Ethernet Controller (rev 13) Subsystem: ASUSTeK Computer Inc. Marvell 88E8001 Gigabit Ethernet Controller (Asus) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (5750ns min, 7750ns max), cache line size 08 Interrupt: pin A routed to IRQ 209 Region 0: Memory at d0004000 (32-bit, non-prefetchable) [size=16K] Region 1: I/O ports at a000 [size=256] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data The only references to something similar were a post archived at http://www.mail-archive.com/linuxbios@openbios.org/msg00792.html but the thread seemed to end inconclusive and another post at http://www.mail-archive.com/linuxbios@openbios.org/msg01023.html Is there any support for that nvidia northbridge underway? Regards, Carl-Daniel

14 years, 11 months

Re: [LinuxBIOS] broadcom HT1000 SATA PHY initializing

by Lu, Yinghai

You should be right. When I was testing that on Broadcom BLAST ref board: STAT and IDE doesn't work. But on another MB (serverworks HT1000 based), IDE is working. Maybe some magic bit in pci conf space need to set by option rom... You could compare the pci conf dump between system bios and LinuxBIOS... BTW, Can drop your funny signature in LinuxBIOS? YH

14 years, 12 months

[LinuxBIOS] bus 0 dev 0 and fidvid change

by Lu, Yinghai

Please check the issue 41, I make K8 MB can be compiled, and It include bus0/dev0 and fidvid change enhancement HT_CHAIN_UNITID_BASE Default is 1, and if it is 6, then amd8131 will be from 6, also if it is 0, will assume ht chain only have one HT device... HT_CHAIN_END_UNITID_BASE Default is 0x20 --- mean do not use that, if it is 0, the amd8111 will be dev0 SB_HT_CHAIN_UNITID_OFFSET_ONLY Default is 1, so if HT_CHAIN_UNITID_BASE!=1, will only offset unitid of SB CHAIN. K8_SB_HT_CHAIN_ON_BUS0 Deault is 0, if it is 1, will put sb chain on bus 0, even for S2885 sb ht is on link2, it will put on bus0. K8_SET_FIDVID in cache_as_ram_auto.c or auto.c Fidvid change to sync the fid on 4 way or more system with different cpu installed.... Put following sequence in your cache_as_ram_auto.c after ht is set. enable_fid_change(); enable_fid_change_on_sb(); init_fidvid_bsp(bsp_apicid); please check init_cpus.c and fidvid.c and amd8111_early_ctrl.c for detail.... YH

15 years

[LinuxBIOS] Geode Utilities and Tools

by Bari Ari

Just FYI on the Geodes in case anyone missed them... The AMD Geode dev site has a few handy utilities and tools for debugging BIOS and driver settings. Cyreg - Cyreg is a menu driven utility that displays memory, I/O and PCI configuration space data. The menus are defined in a text file that allows the user to easily modify each menu. Loadreg - Loadreg is a command line utility that allows the user to read or modify any I/O, memory, or PCI configuration space location. It is ideally suited to modifying system registers via a batch file. MCVAL - Mcval tests the state of the memory controller against known values, as well as lists all supported processor speeds and their associated memory controller register values. -Bari

15 years

[LinuxBIOS] Geode SC22000

by Per Hallsmark

Hello LB people, First, a great thank for the quick boost I had from your project in creating a special firmware for our project. I've ported LB to a SC2200 based platform, NCG266 (you can see some old photos at www.nano-system.com) The jump to the load just takes a couple of secs instead of like a minute with the Insyde BIOS... The LB base is svn ver 2171, I've got a 71K big patch for it. How do I contribute it to LB tree? Also during the learning and porting of LB, a couple of questions popped up: Q1: The source code files often include source files again instead of like building object modules that are later linked together. Why something like this? It seems odd to me as an perhaps oldschool C programmer. Q2: Why does the LB project need a special compiler? I've done numberous of firmware stuff and ordinary gnu tools have a good job so far. Must admit though that these hasn't been x86 which of course has it special boot mode, but there exist "standard" tools for that as well. (RPM package dev86 for example) Q3: Documentation... I was perhaps a bit optimistic when I thought the LB port should take one week, it was more like one month :-) But more documentation could help here a lot, or are there docs outside of linuxbios.org I've missed? Any work in progress here or can I contribute to it somehow? mvh Per Hallsmark T2 Data

15 years

[LinuxBIOS] CONFIG_LB_MEM_TOPK

by Lu, Yinghai

I'm going to check in new cache_as_ram code. It is more solid and could copy data from cache to ram. So we can pass some info from CAR stage to RAM stage. I want to change the default value for CONFIG_LB_MEM_TOPK from 1024 to 2048. So I don't need to change every Opteron MB Config.lb... Let me know if is ok to you. YH

15 years

Re: [LinuxBIOS] broadcom HT1000 SATA PHY initializing

by Lu, Yinghai

System BIOS or LinuxBIOS? Did you base the code in the tree? YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Jia Jianwei Sent: Thursday, March 30, 2006 12:36 PM To: linuxbios(a)linuxbios.org Subject: [LinuxBIOS] broadcom HT1000 SATA PHY initializing I'm porting BIOS on a AMD opteron system with broadcom HT2000 and HT1000 chipset. I meet a problem when initilizing SATA device of HT1000. The SATA PHY status(0x40)always return a disable status(04), whatever I did with the PHY reset ( set 0x48 bit 0 and clear it ). Can anyone give me some advices? Thanks in advance! Best Regards, Jianwei *** Disclaimer: This message may contain privileged and/or confidential information. If you have received this e-mail in error or are not the intended recipient, you may not use, copy, disseminate or distribute it; do not open any attachments, delete it immediately from your system and notify the sender promptly by e-mail that you have done so. Thank you. *** -- linuxbios mailing list linuxbios(a)linuxbios.org http://www.openbios.org/mailman/listinfo/linuxbios

15 years

Re: [LinuxBIOS] CONFIG_LB_MEM_TOPK

by Lu, Yinghai

Some change in src/cpu/amd/car... YH -----Original Message----- From: Stefan Reinauer [mailto:stepan@openbios.org] Sent: Friday, March 31, 2006 2:40 AM To: Lu, Yinghai Cc: Ronald G Minnich; Jason Schildt; linuxbios(a)linuxbios.org Subject: Re: CONFIG_LB_MEM_TOPK * Lu, Yinghai <yinghai.lu(a)amd.com> [060331 04:13]: > I'm going to check in new cache_as_ram code. It is more solid and could > copy data from cache to ram. So we can pass some info from CAR stage to > RAM stage. > > I want to change the default value for CONFIG_LB_MEM_TOPK from 1024 to > 2048. > So I don't need to change every Opteron MB Config.lb... > > Let me know if is ok to you. Let me know where we can review that code before you go ahead and check it in. It's not in the issue tracker yet, is it? Stefan

15 years

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coreboot March 2006