April 2006 - coreboot - mail.coreboot.org

by Ken Fuchs

> On Wed, Aug 03, 2005 at 11:59:20AM +0900, Jun OKAJIMA wrote: > > Probably, most guys here use BIOS Saver. > > And it works well? > > In mine, RD1 for PLCC gets not being writable suddenly. > > I mean, it seems writable but # flash_rom -v fails. > > I solved this problem by a quick hack. > > > > How about yours? You can write RD1 or W49F002U well? > > Any problem happen? Johnathan McDowell wrote: > Even after that it's sometimes a bit flakey and I have to erase, then > write it. I've put the board's original BIOS in the RD1 and am writing > to the SST 39SF020A instead, which works without problems. I've read posts about the RD1 that suggest its integrated flash device is low quality and it may take 10 or more flash attempts to get a good flash update to the RD1 flash device. As a result, many RD1 BIOS Savior users will flash the commercial BIOS image (or other known good BIOS image) into the RD1 integrated flash device as many times as needed to get an image that boots. Then use the original BIOS device to flash test BIOS image (usually LinuxBIOS images among this group), since the original BIOS device usually flashes OK on the first attempt. I've used the RD1 in the above fashion with great success on the Tyan S2885 mainboard. The same RD1 would not work on the nVidia CK8-04 CRB mainboard. I think the CK8-04 CRB requires a flash device that the RD1 does not support. However, the RD1 worked well as an "do nothing" adapter which allowed swapping the BIOS flash device between my flash burner and the mainboard without any wear to the mainboard's BIOS socket. BTW, my flash burner is an older Enhanced Willem Universal Programmer. I got mine for only $60 US over a year ago. I've seen it for less than $40 on eBay a few weeks ago. The newest model is going for about $50 US. It does a LinuxBIOS flash in about 5 minutes; not bad for a $60 burner. However, it does require changing DIP switches to match an image for each device it can program. Great for the amateur or professional with a small budget. > > BTW, a cable of your RD1 is not broken? > > I needed soldering to fix it. > Mine was fine out of the box. Mine cable and switch worked fine out of the box as well. Sincerely, Ken Fuchs <kfuchs(a)winternet.com> ami-mac-sun

12 years, 1 month

16
47
0 / 0

Re: [LinuxBIOS] some more tyan/s2881 questions

by Lu, Yinghai

I have inited the hw sensors in LinuxBIOS for s2881. So you could use lmsensor to check the FAN speed. The config file is on Tyan web. For the Fan control, there should more some reg setting...to reduce the FAN speed winbond and adm1027... YH

13 years

4
12
0 / 0

[LinuxBIOS] Kernel will not boot

by Philipp Degler

Hi, I tried various payloads to boot the system. Filo could not find my hda saying floating bus. Etherboot loads OK and gets a kernel elf image via tftp but kernel is not loading. Do you have an idea what could be the problem? Maybe some PCI-Devices not initialized correctly? VGA-Support is turned off, no pci cards in the slots, 2GB RAM, Using 2.6 static kernel with vga and fb options turned completely off. LinuxBIOS was compiled with gcc (GCC) 3.3.3 (SuSE Linux) and binutils-2.15.90.0.1.1-30 (binutils-32bit-9.1-200404070910) I appended the trace of LinuxBIOS with loglevel 9. thx phil --------- LinuxBIOS-1.1.8_Fallback Mon Mar 27 15:51:01 CEST 2006 starting... i386 console_init report_bist_failure setup_default_resource_map setting up resource map.... 0000c144 <-00000000 0000c14c <-00000001 0000c154 <-00000002 0000c15c <-00000003 0000c164 <-00000004 0000c16c <-00000005 0000c174 <-00000006 0000c17c <-00000007 0000c140 <-00000000 0000c148 <-00000000 0000c150 <-00000000 0000c158 <-00000000 0000c160 <-00000000 0000c168 <-00000000 0000c170 <-00000000 0000c178 <-00000000 0000c184 <-00000000 0000c18c <-00000000 0000c194 <-00000000 0000c19c <-00000000 0000c1a4 <-00000000 0000c1ac <-00000000 0000c1b4 <-00000000 0000c180 <-00000000 0000c188 <-00000000 0000c190 <-00000000 0000c198 <-00000000 0000c1a0 <-00000000 0000c1a8 <-00000000 0000c1b0 <-00000000 0000c1cc <-00000000 0000c1d4 <-00000000 0000c1dc <-00000000 0000c1c8 <-00000000 0000c1d0 <-00000000 0000c1d8 <-00000000 0000c1e4 <-00000000 0000c1e8 <-00000000 0000c1ec <-00000000 done. setup_coherent_ht_domain Enabling routing table for node 00 done. Enabling SMP settings (0,1) link=01 (1,0) link=01 setup_remote_node: done Renaming current temporary node to 01 done. Enabling routing table for node 01 done. 02 nodes initialized. coherent_ht_finalize done needs_reset ht reset - enable_smbus SMBus controller enabled memreset_setup sdram_initialize Ram1.00 setting up CPU00 northbridge registers done. Ram1.01 setting up CPU01 northbridge registers done. Ram2.00 Enabling dual channel memory 200Mhz Interleaved RAM: 0x00100000 KB Ram2.01 Enabling dual channel memory 200Mhz Interleaved RAM: 0x00200000 KB Ram3 ECC enabled ECC enabled Initializing memory: done Initializing memory: done Clearing initial memory region: done Ram4 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. test LinuxBIOS-1.1.8_Fallback Mon Mar 27 15:51:01 CEST 2006 booting... Enumerating buses... scan_static_bus for Root Device PCI_DOMAIN: 0000 enabled APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 0 PCI: 00:18.0 [1022/1100] bus ops PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] ops PCI: 00:18.3 [1022/1103] enabled PCI: devfn 0xc4, bad id 0xffffffff PCI: devfn 0xc5, bad id 0xffffffff PCI: devfn 0xc6, bad id 0xffffffff PCI: devfn 0xc7, bad id 0xffffffff PCI: 00:19.0 [1022/1100] bus ops PCI: 00:19.0 [1022/1100] enabled PCI: 00:19.1 [1022/1101] enabled PCI: 00:19.2 [1022/1102] enabled PCI: 00:19.3 [1022/1103] ops PCI: 00:19.3 [1022/1103] enabled PCI: devfn 0xcc, bad id 0xffffffff PCI: devfn 0xcd, bad id 0xffffffff PCI: devfn 0xce, bad id 0xffffffff PCI: devfn 0xcf, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00040000 malloc 0x00040000 PCI: 01:00.0 [1022/7450] bus ops PCI: 01:00.0 [1022/7450] enabled Capability: 0x08 @ 0xa0 Capability: 0x08 @ 0xb8 flags: 0x8000 Capability: 0x08 @ 0xa0 Capability: 0x08 @ 0xb8 Capability: 0x08 @ 0xc0 flags: 0x0040 PCI: 01:01.0 count: 0002 static_count: 0001 PCI: 01:01.0 [1022/7450] enabled next_unitid: 0003 malloc Enter, size 668, free_mem_ptr 0004029c malloc 0x0004029c PCI: 01:00.0 [1022/7460] bus ops PCI: 01:00.0 [1022/7460] enabled Capability: 0x08 @ 0xc0 flags: 0x0080 PCI: 01:03.0 count: 0004 static_count: 0001 PCI: 01:03.0 [1022/7460] enabled next_unitid: 0007 PCI: pci_scan_bus for bus 1 PCI: devfn 0x0, bad id 0xffffffff PCI: 01:01.0 [1022/7450] enabled malloc Enter, size 668, free_mem_ptr 00040538 malloc 0x00040538 PCI: 01:01.1 [1022/7451] ops PCI: 01:01.1 [1022/7451] enabled PCI: devfn 0xa, bad id 0xffffffff PCI: devfn 0xb, bad id 0xffffffff PCI: devfn 0xc, bad id 0xffffffff PCI: devfn 0xd, bad id 0xffffffff PCI: devfn 0xe, bad id 0xffffffff PCI: devfn 0xf, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 000407d4 malloc 0x000407d4 PCI: 01:02.0 [1022/7450] bus ops PCI: 01:02.0 [1022/7450] enabled malloc Enter, size 668, free_mem_ptr 00040a70 malloc 0x00040a70 PCI: 01:02.1 [1022/7451] ops PCI: 01:02.1 [1022/7451] enabled PCI: devfn 0x12, bad id 0xffffffff PCI: devfn 0x13, bad id 0xffffffff PCI: devfn 0x14, bad id 0xffffffff PCI: devfn 0x15, bad id 0xffffffff PCI: devfn 0x16, bad id 0xffffffff PCI: devfn 0x17, bad id 0xffffffff PCI: 01:03.0 [1022/7460] enabled malloc Enter, size 668, free_mem_ptr 00040d0c malloc 0x00040d0c PCI: 01:04.0 [1022/7468] bus ops PCI: 01:04.0 [1022/7468] enabled malloc Enter, size 668, free_mem_ptr 00040fa8 malloc 0x00040fa8 PCI: 01:04.1 [1022/7469] ops PCI: 01:04.1 [1022/7469] enabled malloc Enter, size 668, free_mem_ptr 00041244 malloc 0x00041244 PCI: 01:04.2 [1022/746a] bus ops PCI: 01:04.2 [1022/746a] enabled malloc Enter, size 668, free_mem_ptr 000414e0 malloc 0x000414e0 PCI: 01:04.3 [1022/746b] bus ops PCI: 01:04.3 [1022/746b] enabled PCI: devfn 0x24, bad id 0x0 malloc Enter, size 668, free_mem_ptr 0004177c malloc 0x0004177c PCI: 01:04.5 [1022/746d] ops PCI: 01:04.5 [1022/746d] enabled malloc Enter, size 668, free_mem_ptr 00041a18 malloc 0x00041a18 PCI: 01:04.6 [1022/746e] ops PCI: 01:04.6 [1022/746e] enabled PCI: devfn 0x27, bad id 0x0 PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff do_pci_scan_bridge for PCI: 01:01.0 PCI: pci_scan_bus for bus 2 PCI: devfn 0x0, bad id 0xffffffff PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00041cb4 malloc 0x00041cb4 PCI: 02:03.0 [8086/1076] enabled malloc Enter, size 668, free_mem_ptr 00041f50 malloc 0x00041f50 PCI: 02:04.0 [8086/1076] enabled malloc Enter, size 668, free_mem_ptr 000421ec malloc 0x000421ec PCI: 02:05.0 [1095/3114] enabled PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff PCI: pci_scan_bus returning with max=02 Capability: 0x07 @ 0xa0 PCI: 02: Conventional PCI do_pci_scan_bridge returns max 2 do_pci_scan_bridge for PCI: 01:02.0 PCI: pci_scan_bus for bus 3 PCI: devfn 0x0, bad id 0xffffffff PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff PCI: pci_scan_bus returning with max=03 Capability: 0x07 @ 0xa0 PCI: 03: 133MHz PCI-X do_pci_scan_bridge returns max 3 do_pci_scan_bridge for PCI: 01:03.0 PCI: pci_scan_bus for bus 4 malloc Enter, size 668, free_mem_ptr 00042488 malloc 0x00042488 PCI: 04:00.0 [1022/7464] bus ops PCI: 04:00.0 [1022/7464] enabled malloc Enter, size 668, free_mem_ptr 00042724 malloc 0x00042724 PCI: 04:00.1 [1022/7464] bus ops PCI: 04:00.1 [1022/7464] enabled malloc Enter, size 668, free_mem_ptr 000429c0 malloc 0x000429c0 PCI: 04:00.2 [1022/7463] ops USB2 disabled. PCI: 04:00.2 [1022/7463] disabled PCI: devfn 0x3, bad id 0xffffffff PCI: devfn 0x4, bad id 0xffffffff PCI: devfn 0x5, bad id 0xffffffff PCI: devfn 0x6, bad id 0xffffffff PCI: devfn 0x7, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00042c5c malloc 0x00042c5c PCI: 04:01.0 [1022/7462] ops PCI: 04:01.0 [1022/7462] enabled PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00042ef8 malloc 0x00042ef8 PCI: 04:06.0 [1002/4752] enabled PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff scan_static_bus for PCI: 04:00.0 scan_static_bus for PCI: 04:00.0 done scan_static_bus for PCI: 04:00.1 scan_static_bus for PCI: 04:00.1 done PCI: pci_scan_bus returning with max=04 do_pci_scan_bridge returns max 4 scan_static_bus for PCI: 01:04.0 scan_static_bus for PCI: 01:04.0 done scan_static_bus for PCI: 01:04.2 scan_static_bus for PCI: 01:04.2 done scan_static_bus for PCI: 01:04.3 scan_static_bus for PCI: 01:04.3 done PCI: pci_scan_bus returning with max=04 PCI: pci_scan_bus returning with max=04 PCI_DOMAIN: 0000 passpw: enabled PCI_DOMAIN: 0000 passpw: enabled APIC_CLUSTER: 0 scanning... PCI: 00:18.3 siblings=0 CPU: APIC: 00 enabled PCI: 00:19.3 siblings=0 CPU: APIC: 01 enabled scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI: 00:18.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 done PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 01:01.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 02:03.0 18 * [0x00000000 - 0x0000003f] io PCI: 02:04.0 18 * [0x00000040 - 0x0000007f] io PCI: 02:05.0 20 * [0x00000080 - 0x0000008f] io PCI: 02:05.0 10 * [0x00000090 - 0x00000097] io PCI: 02:05.0 18 * [0x000000a0 - 0x000000a7] io PCI: 02:05.0 14 * [0x000000b0 - 0x000000b3] io PCI: 02:05.0 1c * [0x000000c0 - 0x000000c3] io PCI: 01:01.0 compute_allocate_io: base: 000000c4 size: 00001000 align: 12 gran: 12 done PCI: 01:01.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 01:01.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 01:01.0 compute_allocate_prefmem: base: fffffffffff00000 size: 00000000 align: 20 gran: 20 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 01:01.0 compute_allocate_prefmem: base: fffffffffff00000 size: 00000000 align: 20 gran: 20 done PCI: 01:01.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] bus 2 prefmem PCI: 01:01.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 02:05.0 30 * [0x00000000 - 0x0007ffff] mem PCI: 02:03.0 10 * [0x00080000 - 0x0009ffff] mem PCI: 02:04.0 10 * [0x000a0000 - 0x000bffff] mem PCI: 02:04.0 14 * [0x000c0000 - 0x000dffff] mem PCI: 02:04.0 30 * [0x000e0000 - 0x000fffff] mem PCI: 02:05.0 24 * [0x00100000 - 0x001003ff] mem PCI: 01:01.0 compute_allocate_mem: base: 00100400 size: 00200000 align: 20 gran: 20 done PCI: 01:03.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 04:06.0 14 * [0x00000000 - 0x000000ff] io PCI: 01:03.0 compute_allocate_io: base: 00000100 size: 00001000 align: 12 gran: 12 done PCI: 01:03.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 01:03.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 01:03.0 compute_allocate_prefmem: base: fff00000 size: 00000000 align: 20 gran: 20 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 01:03.0 compute_allocate_prefmem: base: fff00000 size: 00000000 align: 20 gran: 20 done PCI: 01:03.0 24 <- [0x00fff00000 - 0x00ffefffff] bus 4 prefmem PCI: 01:03.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 04:06.0 10 * [0x00000000 - 0x00ffffff] mem PCI: 04:06.0 30 * [0x01000000 - 0x0101ffff] mem PCI: 04:01.0 30 * [0x01020000 - 0x0102ffff] mem PCI: 04:00.0 10 * [0x01030000 - 0x01030fff] mem PCI: 04:00.1 10 * [0x01031000 - 0x01031fff] mem PCI: 04:01.0 10 * [0x01032000 - 0x01032fff] mem PCI: 04:06.0 18 * [0x01033000 - 0x01033fff] mem PCI: 01:03.0 compute_allocate_mem: base: 01034000 size: 01100000 align: 24 gran: 20 done PCI: 01:04.0 read_resources bus 0 link: 0 PCI: 01:04.0 read_resources bus 0 link: 0 done PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 01:01.0 1c * [0x00000000 - 0x00000fff] io PCI: 01:03.0 1c * [0x00001000 - 0x00001fff] io PCI: 01:04.3 58 * [0x00002000 - 0x000020ff] io PCI: 01:04.5 10 * [0x00002400 - 0x000024ff] io PCI: 01:04.6 10 * [0x00002800 - 0x000028ff] io PCI: 01:04.6 14 * [0x00002c00 - 0x00002c7f] io PCI: 01:04.5 14 * [0x00002c80 - 0x00002cbf] io PCI: 01:04.2 10 * [0x00002cc0 - 0x00002cdf] io PCI: 01:04.1 20 * [0x00002ce0 - 0x00002cef] io PCI: 00:18.0 compute_allocate_io: base: 00002cf0 size: 00003000 align: 12 gran: 12 done PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 01:03.0 20 * [0x00000000 - 0x010fffff] mem PCI: 01:01.0 20 * [0x01100000 - 0x012fffff] mem PCI: 01:01.1 10 * [0x01300000 - 0x01300fff] mem PCI: 01:02.1 10 * [0x01301000 - 0x01301fff] mem PCI: 00:18.0 compute_allocate_mem: base: 01302000 size: 01400000 align: 24 gran: 20 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:18.0 1d2 * [0x00001000 - 0x00003fff] io PCI: 00:18.0 1d8 * [0x00004000 - 0x00003fff] io Root Device compute_allocate_io: base: 00004000 size: 00003c00 align: 12 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:18.3 94 * [0x00000000 - 0x03ffffff] mem PCI: 00:18.0 1a2 * [0x04000000 - 0x053fffff] mem PCI: 00:18.0 1b8 * [0x05400000 - 0x053fffff] prefmem PCI: 00:18.0 1b0 * [0x05400000 - 0x053fffff] mem PCI: 00:18.0 1aa * [0x05400000 - 0x053fffff] prefmem Root Device compute_allocate_mem: base: 05400000 size: 05400000 align: 26 gran: 0 done Done reading resources. Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00003c00 align: 12 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:18.0 1d2 * [0x00001000 - 0x00003fff] io PCI: 00:18.0 1d8 * [0x00004000 - 0x00003fff] io Root Device compute_allocate_io: base: 00004000 size: 00003000 align: 12 gran: 0 done Root Device compute_allocate_mem: base: f8000000 size: 05400000 align: 26 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:18.3 94 * [0xf8000000 - 0xfbffffff] mem PCI: 00:18.0 1a2 * [0xfc000000 - 0xfd3fffff] mem PCI: 00:18.0 1b8 * [0xfd400000 - 0xfd3fffff] prefmem PCI: 00:18.0 1b0 * [0xfd400000 - 0xfd3fffff] mem PCI: 00:18.0 1aa * [0xfd400000 - 0xfd3fffff] prefmem Root Device compute_allocate_mem: base: fd400000 size: 05400000 align: 26 gran: 0 done Root Device assign_resources, bus 0 link: 0 PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:18.0 compute_allocate_io: base: 00004000 size: 00000000 align: 12 gran: 12 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_io: base: 00004000 size: 00000000 align: 12 gran: 12 done PCI: 00:18.0 1d8 <- [0x0000004000 - 0x0000003fff] io <node 0 link 0> PCI: 00:18.0 compute_allocate_prefmem: base: fd400000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_prefmem: base: fd400000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 1b8 <- [0x00fd400000 - 0x00fd3fffff] prefmem <node 0 link 0> PCI: 00:18.0 compute_allocate_mem: base: fd400000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_mem: base: fd400000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 1b0 <- [0x00fd400000 - 0x00fd3fffff] mem <node 0 link 0> PCI: 00:18.0 compute_allocate_io: base: 00001000 size: 00003000 align: 12 gran: 12 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 01:01.0 1c * [0x00001000 - 0x00001fff] io PCI: 01:03.0 1c * [0x00002000 - 0x00002fff] io PCI: 01:04.3 58 * [0x00003000 - 0x000030ff] io PCI: 01:04.5 10 * [0x00003400 - 0x000034ff] io PCI: 01:04.6 10 * [0x00003800 - 0x000038ff] io PCI: 01:04.6 14 * [0x00003c00 - 0x00003c7f] io PCI: 01:04.5 14 * [0x00003c80 - 0x00003cbf] io PCI: 01:04.2 10 * [0x00003cc0 - 0x00003cdf] io PCI: 01:04.1 20 * [0x00003ce0 - 0x00003cef] io PCI: 00:18.0 compute_allocate_io: base: 00003cf0 size: 00003000 align: 12 gran: 12 done PCI: 00:18.0 1d2 <- [0x0000001000 - 0x0000003fff] io <node 0 link 2> PCI: 00:18.0 compute_allocate_prefmem: base: fd400000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 00:18.0 compute_allocate_prefmem: base: fd400000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 1aa <- [0x00fd400000 - 0x00fd3fffff] prefmem <node 0 link 2> PCI: 00:18.0 compute_allocate_mem: base: fc000000 size: 01400000 align: 24 gran: 20 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 01:03.0 20 * [0xfc000000 - 0xfd0fffff] mem PCI: 01:01.0 20 * [0xfd100000 - 0xfd2fffff] mem PCI: 01:01.1 10 * [0xfd300000 - 0xfd300fff] mem PCI: 01:02.1 10 * [0xfd301000 - 0xfd301fff] mem PCI: 00:18.0 compute_allocate_mem: base: fd302000 size: 01400000 align: 24 gran: 20 done PCI: 00:18.0 1a2 <- [0x00fc000000 - 0x00fd3fffff] mem <node 0 link 2> PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:18.0 assign_resources, bus 1 link: 2 PCI: 01:01.0 compute_allocate_io: base: 00001000 size: 00001000 align: 12 gran: 12 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 02:03.0 18 * [0x00001000 - 0x0000103f] io PCI: 02:04.0 18 * [0x00001040 - 0x0000107f] io PCI: 02:05.0 20 * [0x00001080 - 0x0000108f] io PCI: 02:05.0 10 * [0x00001090 - 0x00001097] io PCI: 02:05.0 18 * [0x000010a0 - 0x000010a7] io PCI: 02:05.0 14 * [0x000010b0 - 0x000010b3] io PCI: 02:05.0 1c * [0x000010c0 - 0x000010c3] io PCI: 01:01.0 compute_allocate_io: base: 000010c4 size: 00001000 align: 12 gran: 12 done PCI: 01:01.0 1c <- [0x0000001000 - 0x0000001fff] bus 2 io PCI: 01:01.0 compute_allocate_mem: base: fd100000 size: 00200000 align: 20 gran: 20 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 02:05.0 30 * [0xfd100000 - 0xfd17ffff] mem PCI: 02:03.0 10 * [0xfd180000 - 0xfd19ffff] mem PCI: 02:04.0 10 * [0xfd1a0000 - 0xfd1bffff] mem PCI: 02:04.0 14 * [0xfd1c0000 - 0xfd1dffff] mem PCI: 02:04.0 30 * [0xfd1e0000 - 0xfd1fffff] mem PCI: 02:05.0 24 * [0xfd200000 - 0xfd2003ff] mem PCI: 01:01.0 compute_allocate_mem: base: fd200400 size: 00200000 align: 20 gran: 20 done PCI: 01:01.0 20 <- [0x00fd100000 - 0x00fd2fffff] bus 2 mem PCI: 01:01.0 assign_resources, bus 2 link: 0 PCI: 02:03.0 10 <- [0x00fd180000 - 0x00fd19ffff] mem PCI: 02:03.0 18 <- [0x0000001000 - 0x000000103f] io PCI: 02:04.0 10 <- [0x00fd1a0000 - 0x00fd1bffff] mem PCI: 02:04.0 14 <- [0x00fd1c0000 - 0x00fd1dffff] mem PCI: 02:04.0 18 <- [0x0000001040 - 0x000000107f] io PCI: 02:04.0 30 <- [0x00fd1e0000 - 0x00fd1fffff] romem PCI: 02:05.0 10 <- [0x0000001090 - 0x0000001097] io PCI: 02:05.0 14 <- [0x00000010b0 - 0x00000010b3] io PCI: 02:05.0 18 <- [0x00000010a0 - 0x00000010a7] io PCI: 02:05.0 1c <- [0x00000010c0 - 0x00000010c3] io PCI: 02:05.0 20 <- [0x0000001080 - 0x000000108f] io PCI: 02:05.0 24 <- [0x00fd200000 - 0x00fd2003ff] mem PCI: 02:05.0 30 <- [0x00fd100000 - 0x00fd17ffff] romem PCI: 01:01.0 assign_resources, bus 2 link: 0 PCI: 01:01.1 10 <- [0x00fd300000 - 0x00fd300fff] mem64 PCI: 01:02.1 10 <- [0x00fd301000 - 0x00fd301fff] mem64 PCI: 01:03.0 compute_allocate_io: base: 00002000 size: 00001000 align: 12 gran: 12 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 04:06.0 14 * [0x00002000 - 0x000020ff] io PCI: 01:03.0 compute_allocate_io: base: 00002100 size: 00001000 align: 12 gran: 12 done PCI: 01:03.0 1c <- [0x0000002000 - 0x0000002fff] bus 4 io PCI: 01:03.0 compute_allocate_mem: base: fc000000 size: 01100000 align: 24 gran: 20 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 04:06.0 10 * [0xfc000000 - 0xfcffffff] mem PCI: 04:06.0 30 * [0xfd000000 - 0xfd01ffff] mem PCI: 04:01.0 30 * [0xfd020000 - 0xfd02ffff] mem PCI: 04:00.0 10 * [0xfd030000 - 0xfd030fff] mem PCI: 04:00.1 10 * [0xfd031000 - 0xfd031fff] mem PCI: 04:01.0 10 * [0xfd032000 - 0xfd032fff] mem PCI: 04:06.0 18 * [0xfd033000 - 0xfd033fff] mem PCI: 01:03.0 compute_allocate_mem: base: fd034000 size: 01100000 align: 24 gran: 20 done PCI: 01:03.0 20 <- [0x00fc000000 - 0x00fd0fffff] bus 4 mem PCI: 01:03.0 assign_resources, bus 4 link: 0 PCI: 04:00.0 10 <- [0x00fd030000 - 0x00fd030fff] mem PCI: 04:00.1 10 <- [0x00fd031000 - 0x00fd031fff] mem PCI: 04:01.0 10 <- [0x00fd032000 - 0x00fd032fff] mem PCI: 04:01.0 30 <- [0x00fd020000 - 0x00fd02ffff] romem PCI: 04:06.0 10 <- [0x00fc000000 - 0x00fcffffff] mem PCI: 04:06.0 14 <- [0x0000002000 - 0x00000020ff] io PCI: 04:06.0 18 <- [0x00fd033000 - 0x00fd033fff] mem PCI: 04:06.0 30 <- [0x00fd000000 - 0x00fd01ffff] romem PCI: 01:03.0 assign_resources, bus 4 link: 0 PCI: 01:04.1 20 <- [0x0000003ce0 - 0x0000003cef] io PCI: 01:04.2 10 <- [0x0000003cc0 - 0x0000003cdf] io PCI: 01:04.3 58 <- [0x0000003000 - 0x00000030ff] io PCI: 01:04.5 10 <- [0x0000003400 - 0x00000034ff] io PCI: 01:04.5 14 <- [0x0000003c80 - 0x0000003cbf] io PCI: 01:04.6 10 <- [0x0000003800 - 0x00000038ff] io PCI: 01:04.6 14 <- [0x0000003c00 - 0x0000003c7f] io PCI: 00:18.0 assign_resources, bus 1 link: 2 PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> PCI: 00:19.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resourcess... PCI: 00:18.0 cmd <- 140 PCI: 00:00.0 missing enable_resources PCI: 00:00.1 missing enable_resources PCI: 00:01.0 missing enable_resources PCI: 00:01.1 missing enable_resources PCI: 00:00.0 missing enable_resources PCI: 00:01.0 missing enable_resources PCI: 00:01.1 missing enable_resources PCI: 00:01.2 missing enable_resources PCI: 00:01.3 missing enable_resources PCI: 01:01.0 bridge ctrl <- 0003 PCI: 01:01.0 cmd <- 147 PCI: 02:03.0 cmd <- 143 PCI: 02:04.0 cmd <- 143 PCI: 02:05.0 cmd <- 143 PCI: 01:01.1 cmd <- 146 PCI: 01:02.1 cmd <- 146 PCI: 01:03.0 bridge ctrl <- 0003 PCI: 01:03.0 cmd <- 147 PCI: 04:00.0 cmd <- 142 PCI: 04:00.1 cmd <- 142 PCI: 04:01.0 cmd <- 142 PCI: 04:06.0 cmd <- 1c3 PCI: 01:04.0 cmd <- 14f PCI: 01:04.1 cmd <- 141 PCI: 01:04.2 cmd <- 141 PCI: 01:04.3 cmd <- 141 PCI: 01:04.5 cmd <- 141 PCI: 01:04.6 cmd <- 141 PCI: 00:18.1 subsystem <- 161f/3017 PCI: 00:18.1 cmd <- 140 PCI: 00:18.2 subsystem <- 161f/3017 PCI: 00:18.2 cmd <- 140 PCI: 00:18.3 cmd <- 140 PCI: 00:19.0 cmd <- 140 PCI: 00:19.1 subsystem <- 161f/3017 PCI: 00:19.1 cmd <- 140 PCI: 00:19.2 subsystem <- 161f/3017 PCI: 00:19.2 cmd <- 140 PCI: 00:19.3 cmd <- 140 done. Initializing devices... Root Device init PCI: 00:18.0 init PCI: 00:18.1 init PCI: 00:18.2 init PCI: 00:18.3 init NB: Function 3 Misc Control.. done. PCI: 00:19.0 init PCI: 00:19.1 init PCI: 00:19.2 init PCI: 00:19.3 init NB: Function 3 Misc Control.. done. APIC_CLUSTER: 0 init Initializing CPU #0 CPU: vendor AMD device f5a Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB ADDRESS_MASK_HIGH=0xff DONE variable MTRRs Clear out the extra MTRR's ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled microcode: equivalent processor rev id = 0x004a, patch id = 0x00000000 microcode: patch id that want to apply= 0x00000047 microcode: updated to patch id = 0x00000047 success Setting up local apic... apic_id: 0 done. Clearing memory 1024K - 1048576K: --------------- done CPU #0 Initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +start_eip=0x00010000 #startup loops: 2. Sending STARTUP #1 to 1. After apic_write. Initializing CPU #1 Startup point 1. Waiting for send to finish... +CPU: vendor AMD device f5a Sending STARTUP #2 to 1. After apic_write. Enabling cache at rSteutpt ipnogi nfti x1e.d fMWTaRiRtsi(n0g- 8f8o)r tsyepned: tUoC inish... fAfter SSteatrttiunpg. RiWxaeidt iMnTgR Rfso(r0 -11 6C)P UTSy pteo: sWtBo,p dMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB ADDRESS_MASK_HIGH=0xff DONE variable MTRRs Clear out the extra MTRR's ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled microcode: equivalent processor rev id = 0x004a, patch id = 0x00000000 microcode: patch id that want to apply= 0x00000047 microcode: updated to patch id = 0x00000047 success Setting up local apic... apic_id: 1 done. Clearing memory 1048576K - 2097152K: ---------------- done CPU #1 Initialized All AP CPUs stopped PCI: 01:01.0 init PCI: 01:03.0 init PCI: 01:04.0 init for IRQ, reg 0x00000000 value 0x00000700 0x00000000 for IRQ, reg 0x00000001 value 0x00010000 0x00000000 for IRQ, reg 0x00000002 value 0x00010000 0x00000000 for IRQ, reg 0x00000003 value 0x00010000 0x00000000 for IRQ, reg 0x00000004 value 0x00010000 0x00000000 for IRQ, reg 0x00000005 value 0x00010000 0x00000000 for IRQ, reg 0x00000006 value 0x00010000 0x00000000 for IRQ, reg 0x00000007 value 0x00010000 0x00000000 for IRQ, reg 0x00000008 value 0x00010000 0x00000000 for IRQ, reg 0x00000009 value 0x00010000 0x00000000 for IRQ, reg 0x0000000a value 0x00010000 0x00000000 for IRQ, reg 0x0000000b value 0x00010000 0x00000000 for IRQ, reg 0x0000000c value 0x00010000 0x00000000 for IRQ, reg 0x0000000d value 0x00010000 0x00000000 for IRQ, reg 0x0000000e value 0x00010000 0x00000000 for IRQ, reg 0x0000000f value 0x00010000 0x00000000 for IRQ, reg 0x00000010 value 0x00010000 0x00000000 for IRQ, reg 0x00000011 value 0x00010000 0x00000000 for IRQ, reg 0x00000012 value 0x00010000 0x00000000 for IRQ, reg 0x00000013 value 0x00010000 0x00000000 for IRQ, reg 0x00000014 value 0x00010000 0x00000000 for IRQ, reg 0x00000015 value 0x00010000 0x00000000 for IRQ, reg 0x00000016 value 0x00010000 0x00000000 for IRQ, reg 0x00000017 value 0x00010000 0x00000000 RTC Init RTC: Checksum invalid zeroing cmos Invalid CMOS LB checksum enabling HPET @0xfed00000 PCI: 01:04.1 init PCI: 01:04.3 init set power on after power fail PCI: 02:03.0 init PCI: 02:04.0 init PCI: 02:05.0 init PCI: 04:01.0 init Reseting PHY... Done PCI: 04:06.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 done. Wrote the mp table end at: 00000020 - 0000021c Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 00000df8 checksum 5f51 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 33:stream_init() - rom_stream: 0xfffd0000 - 0xfffdee87 Found ELF candiate at offset 0 header_offset is 0 Try to load at offset 0x0 n_type: 00000001 n_name(8): ELFBoot n_desc(10): Etherboot n_type: 00000002 n_name(8): ELFBoot n_desc(6): 5.2.6 Loading Etherboot version: 5.2.6 Dropping non PT_LOAD segment malloc Enter, size 32, free_mem_ptr 00043194 malloc 0x00043194 New segment addr 0x20000 size 0x18024 offset 0xb0 filesize 0x891c (cleaned up) New segment addr 0x20000 size 0x18024 offset 0xb0 filesize 0x891c lb: [0x0000000000004000, 0x000000000004e000) segment: [0x0000000000020000, 0x000000000002891c, 0x0000000000038024) bounce: [0x000000007ff88000, 0x000000007ff9091c, 0x000000007ffa0024) Loading Segment: addr: 0x000000007ff88000 memsz: 0x0000000000018024 filesz: 0x000000000000891c [ 0x000000007ff88000, 000000007ff9091c, 0x000000007ffa0024) <- 00000000000000b0 Clearing Segment: addr: 0x000000007ff9091c memsz: 0x000000000000f708 Loaded segments verified segments closed down stream Jumping to boot code at 0x20000 entry = 0x00020000 lb_start = 0x00004000 lb_size = 0x0004a000 adjust = 0x7ffb2000 buffer = 0x7ff6c000 elf_boot_notes = 0x0001b160 adjusted_boot_notes = 0x7ffcd160 ROM segment 0x0000 length 0x0000 reloc 0x00020000 CPU 2088 Mhz Etherboot 5.2.6 (GPL) http://etherboot.org Tagged ELF for [E1000] Relocating _text from: [00020000,00039710) to [7fee68f0,7ff00000) Boot from (N)etwork or (Q)uit? N .Probing pci nic... [e1000-82541gi]Ethernet addr: 00:D0:68:09:EC:FD e1000: Valid Link not detected [e1000-82541gi]Ethernet addr: 00:D0:68:09:EC:FE Searching for server (DHCP)... ...Me: xxx.xxx.xxx.xxx, Server: 134.155.45.16, Gateway xxx.xxx.xxx.xxx Loading xxx.xxx.xxx.xxx:/htxlinux.0 ... (ELF)... ............................................................................................................. ........................................................................................................................................................... ........................................................................................................................................................... ........................................................................................................................................................... ........................................................................................................................................................... ...................................................................done Firmware type: LinuxBIOS

13 years

2
2
0 / 0

Re: [LinuxBIOS] Support for AM2 processors?

by Lu, Yinghai

The support code is done, and will be released to public tree after the CPU is released to public. YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Carl-Daniel Hailfinger Sent: Wednesday, April 19, 2006 4:35 PM To: linuxbios(a)linuxbios.org Subject: [LinuxBIOS] Support for AM2 processors? Hi, since the upcoming AM2 processors will have a new (DDR2) memory controller, does that mean the RAM initialization has to be rewritten completely? If so, is there any expected time when LinuxBIOS support for these processors will be available? Regards, Carl-Daniel -- http://www.hailfinger.org/ -- linuxbios mailing list linuxbios(a)linuxbios.org http://www.openbios.org/mailman/listinfo/linuxbios

13 years, 1 month

2
1
0 / 0

[LinuxBIOS] EPIA non-M?

by Alex L. Mauer

What's the current status of LinuxBIOS on plain EPIA boards? It seems to be very unclear. The "Supported motherboards" Wiki page lists it, but has a lot of "???". The build tutorial page -- like all the others -- links to nothing. The FreeBIOS howto says it doesn't have VGA support, though that is of course two years out of date. When I build it, the generated BIOS image is 256k -- which doesn't leave space to prepend a VGA BIOS. So is the status of LinuxBIOS on these boards the same as it was with FreeBIOS 2 years ago? Thanks -Alex Mauer "hawke"

13 years, 2 months

4
12
0 / 0

Re: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

by Goodrich,Steven

Hmm... Let me back up a step. I'm apparently answering a question you're not asking. Your problem is that you want to disable the internal video (and PCI header) and use external, right? Is that it? -- Steve G. Steve Goodrich (Steven.Goodrich(a)amd.com) Advanced Micro Devices, Inc. -----Original Message----- From: Richard Smith [mailto:smithbone@gmail.com] Sent: Thursday, April 27, 2006 4:11 PM To: Goodrich,Steven Cc: LinuxBIOS Subject: Re: [LinuxBIOS] MB1030 / 3036 VGA comes up :D On 4/27/06, Goodrich,Steven <steven.goodrich(a)amd.com> wrote: > We have an older board (from before I came to be with AMD) which was built with a GXm, CS5530, and NSC 97317 SIO. I can pull preferred register settings from a document if that would help. Yes those would probally help.. > Our preferred settings for this platform were: > > BC_XMAP_1 = 0x1300C060 > BC_XMAP_2 = 0x09999999 > BC_XMAP_3 = 0x99****99 (* = don't care) Or perhpaps just confuse things more. 9's in XMAP2 is PCI accessable, No Cache, No Write, Read. I'm not sure how you would load the shadow copy of the bios into this range with write disabled . Until we started setting the write bit for these ranges the emulator was getting all 0xFFs for its data. > Are you loading an SMM handler on this platform? Dosen't look like it. Is that a big problem? I know for the gx2 it's a big issue since it dosen't have PCI config space without it. But this part seems to have PCI config method #1 without SMM. -- Richard A. Smith

13 years, 2 months

10
148
0 / 0

[LinuxBIOS] etherboot/filo + sata startup timing

by Ward Vandewege

Hi YH and list, I've been playing with the boot prompt timeouts for Etherboot/filo on my setup. I've noticed that if I set the combined timeout (the etherboot ASK_BOOT and filo AUTOBOOT_DELAY) to less than about 3 seconds, the system won't boot because filo doesn't see the SATA drives. This example has ASK_BOOT set to -1 (i.e. disabled), and AUTOBOOT_DELAY set to 2 seconds. --------------------------- Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 33:stream_init() - rom_stream: 0xfffc0000 - 0xfffdffff Found ELF candiate at offset 0 Loading Etherboot version: 5.4.1 Dropping non PT_LOAD segment New segment addr 0x10000 size 0x49090 offset 0x0 filesize 0xf7f0 (cleaned up) New segment addr 0x10000 size 0x49090 offset 0x0 filesize 0xf7f0 Loading Segment: addr: 0x00000000bff90000 memsz: 0x0000000000032000 filesz: 0x000000000000f7f0 Clearing Segment: addr: 0x00000000bff9f7f0 memsz: 0x0000000000022810 Loading Segment: addr: 0x0000000000042000 memsz: 0x0000000000017090 filesz: 0x0000000000000000 Clearing Segment: addr: 0x0000000000042000 memsz: 0x0000000000017090 Jumping to boot code at 0x100b0 CPU 2064 Mhz Etherboot 5.4.1 (GPL) http://etherboot.org Drivers: TG3 FILO Images: NBI ELF Protocols: DHCP TFTP Relocating _text from: [000100e0,00059090) to [bfeb7050,bff00000) Probing pci disk... [FILO]FILO version 0.4.1 (root(a)countzero.vandewege.net) Fri Apr 21 18:47:00 EDT 2006 Press <Enter> for default boot, or <Esc> for boot prompt... 2^H ^H1^H ^Htimed out boot: hde1:/linuxbios.elf No drive detected on IDE channel 2 boot: hde1:/linuxbios.elf^H ^H^H ^Hlf Drive 4 does not exist boot: hde1:/linuxbios.elf --------------------------- This is only a problem for a cold boot, i.e. from power off. If I do a warm reboot, the system boots fine. Is there something that can be done about this? It seems silly to have to introduce delays in the bootup sequence to make booting from SATA possible, particularly since fast bootup is one of LinuxBIOS's strengths. Thanks, Ward. -- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior System Administrator

13 years, 2 months

4
17
0 / 0

Re: [LinuxBIOS] some more tyan/s2881 questions

by Lu, Yinghai

1. need to add acpi support in s2881 LinuxBIOS support to get it. Anyway 8111 acpi support is already there in Serengeti_leopard, so it will be easy to get that. YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Ward Vandewege Sent: Monday, April 10, 2006 3:43 PM To: linuxbios(a)linuxbios.org Subject: [LinuxBIOS] some more tyan/s2881 questions So the board is stable now. That's great. Some observations: 1. 'halt' no longer powers the machine off, which it does with the proprietary bios. 'halt -p' does the job though. LinuxBIOS oddity? 2. reboots seem to cause problems sometimes. I'm not sure yet what causes this, but I've had problems with the machine hanging after ACPI: Unable to locate RSDP It normally sits there for a few seconds, but I had the machine in such a state that it simply hung at that point. This may have had something to do with the IPMI card, which I'm experimenting with. I had to unplug the power before this problem went away, a cold restart didn't help. I will do more testing to see if I can pinpoint this. Thanks for all your help so far! Ward. -- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior System Administrator -- linuxbios mailing list linuxbios(a)linuxbios.org http://www.openbios.org/mailman/listinfo/linuxbios

13 years, 2 months

3
8
0 / 0

[LinuxBIOS] Epia ML 5000 VGA (Again!) -- Moving backwards, somehow.

by Eric Poulsen

I've been trying to accomplish several things: 1) LB on Via Epia ML 5000 2) VGA working 3) Figuring out weird boot errors that seem to be "fixed" by the factory BIOS. Running memtest86+ under LB. I _was_ on step 3, but in the course of events, I went back to step 2. VGA is now NOT working again, but with a different error; see below. Since I was messing around with making an ML tree, adding a bit of custom stuff, and removing initializations for devices that don't exist on the ML (floppy, CF reader), I figured I had done something wrong. Soooo, I went back to the "stock" LinuxBIOSv2, revision 2100, known to work with the Epia M. This particular revision worked for me, albeit with the long delay at the beginning because of the firewire search. Essentially, whenever, I add ... #VGA Console option CONFIG_CONSOLE_VGA=1 option CONFIG_PCI_ROM_RUN=1 ... to the Config.lb, it doesn't work, giving the error below. Mysteriously, my "weird boot crashes that are fixed by factory CMOS" problems aren't exhibiting themselves. Unfortunately, I cannot run memtest86 under LB without VGA. Any ideas? -------------------------------------------------------------------- 0 LinuxBIOS-1.1.8.0Fallback Sat Apr 29 22:12:48 PDT 2006 starting... Enabling mainboard devices Enabling shadow ram vt8623 init starting Detecting Memory Number of Banks 04 Number of Rows 0d Priamry DRAM width08 No Columns 0a MA type e0 Bank 0 (*16 Mb) 10 No Physical Banks 01 Total Memory (*16 Mb) 10 CAS Supported 2 2.5 3 Cycle time at CL X (nS)50 Cycle time at CL X-0.5 (nS)60 Cycle time at CL X-1 (nS)75 Starting at CAS 3 We can do CAS 2.5 We can do CAS 2 tRP 48 tRCD 48 tRAS 28 Low Bond 00 High Bondbe Setting DQS delay7evt8623 done 00:06 11 23 31 06 00 30 22 00 00 00 06 00 00 00 00 10:08 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 00 20:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30:00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40:00 18 88 80 82 44 00 00 18 99 88 80 82 44 00 00 50:c8 de cf 88 e0 07 00 00 e0 00 10 10 10 10 00 00 60:02 ff 00 30 d6 32 01 2a 42 2d 43 58 00 44 00 00 70:82 48 00 01 01 08 50 00 01 00 00 00 00 00 00 02 80:0f 65 00 00 80 00 00 00 02 00 00 00 00 00 00 00 90:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0:02 c0 20 00 07 02 00 1f 04 00 00 00 2f 02 04 00 b0:00 00 00 00 80 00 00 00 88 00 00 00 00 00 00 00 c0:01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0:00 dd 00 00 00 00 01 00 40 00 00 00 00 00 00 00 f0:00 00 00 00 00 00 12 13 00 00 00 00 00 00 00 00 AGP Doing MTRR init. Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.1.8.0Fallback Sat Apr 29 22:12:48 PDT 2006 booting... clocks_per_usec: 838 Enumerating buses... Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled APIC_CLUSTER: 0 enabled PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1106/3123] enabled PCI: 00:01.0 [1106/b091] enabled Disabling static device: PCI: 00:0a.0 Disabling static device: PCI: 00:0a.1 In vt8235_enable 1106 3038. PCI: 00:10.0 [1106/3038] enabled In vt8235_enable 1106 3038. PCI: 00:10.1 [1106/3038] enabled In vt8235_enable 1106 3038. PCI: 00:10.2 [1106/3038] enabled In vt8235_enable 1106 3104. PCI: 00:10.3 [1106/3104] enabled In vt8235_enable 1106 3177. Initialising Devices PCI: 00:11.0 [1106/3177] enabled In vt8235_enable 1106 0571. PCI: 00:11.1 [1106/0571] enabled In vt8235_enable 1106 3059. PCI: 00:11.5 [1106/3059] enabled In vt8235_enable ffff ffff. In vt8235_enable 1106 3065. PCI: 00:12.0 [1106/3065] enabled PCI: pci_scan_bus for bus 1 PCI: 01:00.0 [1106/3122] enabled PCI: pci_scan_bus returning with max=01 vt1211 enabling PNP devices. PNP: 002e.0 enabled vt1211 enabling PNP devices. PNP: 002e.1 enabled vt1211 enabling PNP devices. PNP: 002e.2 enabled vt1211 enabling PNP devices. PNP: 002e.3 enabled vt1211 enabling PNP devices. PNP: 002e.b enabled PCI: pci_scan_bus returning with max=01 done Allocating resources... Reading resources... Done reading resources. Allocating VGA resource PCI: 01:00.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... I would set ram size to 0x40000 Kbytes PCI: 00:10.0 20 <- [0x0000001800 - 0x000000181f] io PCI: 00:10.1 20 <- [0x0000001820 - 0x000000183f] io PCI: 00:10.2 20 <- [0x0000001840 - 0x000000185f] io PCI: 00:10.3 10 <- [0x00febff000 - 0x00febff0ff] mem PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] io PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] irq PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] drq PNP: 002e.1 60 <- [0x0000000378 - 0x000000037f] io PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] irq PNP: 002e.1 74 <- [0x0000000003 - 0x0000000003] drq PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] io PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] irq PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] io PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] irq PNP: 002e.b 60 <- [0x000000ec00 - 0x000000ecff] io PCI: 00:11.1 20 <- [0x0000001860 - 0x000000186f] io PCI: 00:11.5 10 <- [0x0000001000 - 0x00000010ff] io PCI: 00:12.0 10 <- [0x0000001400 - 0x00000014ff] io PCI: 00:12.0 14 <- [0x00fec00000 - 0x00fec000ff] mem Done setting resources. Done allocating resources. Enabling resourcess... PCI: 00:00.0 cmd <- 146 PCI: 00:01.0 bridge ctrl <- 000f PCI: 00:01.0 cmd <- 147 PCI: 01:00.0 cmd <- 143 PCI: 00:10.0 subsystem <- 00/00 PCI: 00:10.0 cmd <- 141 PCI: 00:10.1 subsystem <- 00/00 PCI: 00:10.1 cmd <- 141 PCI: 00:10.2 subsystem <- 00/00 PCI: 00:10.2 cmd <- 141 PCI: 00:10.3 subsystem <- 00/00 PCI: 00:10.3 cmd <- 142 PCI: 00:11.0 cmd <- 147 PNP: 002e.0 - enabling PNP: 002e.1 - enabling PNP: 002e.2 - enabling PNP: 002e.3 - enabling PNP: 002e.b - enabling PCI: 00:11.1 cmd <- 147 PCI: 00:11.5 subsystem <- 00/00 PCI: 00:11.5 cmd <- 141 PCI: 00:12.0 cmd <- 1c3 done. Initializing devices... Root Device init PCI: 00:10.0 init PCI: 00:10.1 init PCI: 00:10.2 init PCI: 00:10.3 init PCI: 00:11.0 init vt8235 init RTC Init Invalid CMOS LB checksum pci_routing_fixup: dev is 0001ad40 setting firewire setting usb Assigning IRQ 5 to 0:10.0 Readback = 5 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 Assigning IRQ 9 to 0:10.1 Readback = 9 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 Assigning IRQ 9 to 0:10.2 Readback = 9 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 Assigning IRQ 5 to 0:10.3 Readback = 5 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 setting vt8235 Assigning IRQ 5 to 0:11.1 Readback = 5 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 Assigning IRQ 9 to 0:11.5 Readback = 9 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 setting ethernet Assigning IRQ 5 to 0:12.0 Readback = 5 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 setting vga Assigning IRQ 5 to 1:0.0 Readback = 5 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 setting pci slot setting cardbus slot setting riser slot PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.3 init PNP: 002e.b init PCI: 00:11.1 init Enabling VIA IDE. ide_init: enabling compatibility IDE addresses enables in reg 0x42 0x0 enables in reg 0x42 read back as 0x0 enables in reg 0x40 0x13 enables in reg 0x40 read back as 0x13 enables in reg 0x9 0x8a enables in reg 0x9 read back as 0x8a command in reg 0x4 0x7 command in reg 0x4 reads back as 0x7 PCI: 00:11.5 init PCI: 00:12.0 init Configuring VIA Rhine LAN APIC_CLUSTER: 0 init Initializing CPU #0 CPU: vendor Centaur device 673 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB Setting fixed MTRRs(24-88) Type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 128MB, type WB Setting variable MTRR 1, base: 128MB, range: 64MB, type WB Setting variable MTRR 2, base: 192MB, range: 32MB, type WB DONE variable MTRRs Clear out the extra MTRR's MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Disabling local apic...done. CPU #0 Initialized PCI: 00:00.0 init VT8623 random fixup ... Frame buffer at d0000000 PCI: 00:01.0 init VT8623 AGP random fixup ... PCI: 01:00.0 init VGA random fixup ... INSTALL REAL-MODE IDT DO THE VGA BIOS found VGA: vid=1106, did=3122 rom base, size: fffc0000 write_protect_vgabios bus/devfn = 0x100 Unexpected Exception: 13 @ 10:000121c3 - Halting Code: 0 eflags: 00010012 eax: 00000012 ebx: 00024530 ecx: 00023fa8 edx: 00000012 edi: 00018a90 esi: ffff946b ebp: 00023f84 esp: 00023f84

13 years, 2 months

5
15
0 / 0

[LinuxBIOS] [FEATURE] payload compression

by Stefan Reinauer

Hi, while I've been working on FILO and OpenBIOS lately I really wished that they could be used as nrv2b compressed payload, like its possible with etherboot. Since etherboot is probably not going to be developed beyond v5.5 and because the zelf support in etherboot is really ugly, I thought of an alternative to support compressed payloads easily. So I wrote a new stream which can be enabled by using CONFIG_COMPRESSED_ROM_STREAM instead of CONFIG_ROM_STREAM. When you enable CONFIG_COMPRESSED_ROM_STREAM, the payload you specify will completely automatically be compressed during the build stage, so you don't have to do anything except safe space with a few small changes. Stefan -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/

13 years, 2 months

2
7
0 / 0

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot April 2006