coreboot March 2023

coreboot@coreboot.org

40 participants
38 discussions

[coreboot - Bug #475] (New) mainboard_vbt_filename() in src/mainboard/lenovo/x200/blc.c does not work as intended
by Bill XIE 14 May '23

14 May '23

Issue #475 has been reported by Bill XIE. ---------------------------------------- Bug #475: mainboard_vbt_filename() in src/mainboard/lenovo/x200/blc.c does not work as intended https://ticket.coreboot.org/issues/475 * Author: Bill XIE * Status: New * Priority: Normal * Assignee: Arthur Heymans * Category: board support * Target version: master * Start date: 2023-03-30 * Affected versions: 4.15, 4.16, 4.17, 4.18, 4.19, master * Affected hardware: x200 ---------------------------------------- Date back to coreboot 4.9, mainboard_vbt_filename() in src/mainboard/lenovo/x200/blc.c calls get_blc_pwm_freq_value(NULL), making the following if condition always falling to the first, not to mention null dereference on strcmp() in get_blc_pwm_freq_value(). In order to determine the correct vbt filename at runtime, edid ascii string should be obtained first. This issue may be distantly related to #474. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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Coreboot chat room
by Arne 23 Apr '23

23 Apr '23

Hi, I just created a XMPP chat room about coreboot on our public XMPP server and I would be happy to make it to an official coreboot chatroom. The server is running since 2,5 years and will stay online for at least the next years. Maybe you like to join. So the main question is, can I write in the chatroom description "official coreboot chatroom"? I would also offer the coreboot delevopers a free XMPP chat account on https://ocean.monocles.de/apps/registration/ or https://ocean.monocles.eu/apps/registration/ Thanks for your project and best regards, Arne

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Support Question: "overflow detected" error message on start up (boothole?)
by illuviadeoro＠tutanota.com 20 Apr '23

20 Apr '23

Please tell me who I should contact if the following support question should be directed elsewhere. I have a System 76 computer with coreboot installed. A fine print error message flashes that an "overflow" is detected and I think the file path has "grub" in it. Brief flash, can't see. Is this the boothole vulnerability? It is in the firmware or coreboot, not on a disk grub. I have multiple OS and the message appears independently of loading a particular hard disk, although I have Fedora with the community copr installed on my primary disk. Thanks!

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request for support new hardware from coreboot
by Artem 12 Apr '23

12 Apr '23

Hello Im Artem from Khadas https://www.khadas.com/ We developing new product our hardware based on: Alder Lake ULT 12th Gen Intel Core i7-1280P We have plans to use coreboot as alternative bootloader for our new product We need some information about: 1) coreboot possibilities for current hardware 2) estimated time to create some initial workable prototype 3) what information we need provide for your side at this moment we use BIOS from AMI: Vendor: Amerian Megatrends Core Verion: 5.27 Compiancy: UEFI 2.8; PI 1.7 etc... About us We are Shenzhen Wesion Technology Co., Ltd is the company that owns the brand "Khadas", our company was founded on 5 November 2014. We focus on developing, manufacturing and marketing single board computers (SBCs) ... more info https://www.khadas.com/about Best regards Artem

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[coreboot - Feature #476] (New) Add option to convert coreboot-inited linear frame buffer to efifb directly
by Bill XIE 06 Apr '23

06 Apr '23

Issue #476 has been reported by Bill XIE. ---------------------------------------- Feature #476: Add option to convert coreboot-inited linear frame buffer to efifb directly https://ticket.coreboot.org/issues/476 * Author: Bill XIE * Status: New * Priority: Normal * Category: coreboot common code * Target version: none * Start date: 2023-03-30 * Affected OS: GNU/Linux ---------------------------------------- Currently, the linear frame buffer that coreboot initializes should be handled by Linux kernel with dedicated driver "simplefb", but most installer of GNU/Linux distributions only enables "efifb" support, which causes a GNU/Linux installer kexec-ed from a Linux payload running atop simplefb unable to output graphics. Currently, Grub payload could turn coreboot-initialized simplefb to efifb, which can be easily examined from the dmesg log of GNU/Linux booted from Grub payload running atop coreboot-inited linear frame buffer (simplefb). Chainloading a Linux payload with a minimal Grub payload only containing module "linux" and "cbfs" could make the Linux payload running atop efifb, of which GNU/Linux installers can make use, but the related code could be ported to coreboot to make things easier. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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GSoC 23 - Contributor Introduction
by Utkarsh Verma 02 Apr '23

02 Apr '23

Dear all, My name is Utkarsh Verma and I am a final-year undergraduate student. I want to participate in this year's GSoC and contribute to coreboot. This is not the first time I've found out about the coreboot project. I stumbled upon it last year when I wished to change the BIOS on my laptop as the vendor BIOS is a bit buggy. Since coreboot didn't directly support my laptop, I wanted to work towards adding support for it. However, time and skill constraints forced me to leave it for later. Now, with GSoC around the corner, I believe is the perfect time for me to work towards this goal. I had a look at the list of projects, and found the following to be interesting, mentioned in decreasing order of preference: - Support Power9/Power8 in coreboot - Port edk2 or U-Boot payloads to ARM, AArch64 or RISC-V - Fix POST code handling I am completely new to coreboot, however, I do have experience with the Linux kernel compilation and patching process on Gentoo. I have familiarity with the Assembly language and have done various embedded projects for AVR microcontrollers. I would love to make contributions to the firmware side of coreboot, and on a personal level, it would be really fulfilling to use coreboot on my own machine once I become capable of adding support for it through this GSoC internship. I have mentioned my motivation and interests above, so please let me know if I might have misjudged a project or if some other project would be more fitting for me. Also, it would be really helpful if you could suggest some starter issues for which I could submit some patches. I have attached the serial output of the tutorial below as a plain text file, which you may check in any terminal using cat. Thank you for your time. Regards, Utkarsh Verma

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[coreboot - Bug #474] (New) X200s crashes after graphic init with 8GB RAM
by Bill XIE 01 Apr '23

01 Apr '23

Issue #474 has been reported by Bill XIE. ---------------------------------------- Bug #474: X200s crashes after graphic init with 8GB RAM https://ticket.coreboot.org/issues/474 * Author: Bill XIE * Status: New * Priority: Normal * Category: board support * Target version: master * Start date: 2023-03-28 * Affected versions: master * Affected hardware: X200s ---------------------------------------- My X200s with panel LTD121EQ3B and 2x4GB identical RAM running a coreboot-4.19-937-g0b192d3238 built for X200, configured with the attached x200s.cfg, having the following contents, crashed with beeping after graphic init (screen lights), and before booting from the grub-based payload. ``` FMAP REGION: COREBOOT Name Offset Type Size Comp cbfs_master_header 0x0 cbfs header 32 none fallback/romstage 0x80 stage 69240 none cpu_microcode_blob.bin 0x10f80 microcode 49152 none fallback/ramstage 0x1cfc0 stage 130413 LZMA (297648 decompressed) config 0x3cdc0 raw 3019 LZMA (9596 decompressed) revision 0x3d9c0 raw 716 none build_info 0x3dcc0 raw 101 none fallback/dsdt.aml 0x3dd80 raw 14999 none cmos.default 0x41880 cmos_default 256 none cmos_layout.bin 0x419c0 cmos_layout 1696 none fallback/postcar 0x420c0 stage 33912 none data_ccfl.vbt 0x4a580 raw 1501 LZMA (3854 decompressed) data_led.vbt 0x4abc0 raw 1439 LZMA (3863 decompressed) (empty) 0x4b1c0 null 7140 none fallback/payload 0x4cdc0 simple elf 7123033 none (empty) 0x717e80 null 853028 none bootblock 0x7e82c0 bootblock 31488 none ``` This problem will disappear if I remove one DIMM, remove vbt files from CBFS, or enable EHCI debug with FT232H, which makes me unable to catch it. ---Files-------------------------------- x200s.cfg (9.36 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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440BX meminit changes testing
by Branden Waldner 31 Mar '23

31 Mar '23

Hi Keith So far I've only tested the complete patch train (73888) like previously mentioned and didn't have my serial console set up at the time. I dug out the cable from behind my desk and got it run to my work bench again, so that should help out. I'm assuming you would want logs with raminit debug enabled though and I didn't have that set last time. You had mentioned you wanted me to test 74036 specifically? I checked out the ram I was using with decode-dimms, but didn't check any other ram yet. It looks like they are both rated for CL3 @100mhz and the 133mhz stick seems to run at it's timings for 133 instead of 100? I'm running a 100mhz fsb coppermine cpu and the memory is supposed to run at the fsb speed right? It doesn't seem to use (or at least display it is using) the 100mhz timing on the oem bios either - though I haven't done enough testing to be confident of what's going on. I have some high density 256mb memory that runs at 128mb with this chipset, so I could check what the timings are on that yet. I really should have just tried to find a lot of 512mb high density to just fill out whatever sdram usage I could have. Branden

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[coreboot - Feature #477] (New) Excessive Power Draw with USB-PD
by Stan Janssen 31 Mar '23

31 Mar '23

Issue #477 has been reported by Stan Janssen. ---------------------------------------- Feature #477: Excessive Power Draw with USB-PD https://ticket.coreboot.org/issues/477 * Author: Stan Janssen * Status: New * Priority: Normal * Target version: none * Start date: 2023-03-31 * Affected hardware: Starbook MK V ---------------------------------------- I have a StarBook MK V with Coreboot connected to a Dell S2719DC external monitor that supplies 45 W of power over USB-C. However, the laptop draws more than the available 45W of power and the display shuts down with a warning message: "Excessive Power Draw from connected device". I understand that this power management feature could be handled in Coreboot. Is this a feature that could be supported in Coreboot in the future? Is there something that I could do to support the development of this feature? Is there a workaround in the meantime? Thanks! -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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Provide Toolchain Binaries - The serial output of my build
by Ziqian Rong (zr1e22) 30 Mar '23

30 Mar '23

Hi, everyone I am Ziqian Rong, a 1st Electrical & Electronic Engineering student at the University of Southampton. I am interested in the "Provide Toolchain Binaries" project. I followed the tutorial and here is the serial output of my build. Hope I can get in touch with the mentor of this project. Thank you very much! Best regards, Ziqian Rong

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coreboot March 2023