coreboot June 2006

coreboot@coreboot.org

31 participants
49 discussions

by Ken Fuchs

> On Wed, Aug 03, 2005 at 11:59:20AM +0900, Jun OKAJIMA wrote: > > Probably, most guys here use BIOS Saver. > > And it works well? > > In mine, RD1 for PLCC gets not being writable suddenly. > > I mean, it seems writable but # flash_rom -v fails. > > I solved this problem by a quick hack. > > > > How about yours? You can write RD1 or W49F002U well? > > Any problem happen? Johnathan McDowell wrote: > Even after that it's sometimes a bit flakey and I have to erase, then > write it. I've put the board's original BIOS in the RD1 and am writing > to the SST 39SF020A instead, which works without problems. I've read posts about the RD1 that suggest its integrated flash device is low quality and it may take 10 or more flash attempts to get a good flash update to the RD1 flash device. As a result, many RD1 BIOS Savior users will flash the commercial BIOS image (or other known good BIOS image) into the RD1 integrated flash device as many times as needed to get an image that boots. Then use the original BIOS device to flash test BIOS image (usually LinuxBIOS images among this group), since the original BIOS device usually flashes OK on the first attempt. I've used the RD1 in the above fashion with great success on the Tyan S2885 mainboard. The same RD1 would not work on the nVidia CK8-04 CRB mainboard. I think the CK8-04 CRB requires a flash device that the RD1 does not support. However, the RD1 worked well as an "do nothing" adapter which allowed swapping the BIOS flash device between my flash burner and the mainboard without any wear to the mainboard's BIOS socket. BTW, my flash burner is an older Enhanced Willem Universal Programmer. I got mine for only $60 US over a year ago. I've seen it for less than $40 on eBay a few weeks ago. The newest model is going for about $50 US. It does a LinuxBIOS flash in about 5 minutes; not bad for a $60 burner. However, it does require changing DIP switches to match an image for each device it can program. Great for the amateur or professional with a small budget. > > BTW, a cable of your RD1 is not broken? > > I needed soldering to fix it. > Mine was fine out of the box. Mine cable and switch worked fine out of the box as well. Sincerely, Ken Fuchs <kfuchs(a)winternet.com> ami-mac-sun

14 years, 3 months

Re: [LinuxBIOS] selection of compression algorithm

by Carl-Daniel Hailfinger

yhlu wrote: > then how about the lines for 7z uncompress code? > > YH Working on it. 7z decompressor is really small (8 kb compiled on i386) and written in ISO C (1884 lines of code), but compressor is big and written in C++. Does it still make sense to try to use 7z? How much RAM is the decompressor allowed to use? Regards, Carl-Daniel -- http://www.hailfinger.org/

14 years, 11 months

Re: [LinuxBIOS] New guy in LinuxBios

by Lu, Yinghai

In the MB Config.lb The device apic_cluster 0 should be put before other pci devices YH ________________________________ From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Vincente Tsou Sent: Sunday, June 25, 2006 11:58 PM To: yhlu Cc: Stefan Reinauer; linuxbios(a)linuxbios.org Subject: Re: [LinuxBIOS] New guy in LinuxBios Hi, Excuse me.... I don't know how to move the CPU init before other pci device init call.... sorry. I have tried to find it, but .... :( 2006/6/26, yhlu <yinghailu(a)gmail.com>: the snow screen only happened when I was debugging the onboard VGA support. So i move the CPU init before other pci device init call. That is something related to mtrr setting around [0xa0000-0xb0000) the font buffer. the halt_sys display is normal...it means the vga option rom is executed successfully. you can use filo in etherboot to boot from usb stick. YH On 6/25/06, Vincente Tsou <vincentetsou(a)nexcom.com.tw> wrote: > > Hi YH, > > Thanks again for your help. > > Now I can active all devices in my LinuxBios, it almost done except VGA > function. > > I appended a 36k VGA option rom to LinuxBios, and enable Options about VGA. > > And I got the halt_sys message: > > PCI: 04:02.0 init > rom address for PCI: 04: 02.0 = fff80000 > copying VGA ROM Image from 0xfff80000 to 0xc0000, 0x9000 bytes > entering emulator > halt_sys: file > /home/vincente/LinuxBIOS/LinuxBIOSv2/src/devices/emulator/x86emu/ops.c, > line 4387 > PCI: 01:04.0 init > > then, I can see something output, but the output is like snow screen and I > can't read anything. > I think it is working in the wrong mode. > > When I made a blind type 'root' and password, I can login the Linux, and > then the screen became clear. (work fine) > > I wonder how to fix the problem? is the halt_sys message normal ? > > I also got another question, could it possible boot to MS-DOS floppy/USB > disk. > The MS-DOS needs a lot INT function in BIOS, does LinuxBios able to support > it? > > > > 2006/6/21, Vincente Tsou <vincentetsou(a)nexcom.com.tw >: > > > > > > Dear YH, > > > > got it. > > > > Thanks for the information and your help. > > > > > > > > 2006/6/21, Lu, Yinghai < yinghai.lu(a)amd.com>: > > > > > > > > > > > > > > > > > > > > Actually the irqtable entries is only for peer root pci bus scan when > mptable is used. > > > > > > So you need to make sure mptable is right, and put entries for > hypertransport chain other than on bus0. > > > > > > > > > > > > YH > > > > > > > > > > > > ________________________________ > > > > > > > From: vincente.tsou(a)gmail.com [mailto:vincente.tsou@gmail.com] On Behalf > Of Vincente Tsou > > > Sent: Tuesday, June 20, 2006 7:05 PM > > > To: Lu, Yinghai > > > Cc: Stefan Reinauer; linuxbios(a)linuxbios.org > > > > > > Subject: Re: [LinuxBIOS] New guy in LinuxBios > > > > > > > > > > > > > > > > > > > > > > > > Dear YH, > > > > > > > > > > > > > > > > > > > > > excuse me, how about the irq_tables.c? > > > > > > > > > should I modify it like tyan/s2882 did. > > > > > > > > > > > > > > > > > > printk_debug("setting Onboard Broadcom NIC\n"); > > > static const unsigned char slotIrqs_8131_1_9[4] = { 5, 9, 0, 0 > }; > > > pci_assign_irqs(bus_8131_1, 9, slotIrqs_8131_1_9); > > > write_pirq_info(pirq_info, bus_8131_1,(9<<3)|0, 0x1, 0xdef8, > 0x2, 0xdef8, 0, 0, 0, 0, 0, 0); > > > pirq_info++; slot_num++; > > > > > > > > > > > > > > > > > > 2006/6/20, Lu, Yinghai < yinghai.lu(a)amd.com >: > > > > > > > > > > > > > > > You need to update the entries at mptable.c for your slots or onboard > pci device. > > > > > > > > > > > > YH > > > > > > > > > > > > > > > > > > > > > -- > > > Best Regards, > > > Vincente Tsou > > > > > > Engineer > > > R/D, S/W Dept. > > > NEXCOM International Co. > > > Tel: 886-2-82280606 Ext. 3205 > > > Fax: 886-2-82280506 > > > E-mail: vincentetsou(a)nexcom.com.tw > > > Web: http://www.nexcom.com.tw/ > > > > > > > > > > > > > > > -- > > Best Regards, > > Vincente Tsou > > > > Engineer > > R/D, S/W Dept. > > NEXCOM International Co. > > Tel: 886-2-82280606 Ext. 3205 > > Fax: 886-2-82280506 > > E-mail: vincentetsou(a)nexcom.com.tw > > Web: http://www.nexcom.com.tw/ > > > > > -- > Best Regards, > Vincente Tsou > > Engineer > R/D, S/W Dept. > NEXCOM International Co. > Tel: 886-2-82280606 Ext. 3205 > Fax: 886-2-82280506 > E-mail: vincentetsou(a)nexcom.com.tw > Web: http://www.nexcom.com.tw/ > -- > linuxbios mailing list > linuxbios(a)linuxbios.org > http://www.openbios.org/mailman/listinfo/linuxbios > > -- Best Regards, Vincente Tsou Engineer R/D, S/W Dept. NEXCOM International Co. Tel: 886-2-82280606 Ext. 3205 Fax: 886-2-82280506 E-mail: vincentetsou(a)nexcom.com.tw Web: http://www.nexcom.com.tw/

15 years, 1 month

[LinuxBIOS] a slight change to startup and elf images

by Ronald G Minnich

Right now, we use mkelfimage to set up parameter blocks for linux. There is a lot of code to do this, and I am running out of room on OLPC. I need to build tiny elf images with on executable code in them (other than your kernel, of course). I have modified mkelfimage so that it produces an elfimage with only 3 segments: command line, kernel, initrd. With this option, you can build a very simple elfimage with just those three things. There is the issue of setting up %esi for 386 linux. I am considering the following convention: architecture-independent part (src/boot/) For the first PT_LOAD elf segment, assume it is the command line. Set a variable, command_line, to the load address of this segment. architecture-dependent, e.g. 386 (src/cpu/boot.c) set %esi to command_line. If you are using normal mkelfimage, this is a no-op: esi setting is ignored. If you are using mkelfimage with my option (e.g. OLPC), this address will be used as the command line pointer. I can't see a problem, any comments? thanks ron

15 years, 2 months

Re: [LinuxBIOS] some more tyan/s2881 questions

by Lu, Yinghai

I have inited the hw sensors in LinuxBIOS for s2881. So you could use lmsensor to check the FAN speed. The config file is on Tyan web. For the Fan control, there should more some reg setting...to reduce the FAN speed winbond and adm1027... YH

15 years, 2 months

[LinuxBIOS] cant detect bios with flash software

by bios＠lists.actweb.info

Hi, I have just got my RD1, and installed it into my EPIA-PD10000 m/board (same chipset as the EPIA-M), all works fine :) I ran the flashrom util fom the linuxbios source code, (downloaded via svn) when i run the flashrom util i get the following :- with bios savour switched in, but nothing written :- :~/bios/LinuxBIOSv2/util/flashrom# ./flashrom Calibrating delay loop... ok No LinuxBIOS table found. Enabling flash write on VT8235...OK W49F002U found at physical address: 0xfffc0000 Flash part is W49F002U OK, only ENABLING flash write, but NOT FLASHING. with original bios switched in :- ~/bios/LinuxBIOSv2/util/flashrom# ./flashrom Calibrating delay loop... ok No LinuxBIOS table found. Enabling flash write on VT8235...OK No EEPROM/flash device found. As you can see the RD1 bios chip is reconised fine but my original bios chip dosnt seem to be found :( on inspection of the bios chip, i can see a chip number of :F492002UA If ive understood the flashrom program, this isnt reconsied becasue there isnt a file of that name within the flashrom directory (each file represents its resective bios number????) Has anyone come accross this bios chip before, and if so can they supply the config file for flashrom? As i understand it, i should still be able to use the EPIA flash program, but as i dont have a working floppy drive in the house, and am not keen on using a cd for a 1.44Mb file, PLEASE could anyone recomend a way around this? Also if i use the EPIA flash program it makes it harder to get the compiled rom into the bios, as i have to jump from linux to windows all the time :( Is there a way to grab the entire bios using dd under linux? could this be sued to get a copy of the original bios, and then write this to the RD1? Many thanks Matt

15 years, 2 months

[LinuxBIOS] Kernel will not boot

by Philipp Degler

Hi, I tried various payloads to boot the system. Filo could not find my hda saying floating bus. Etherboot loads OK and gets a kernel elf image via tftp but kernel is not loading. Do you have an idea what could be the problem? Maybe some PCI-Devices not initialized correctly? VGA-Support is turned off, no pci cards in the slots, 2GB RAM, Using 2.6 static kernel with vga and fb options turned completely off. LinuxBIOS was compiled with gcc (GCC) 3.3.3 (SuSE Linux) and binutils-2.15.90.0.1.1-30 (binutils-32bit-9.1-200404070910) I appended the trace of LinuxBIOS with loglevel 9. thx phil --------- LinuxBIOS-1.1.8_Fallback Mon Mar 27 15:51:01 CEST 2006 starting... i386 console_init report_bist_failure setup_default_resource_map setting up resource map.... 0000c144 <-00000000 0000c14c <-00000001 0000c154 <-00000002 0000c15c <-00000003 0000c164 <-00000004 0000c16c <-00000005 0000c174 <-00000006 0000c17c <-00000007 0000c140 <-00000000 0000c148 <-00000000 0000c150 <-00000000 0000c158 <-00000000 0000c160 <-00000000 0000c168 <-00000000 0000c170 <-00000000 0000c178 <-00000000 0000c184 <-00000000 0000c18c <-00000000 0000c194 <-00000000 0000c19c <-00000000 0000c1a4 <-00000000 0000c1ac <-00000000 0000c1b4 <-00000000 0000c180 <-00000000 0000c188 <-00000000 0000c190 <-00000000 0000c198 <-00000000 0000c1a0 <-00000000 0000c1a8 <-00000000 0000c1b0 <-00000000 0000c1cc <-00000000 0000c1d4 <-00000000 0000c1dc <-00000000 0000c1c8 <-00000000 0000c1d0 <-00000000 0000c1d8 <-00000000 0000c1e4 <-00000000 0000c1e8 <-00000000 0000c1ec <-00000000 done. setup_coherent_ht_domain Enabling routing table for node 00 done. Enabling SMP settings (0,1) link=01 (1,0) link=01 setup_remote_node: done Renaming current temporary node to 01 done. Enabling routing table for node 01 done. 02 nodes initialized. coherent_ht_finalize done needs_reset ht reset - enable_smbus SMBus controller enabled memreset_setup sdram_initialize Ram1.00 setting up CPU00 northbridge registers done. Ram1.01 setting up CPU01 northbridge registers done. Ram2.00 Enabling dual channel memory 200Mhz Interleaved RAM: 0x00100000 KB Ram2.01 Enabling dual channel memory 200Mhz Interleaved RAM: 0x00200000 KB Ram3 ECC enabled ECC enabled Initializing memory: done Initializing memory: done Clearing initial memory region: done Ram4 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. test LinuxBIOS-1.1.8_Fallback Mon Mar 27 15:51:01 CEST 2006 booting... Enumerating buses... scan_static_bus for Root Device PCI_DOMAIN: 0000 enabled APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 0 PCI: 00:18.0 [1022/1100] bus ops PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] ops PCI: 00:18.3 [1022/1103] enabled PCI: devfn 0xc4, bad id 0xffffffff PCI: devfn 0xc5, bad id 0xffffffff PCI: devfn 0xc6, bad id 0xffffffff PCI: devfn 0xc7, bad id 0xffffffff PCI: 00:19.0 [1022/1100] bus ops PCI: 00:19.0 [1022/1100] enabled PCI: 00:19.1 [1022/1101] enabled PCI: 00:19.2 [1022/1102] enabled PCI: 00:19.3 [1022/1103] ops PCI: 00:19.3 [1022/1103] enabled PCI: devfn 0xcc, bad id 0xffffffff PCI: devfn 0xcd, bad id 0xffffffff PCI: devfn 0xce, bad id 0xffffffff PCI: devfn 0xcf, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00040000 malloc 0x00040000 PCI: 01:00.0 [1022/7450] bus ops PCI: 01:00.0 [1022/7450] enabled Capability: 0x08 @ 0xa0 Capability: 0x08 @ 0xb8 flags: 0x8000 Capability: 0x08 @ 0xa0 Capability: 0x08 @ 0xb8 Capability: 0x08 @ 0xc0 flags: 0x0040 PCI: 01:01.0 count: 0002 static_count: 0001 PCI: 01:01.0 [1022/7450] enabled next_unitid: 0003 malloc Enter, size 668, free_mem_ptr 0004029c malloc 0x0004029c PCI: 01:00.0 [1022/7460] bus ops PCI: 01:00.0 [1022/7460] enabled Capability: 0x08 @ 0xc0 flags: 0x0080 PCI: 01:03.0 count: 0004 static_count: 0001 PCI: 01:03.0 [1022/7460] enabled next_unitid: 0007 PCI: pci_scan_bus for bus 1 PCI: devfn 0x0, bad id 0xffffffff PCI: 01:01.0 [1022/7450] enabled malloc Enter, size 668, free_mem_ptr 00040538 malloc 0x00040538 PCI: 01:01.1 [1022/7451] ops PCI: 01:01.1 [1022/7451] enabled PCI: devfn 0xa, bad id 0xffffffff PCI: devfn 0xb, bad id 0xffffffff PCI: devfn 0xc, bad id 0xffffffff PCI: devfn 0xd, bad id 0xffffffff PCI: devfn 0xe, bad id 0xffffffff PCI: devfn 0xf, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 000407d4 malloc 0x000407d4 PCI: 01:02.0 [1022/7450] bus ops PCI: 01:02.0 [1022/7450] enabled malloc Enter, size 668, free_mem_ptr 00040a70 malloc 0x00040a70 PCI: 01:02.1 [1022/7451] ops PCI: 01:02.1 [1022/7451] enabled PCI: devfn 0x12, bad id 0xffffffff PCI: devfn 0x13, bad id 0xffffffff PCI: devfn 0x14, bad id 0xffffffff PCI: devfn 0x15, bad id 0xffffffff PCI: devfn 0x16, bad id 0xffffffff PCI: devfn 0x17, bad id 0xffffffff PCI: 01:03.0 [1022/7460] enabled malloc Enter, size 668, free_mem_ptr 00040d0c malloc 0x00040d0c PCI: 01:04.0 [1022/7468] bus ops PCI: 01:04.0 [1022/7468] enabled malloc Enter, size 668, free_mem_ptr 00040fa8 malloc 0x00040fa8 PCI: 01:04.1 [1022/7469] ops PCI: 01:04.1 [1022/7469] enabled malloc Enter, size 668, free_mem_ptr 00041244 malloc 0x00041244 PCI: 01:04.2 [1022/746a] bus ops PCI: 01:04.2 [1022/746a] enabled malloc Enter, size 668, free_mem_ptr 000414e0 malloc 0x000414e0 PCI: 01:04.3 [1022/746b] bus ops PCI: 01:04.3 [1022/746b] enabled PCI: devfn 0x24, bad id 0x0 malloc Enter, size 668, free_mem_ptr 0004177c malloc 0x0004177c PCI: 01:04.5 [1022/746d] ops PCI: 01:04.5 [1022/746d] enabled malloc Enter, size 668, free_mem_ptr 00041a18 malloc 0x00041a18 PCI: 01:04.6 [1022/746e] ops PCI: 01:04.6 [1022/746e] enabled PCI: devfn 0x27, bad id 0x0 PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff do_pci_scan_bridge for PCI: 01:01.0 PCI: pci_scan_bus for bus 2 PCI: devfn 0x0, bad id 0xffffffff PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00041cb4 malloc 0x00041cb4 PCI: 02:03.0 [8086/1076] enabled malloc Enter, size 668, free_mem_ptr 00041f50 malloc 0x00041f50 PCI: 02:04.0 [8086/1076] enabled malloc Enter, size 668, free_mem_ptr 000421ec malloc 0x000421ec PCI: 02:05.0 [1095/3114] enabled PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff PCI: pci_scan_bus returning with max=02 Capability: 0x07 @ 0xa0 PCI: 02: Conventional PCI do_pci_scan_bridge returns max 2 do_pci_scan_bridge for PCI: 01:02.0 PCI: pci_scan_bus for bus 3 PCI: devfn 0x0, bad id 0xffffffff PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff PCI: pci_scan_bus returning with max=03 Capability: 0x07 @ 0xa0 PCI: 03: 133MHz PCI-X do_pci_scan_bridge returns max 3 do_pci_scan_bridge for PCI: 01:03.0 PCI: pci_scan_bus for bus 4 malloc Enter, size 668, free_mem_ptr 00042488 malloc 0x00042488 PCI: 04:00.0 [1022/7464] bus ops PCI: 04:00.0 [1022/7464] enabled malloc Enter, size 668, free_mem_ptr 00042724 malloc 0x00042724 PCI: 04:00.1 [1022/7464] bus ops PCI: 04:00.1 [1022/7464] enabled malloc Enter, size 668, free_mem_ptr 000429c0 malloc 0x000429c0 PCI: 04:00.2 [1022/7463] ops USB2 disabled. PCI: 04:00.2 [1022/7463] disabled PCI: devfn 0x3, bad id 0xffffffff PCI: devfn 0x4, bad id 0xffffffff PCI: devfn 0x5, bad id 0xffffffff PCI: devfn 0x6, bad id 0xffffffff PCI: devfn 0x7, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00042c5c malloc 0x00042c5c PCI: 04:01.0 [1022/7462] ops PCI: 04:01.0 [1022/7462] enabled PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00042ef8 malloc 0x00042ef8 PCI: 04:06.0 [1002/4752] enabled PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff scan_static_bus for PCI: 04:00.0 scan_static_bus for PCI: 04:00.0 done scan_static_bus for PCI: 04:00.1 scan_static_bus for PCI: 04:00.1 done PCI: pci_scan_bus returning with max=04 do_pci_scan_bridge returns max 4 scan_static_bus for PCI: 01:04.0 scan_static_bus for PCI: 01:04.0 done scan_static_bus for PCI: 01:04.2 scan_static_bus for PCI: 01:04.2 done scan_static_bus for PCI: 01:04.3 scan_static_bus for PCI: 01:04.3 done PCI: pci_scan_bus returning with max=04 PCI: pci_scan_bus returning with max=04 PCI_DOMAIN: 0000 passpw: enabled PCI_DOMAIN: 0000 passpw: enabled APIC_CLUSTER: 0 scanning... PCI: 00:18.3 siblings=0 CPU: APIC: 00 enabled PCI: 00:19.3 siblings=0 CPU: APIC: 01 enabled scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI: 00:18.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 done PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 01:01.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 02:03.0 18 * [0x00000000 - 0x0000003f] io PCI: 02:04.0 18 * [0x00000040 - 0x0000007f] io PCI: 02:05.0 20 * [0x00000080 - 0x0000008f] io PCI: 02:05.0 10 * [0x00000090 - 0x00000097] io PCI: 02:05.0 18 * [0x000000a0 - 0x000000a7] io PCI: 02:05.0 14 * [0x000000b0 - 0x000000b3] io PCI: 02:05.0 1c * [0x000000c0 - 0x000000c3] io PCI: 01:01.0 compute_allocate_io: base: 000000c4 size: 00001000 align: 12 gran: 12 done PCI: 01:01.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 01:01.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 01:01.0 compute_allocate_prefmem: base: fffffffffff00000 size: 00000000 align: 20 gran: 20 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 01:01.0 compute_allocate_prefmem: base: fffffffffff00000 size: 00000000 align: 20 gran: 20 done PCI: 01:01.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] bus 2 prefmem PCI: 01:01.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 02:05.0 30 * [0x00000000 - 0x0007ffff] mem PCI: 02:03.0 10 * [0x00080000 - 0x0009ffff] mem PCI: 02:04.0 10 * [0x000a0000 - 0x000bffff] mem PCI: 02:04.0 14 * [0x000c0000 - 0x000dffff] mem PCI: 02:04.0 30 * [0x000e0000 - 0x000fffff] mem PCI: 02:05.0 24 * [0x00100000 - 0x001003ff] mem PCI: 01:01.0 compute_allocate_mem: base: 00100400 size: 00200000 align: 20 gran: 20 done PCI: 01:03.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 04:06.0 14 * [0x00000000 - 0x000000ff] io PCI: 01:03.0 compute_allocate_io: base: 00000100 size: 00001000 align: 12 gran: 12 done PCI: 01:03.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 01:03.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 01:03.0 compute_allocate_prefmem: base: fff00000 size: 00000000 align: 20 gran: 20 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 01:03.0 compute_allocate_prefmem: base: fff00000 size: 00000000 align: 20 gran: 20 done PCI: 01:03.0 24 <- [0x00fff00000 - 0x00ffefffff] bus 4 prefmem PCI: 01:03.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 04:06.0 10 * [0x00000000 - 0x00ffffff] mem PCI: 04:06.0 30 * [0x01000000 - 0x0101ffff] mem PCI: 04:01.0 30 * [0x01020000 - 0x0102ffff] mem PCI: 04:00.0 10 * [0x01030000 - 0x01030fff] mem PCI: 04:00.1 10 * [0x01031000 - 0x01031fff] mem PCI: 04:01.0 10 * [0x01032000 - 0x01032fff] mem PCI: 04:06.0 18 * [0x01033000 - 0x01033fff] mem PCI: 01:03.0 compute_allocate_mem: base: 01034000 size: 01100000 align: 24 gran: 20 done PCI: 01:04.0 read_resources bus 0 link: 0 PCI: 01:04.0 read_resources bus 0 link: 0 done PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 01:01.0 1c * [0x00000000 - 0x00000fff] io PCI: 01:03.0 1c * [0x00001000 - 0x00001fff] io PCI: 01:04.3 58 * [0x00002000 - 0x000020ff] io PCI: 01:04.5 10 * [0x00002400 - 0x000024ff] io PCI: 01:04.6 10 * [0x00002800 - 0x000028ff] io PCI: 01:04.6 14 * [0x00002c00 - 0x00002c7f] io PCI: 01:04.5 14 * [0x00002c80 - 0x00002cbf] io PCI: 01:04.2 10 * [0x00002cc0 - 0x00002cdf] io PCI: 01:04.1 20 * [0x00002ce0 - 0x00002cef] io PCI: 00:18.0 compute_allocate_io: base: 00002cf0 size: 00003000 align: 12 gran: 12 done PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 01:03.0 20 * [0x00000000 - 0x010fffff] mem PCI: 01:01.0 20 * [0x01100000 - 0x012fffff] mem PCI: 01:01.1 10 * [0x01300000 - 0x01300fff] mem PCI: 01:02.1 10 * [0x01301000 - 0x01301fff] mem PCI: 00:18.0 compute_allocate_mem: base: 01302000 size: 01400000 align: 24 gran: 20 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:18.0 1d2 * [0x00001000 - 0x00003fff] io PCI: 00:18.0 1d8 * [0x00004000 - 0x00003fff] io Root Device compute_allocate_io: base: 00004000 size: 00003c00 align: 12 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:18.3 94 * [0x00000000 - 0x03ffffff] mem PCI: 00:18.0 1a2 * [0x04000000 - 0x053fffff] mem PCI: 00:18.0 1b8 * [0x05400000 - 0x053fffff] prefmem PCI: 00:18.0 1b0 * [0x05400000 - 0x053fffff] mem PCI: 00:18.0 1aa * [0x05400000 - 0x053fffff] prefmem Root Device compute_allocate_mem: base: 05400000 size: 05400000 align: 26 gran: 0 done Done reading resources. Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00003c00 align: 12 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:18.0 1d2 * [0x00001000 - 0x00003fff] io PCI: 00:18.0 1d8 * [0x00004000 - 0x00003fff] io Root Device compute_allocate_io: base: 00004000 size: 00003000 align: 12 gran: 0 done Root Device compute_allocate_mem: base: f8000000 size: 05400000 align: 26 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:18.3 94 * [0xf8000000 - 0xfbffffff] mem PCI: 00:18.0 1a2 * [0xfc000000 - 0xfd3fffff] mem PCI: 00:18.0 1b8 * [0xfd400000 - 0xfd3fffff] prefmem PCI: 00:18.0 1b0 * [0xfd400000 - 0xfd3fffff] mem PCI: 00:18.0 1aa * [0xfd400000 - 0xfd3fffff] prefmem Root Device compute_allocate_mem: base: fd400000 size: 05400000 align: 26 gran: 0 done Root Device assign_resources, bus 0 link: 0 PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:18.0 compute_allocate_io: base: 00004000 size: 00000000 align: 12 gran: 12 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_io: base: 00004000 size: 00000000 align: 12 gran: 12 done PCI: 00:18.0 1d8 <- [0x0000004000 - 0x0000003fff] io <node 0 link 0> PCI: 00:18.0 compute_allocate_prefmem: base: fd400000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_prefmem: base: fd400000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 1b8 <- [0x00fd400000 - 0x00fd3fffff] prefmem <node 0 link 0> PCI: 00:18.0 compute_allocate_mem: base: fd400000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 missing read_resources PCI: 00:00.1 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:00.0 missing read_resources PCI: 00:01.0 missing read_resources PCI: 00:01.1 missing read_resources PCI: 00:01.2 missing read_resources PCI: 00:01.3 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 compute_allocate_mem: base: fd400000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 1b0 <- [0x00fd400000 - 0x00fd3fffff] mem <node 0 link 0> PCI: 00:18.0 compute_allocate_io: base: 00001000 size: 00003000 align: 12 gran: 12 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 01:01.0 1c * [0x00001000 - 0x00001fff] io PCI: 01:03.0 1c * [0x00002000 - 0x00002fff] io PCI: 01:04.3 58 * [0x00003000 - 0x000030ff] io PCI: 01:04.5 10 * [0x00003400 - 0x000034ff] io PCI: 01:04.6 10 * [0x00003800 - 0x000038ff] io PCI: 01:04.6 14 * [0x00003c00 - 0x00003c7f] io PCI: 01:04.5 14 * [0x00003c80 - 0x00003cbf] io PCI: 01:04.2 10 * [0x00003cc0 - 0x00003cdf] io PCI: 01:04.1 20 * [0x00003ce0 - 0x00003cef] io PCI: 00:18.0 compute_allocate_io: base: 00003cf0 size: 00003000 align: 12 gran: 12 done PCI: 00:18.0 1d2 <- [0x0000001000 - 0x0000003fff] io <node 0 link 2> PCI: 00:18.0 compute_allocate_prefmem: base: fd400000 size: 00000000 align: 20 gran: 20 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 00:18.0 compute_allocate_prefmem: base: fd400000 size: 00000000 align: 20 gran: 20 done PCI: 00:18.0 1aa <- [0x00fd400000 - 0x00fd3fffff] prefmem <node 0 link 2> PCI: 00:18.0 compute_allocate_mem: base: fc000000 size: 01400000 align: 24 gran: 20 PCI: 00:18.0 read_resources bus 1 link: 2 PCI: 00:18.0 read_resources bus 1 link: 2 done PCI: 01:03.0 20 * [0xfc000000 - 0xfd0fffff] mem PCI: 01:01.0 20 * [0xfd100000 - 0xfd2fffff] mem PCI: 01:01.1 10 * [0xfd300000 - 0xfd300fff] mem PCI: 01:02.1 10 * [0xfd301000 - 0xfd301fff] mem PCI: 00:18.0 compute_allocate_mem: base: fd302000 size: 01400000 align: 24 gran: 20 done PCI: 00:18.0 1a2 <- [0x00fc000000 - 0x00fd3fffff] mem <node 0 link 2> PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:18.0 assign_resources, bus 1 link: 2 PCI: 01:01.0 compute_allocate_io: base: 00001000 size: 00001000 align: 12 gran: 12 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 02:03.0 18 * [0x00001000 - 0x0000103f] io PCI: 02:04.0 18 * [0x00001040 - 0x0000107f] io PCI: 02:05.0 20 * [0x00001080 - 0x0000108f] io PCI: 02:05.0 10 * [0x00001090 - 0x00001097] io PCI: 02:05.0 18 * [0x000010a0 - 0x000010a7] io PCI: 02:05.0 14 * [0x000010b0 - 0x000010b3] io PCI: 02:05.0 1c * [0x000010c0 - 0x000010c3] io PCI: 01:01.0 compute_allocate_io: base: 000010c4 size: 00001000 align: 12 gran: 12 done PCI: 01:01.0 1c <- [0x0000001000 - 0x0000001fff] bus 2 io PCI: 01:01.0 compute_allocate_mem: base: fd100000 size: 00200000 align: 20 gran: 20 PCI: 01:01.0 read_resources bus 2 link: 0 PCI: 01:01.0 read_resources bus 2 link: 0 done PCI: 02:05.0 30 * [0xfd100000 - 0xfd17ffff] mem PCI: 02:03.0 10 * [0xfd180000 - 0xfd19ffff] mem PCI: 02:04.0 10 * [0xfd1a0000 - 0xfd1bffff] mem PCI: 02:04.0 14 * [0xfd1c0000 - 0xfd1dffff] mem PCI: 02:04.0 30 * [0xfd1e0000 - 0xfd1fffff] mem PCI: 02:05.0 24 * [0xfd200000 - 0xfd2003ff] mem PCI: 01:01.0 compute_allocate_mem: base: fd200400 size: 00200000 align: 20 gran: 20 done PCI: 01:01.0 20 <- [0x00fd100000 - 0x00fd2fffff] bus 2 mem PCI: 01:01.0 assign_resources, bus 2 link: 0 PCI: 02:03.0 10 <- [0x00fd180000 - 0x00fd19ffff] mem PCI: 02:03.0 18 <- [0x0000001000 - 0x000000103f] io PCI: 02:04.0 10 <- [0x00fd1a0000 - 0x00fd1bffff] mem PCI: 02:04.0 14 <- [0x00fd1c0000 - 0x00fd1dffff] mem PCI: 02:04.0 18 <- [0x0000001040 - 0x000000107f] io PCI: 02:04.0 30 <- [0x00fd1e0000 - 0x00fd1fffff] romem PCI: 02:05.0 10 <- [0x0000001090 - 0x0000001097] io PCI: 02:05.0 14 <- [0x00000010b0 - 0x00000010b3] io PCI: 02:05.0 18 <- [0x00000010a0 - 0x00000010a7] io PCI: 02:05.0 1c <- [0x00000010c0 - 0x00000010c3] io PCI: 02:05.0 20 <- [0x0000001080 - 0x000000108f] io PCI: 02:05.0 24 <- [0x00fd200000 - 0x00fd2003ff] mem PCI: 02:05.0 30 <- [0x00fd100000 - 0x00fd17ffff] romem PCI: 01:01.0 assign_resources, bus 2 link: 0 PCI: 01:01.1 10 <- [0x00fd300000 - 0x00fd300fff] mem64 PCI: 01:02.1 10 <- [0x00fd301000 - 0x00fd301fff] mem64 PCI: 01:03.0 compute_allocate_io: base: 00002000 size: 00001000 align: 12 gran: 12 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 04:06.0 14 * [0x00002000 - 0x000020ff] io PCI: 01:03.0 compute_allocate_io: base: 00002100 size: 00001000 align: 12 gran: 12 done PCI: 01:03.0 1c <- [0x0000002000 - 0x0000002fff] bus 4 io PCI: 01:03.0 compute_allocate_mem: base: fc000000 size: 01100000 align: 24 gran: 20 PCI: 01:03.0 read_resources bus 4 link: 0 PCI: 01:03.0 read_resources bus 4 link: 0 done PCI: 04:06.0 10 * [0xfc000000 - 0xfcffffff] mem PCI: 04:06.0 30 * [0xfd000000 - 0xfd01ffff] mem PCI: 04:01.0 30 * [0xfd020000 - 0xfd02ffff] mem PCI: 04:00.0 10 * [0xfd030000 - 0xfd030fff] mem PCI: 04:00.1 10 * [0xfd031000 - 0xfd031fff] mem PCI: 04:01.0 10 * [0xfd032000 - 0xfd032fff] mem PCI: 04:06.0 18 * [0xfd033000 - 0xfd033fff] mem PCI: 01:03.0 compute_allocate_mem: base: fd034000 size: 01100000 align: 24 gran: 20 done PCI: 01:03.0 20 <- [0x00fc000000 - 0x00fd0fffff] bus 4 mem PCI: 01:03.0 assign_resources, bus 4 link: 0 PCI: 04:00.0 10 <- [0x00fd030000 - 0x00fd030fff] mem PCI: 04:00.1 10 <- [0x00fd031000 - 0x00fd031fff] mem PCI: 04:01.0 10 <- [0x00fd032000 - 0x00fd032fff] mem PCI: 04:01.0 30 <- [0x00fd020000 - 0x00fd02ffff] romem PCI: 04:06.0 10 <- [0x00fc000000 - 0x00fcffffff] mem PCI: 04:06.0 14 <- [0x0000002000 - 0x00000020ff] io PCI: 04:06.0 18 <- [0x00fd033000 - 0x00fd033fff] mem PCI: 04:06.0 30 <- [0x00fd000000 - 0x00fd01ffff] romem PCI: 01:03.0 assign_resources, bus 4 link: 0 PCI: 01:04.1 20 <- [0x0000003ce0 - 0x0000003cef] io PCI: 01:04.2 10 <- [0x0000003cc0 - 0x0000003cdf] io PCI: 01:04.3 58 <- [0x0000003000 - 0x00000030ff] io PCI: 01:04.5 10 <- [0x0000003400 - 0x00000034ff] io PCI: 01:04.5 14 <- [0x0000003c80 - 0x0000003cbf] io PCI: 01:04.6 10 <- [0x0000003800 - 0x00000038ff] io PCI: 01:04.6 14 <- [0x0000003c00 - 0x0000003c7f] io PCI: 00:18.0 assign_resources, bus 1 link: 2 PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> PCI: 00:19.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resourcess... PCI: 00:18.0 cmd <- 140 PCI: 00:00.0 missing enable_resources PCI: 00:00.1 missing enable_resources PCI: 00:01.0 missing enable_resources PCI: 00:01.1 missing enable_resources PCI: 00:00.0 missing enable_resources PCI: 00:01.0 missing enable_resources PCI: 00:01.1 missing enable_resources PCI: 00:01.2 missing enable_resources PCI: 00:01.3 missing enable_resources PCI: 01:01.0 bridge ctrl <- 0003 PCI: 01:01.0 cmd <- 147 PCI: 02:03.0 cmd <- 143 PCI: 02:04.0 cmd <- 143 PCI: 02:05.0 cmd <- 143 PCI: 01:01.1 cmd <- 146 PCI: 01:02.1 cmd <- 146 PCI: 01:03.0 bridge ctrl <- 0003 PCI: 01:03.0 cmd <- 147 PCI: 04:00.0 cmd <- 142 PCI: 04:00.1 cmd <- 142 PCI: 04:01.0 cmd <- 142 PCI: 04:06.0 cmd <- 1c3 PCI: 01:04.0 cmd <- 14f PCI: 01:04.1 cmd <- 141 PCI: 01:04.2 cmd <- 141 PCI: 01:04.3 cmd <- 141 PCI: 01:04.5 cmd <- 141 PCI: 01:04.6 cmd <- 141 PCI: 00:18.1 subsystem <- 161f/3017 PCI: 00:18.1 cmd <- 140 PCI: 00:18.2 subsystem <- 161f/3017 PCI: 00:18.2 cmd <- 140 PCI: 00:18.3 cmd <- 140 PCI: 00:19.0 cmd <- 140 PCI: 00:19.1 subsystem <- 161f/3017 PCI: 00:19.1 cmd <- 140 PCI: 00:19.2 subsystem <- 161f/3017 PCI: 00:19.2 cmd <- 140 PCI: 00:19.3 cmd <- 140 done. Initializing devices... Root Device init PCI: 00:18.0 init PCI: 00:18.1 init PCI: 00:18.2 init PCI: 00:18.3 init NB: Function 3 Misc Control.. done. PCI: 00:19.0 init PCI: 00:19.1 init PCI: 00:19.2 init PCI: 00:19.3 init NB: Function 3 Misc Control.. done. APIC_CLUSTER: 0 init Initializing CPU #0 CPU: vendor AMD device f5a Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB ADDRESS_MASK_HIGH=0xff DONE variable MTRRs Clear out the extra MTRR's ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled microcode: equivalent processor rev id = 0x004a, patch id = 0x00000000 microcode: patch id that want to apply= 0x00000047 microcode: updated to patch id = 0x00000047 success Setting up local apic... apic_id: 0 done. Clearing memory 1024K - 1048576K: --------------- done CPU #0 Initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +start_eip=0x00010000 #startup loops: 2. Sending STARTUP #1 to 1. After apic_write. Initializing CPU #1 Startup point 1. Waiting for send to finish... +CPU: vendor AMD device f5a Sending STARTUP #2 to 1. After apic_write. Enabling cache at rSteutpt ipnogi nfti x1e.d fMWTaRiRtsi(n0g- 8f8o)r tsyepned: tUoC inish... fAfter SSteatrttiunpg. RiWxaeidt iMnTgR Rfso(r0 -11 6C)P UTSy pteo: sWtBo,p dMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB ADDRESS_MASK_HIGH=0xff DONE variable MTRRs Clear out the extra MTRR's ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff ADDRESS_MASK_HIGH=0xff call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled microcode: equivalent processor rev id = 0x004a, patch id = 0x00000000 microcode: patch id that want to apply= 0x00000047 microcode: updated to patch id = 0x00000047 success Setting up local apic... apic_id: 1 done. Clearing memory 1048576K - 2097152K: ---------------- done CPU #1 Initialized All AP CPUs stopped PCI: 01:01.0 init PCI: 01:03.0 init PCI: 01:04.0 init for IRQ, reg 0x00000000 value 0x00000700 0x00000000 for IRQ, reg 0x00000001 value 0x00010000 0x00000000 for IRQ, reg 0x00000002 value 0x00010000 0x00000000 for IRQ, reg 0x00000003 value 0x00010000 0x00000000 for IRQ, reg 0x00000004 value 0x00010000 0x00000000 for IRQ, reg 0x00000005 value 0x00010000 0x00000000 for IRQ, reg 0x00000006 value 0x00010000 0x00000000 for IRQ, reg 0x00000007 value 0x00010000 0x00000000 for IRQ, reg 0x00000008 value 0x00010000 0x00000000 for IRQ, reg 0x00000009 value 0x00010000 0x00000000 for IRQ, reg 0x0000000a value 0x00010000 0x00000000 for IRQ, reg 0x0000000b value 0x00010000 0x00000000 for IRQ, reg 0x0000000c value 0x00010000 0x00000000 for IRQ, reg 0x0000000d value 0x00010000 0x00000000 for IRQ, reg 0x0000000e value 0x00010000 0x00000000 for IRQ, reg 0x0000000f value 0x00010000 0x00000000 for IRQ, reg 0x00000010 value 0x00010000 0x00000000 for IRQ, reg 0x00000011 value 0x00010000 0x00000000 for IRQ, reg 0x00000012 value 0x00010000 0x00000000 for IRQ, reg 0x00000013 value 0x00010000 0x00000000 for IRQ, reg 0x00000014 value 0x00010000 0x00000000 for IRQ, reg 0x00000015 value 0x00010000 0x00000000 for IRQ, reg 0x00000016 value 0x00010000 0x00000000 for IRQ, reg 0x00000017 value 0x00010000 0x00000000 RTC Init RTC: Checksum invalid zeroing cmos Invalid CMOS LB checksum enabling HPET @0xfed00000 PCI: 01:04.1 init PCI: 01:04.3 init set power on after power fail PCI: 02:03.0 init PCI: 02:04.0 init PCI: 02:05.0 init PCI: 04:01.0 init Reseting PHY... Done PCI: 04:06.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 done. Wrote the mp table end at: 00000020 - 0000021c Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 00000df8 checksum 5f51 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 33:stream_init() - rom_stream: 0xfffd0000 - 0xfffdee87 Found ELF candiate at offset 0 header_offset is 0 Try to load at offset 0x0 n_type: 00000001 n_name(8): ELFBoot n_desc(10): Etherboot n_type: 00000002 n_name(8): ELFBoot n_desc(6): 5.2.6 Loading Etherboot version: 5.2.6 Dropping non PT_LOAD segment malloc Enter, size 32, free_mem_ptr 00043194 malloc 0x00043194 New segment addr 0x20000 size 0x18024 offset 0xb0 filesize 0x891c (cleaned up) New segment addr 0x20000 size 0x18024 offset 0xb0 filesize 0x891c lb: [0x0000000000004000, 0x000000000004e000) segment: [0x0000000000020000, 0x000000000002891c, 0x0000000000038024) bounce: [0x000000007ff88000, 0x000000007ff9091c, 0x000000007ffa0024) Loading Segment: addr: 0x000000007ff88000 memsz: 0x0000000000018024 filesz: 0x000000000000891c [ 0x000000007ff88000, 000000007ff9091c, 0x000000007ffa0024) <- 00000000000000b0 Clearing Segment: addr: 0x000000007ff9091c memsz: 0x000000000000f708 Loaded segments verified segments closed down stream Jumping to boot code at 0x20000 entry = 0x00020000 lb_start = 0x00004000 lb_size = 0x0004a000 adjust = 0x7ffb2000 buffer = 0x7ff6c000 elf_boot_notes = 0x0001b160 adjusted_boot_notes = 0x7ffcd160 ROM segment 0x0000 length 0x0000 reloc 0x00020000 CPU 2088 Mhz Etherboot 5.2.6 (GPL) http://etherboot.org Tagged ELF for [E1000] Relocating _text from: [00020000,00039710) to [7fee68f0,7ff00000) Boot from (N)etwork or (Q)uit? N .Probing pci nic... [e1000-82541gi]Ethernet addr: 00:D0:68:09:EC:FD e1000: Valid Link not detected [e1000-82541gi]Ethernet addr: 00:D0:68:09:EC:FE Searching for server (DHCP)... ...Me: xxx.xxx.xxx.xxx, Server: 134.155.45.16, Gateway xxx.xxx.xxx.xxx Loading xxx.xxx.xxx.xxx:/htxlinux.0 ... (ELF)... ............................................................................................................. ........................................................................................................................................................... ........................................................................................................................................................... ........................................................................................................................................................... ........................................................................................................................................................... ...................................................................done Firmware type: LinuxBIOS

15 years, 2 months

[LinuxBIOS] boot from network

by Z Carno

I want to test if my linuxbios could boot from network . but have not done that before ,could anyone please help me to check if my steps is right? 1.install an os on ide hdd on the test MB. 2.copy the installed image file to another Server MB. 3.make some configuration for DHCP. 4.remove test MB ide hdd ,and use linuxbios boot . I have test windows boot from network before, its steps seems this . but I've no idea whether linux is this too. Thank you. Carno

15 years, 3 months

Re: [LinuxBIOS] New guy in LinuxBios

by Lu, Yinghai

Actually the irqtable entries is only for peer root pci bus scan when mptable is used. So you need to make sure mptable is right, and put entries for hypertransport chain other than on bus0. YH ________________________________ From: vincente.tsou(a)gmail.com [mailto:vincente.tsou@gmail.com] On Behalf Of Vincente Tsou Sent: Tuesday, June 20, 2006 7:05 PM To: Lu, Yinghai Cc: Stefan Reinauer; linuxbios(a)linuxbios.org Subject: Re: [LinuxBIOS] New guy in LinuxBios Dear YH, excuse me, how about the irq_tables.c? should I modify it like tyan/s2882 did. printk_debug("setting Onboard Broadcom NIC\n"); static const unsigned char slotIrqs_8131_1_9[4] = { 5, 9, 0, 0 }; pci_assign_irqs(bus_8131_1, 9, slotIrqs_8131_1_9); write_pirq_info(pirq_info, bus_8131_1,(9<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0, 0, 0, 0, 0, 0); pirq_info++; slot_num++; 2006/6/20, Lu, Yinghai <yinghai.lu(a)amd.com>: You need to update the entries at mptable.c for your slots or onboard pci device. YH -- Best Regards, Vincente Tsou Engineer R/D, S/W Dept. NEXCOM International Co. Tel: 886-2-82280606 Ext. 3205 Fax: 886-2-82280506 E-mail: vincentetsou(a)nexcom.com.tw Web: http://www.nexcom.com.tw/

15 years, 3 months

[LinuxBIOS] Possibility to get a OLPC developer's board [Reply-to: debian-custom-list]

by Knut Yrvin

First of all I'm sorry to cross-post this request. But I need urgent reply to know if somebody wants to team up in a project making Debian ready for the One Laptop per Child hardware. If there is somebody interested applying for OLPC developer board to make things work, please reply to debian-custom(a)lists.debian.org. My project proposal: After a tip from Walter Bender at MIT, I was subscribing to the devel-boards list for the One Laptop per Child project. Walter is president, software and content, of the One Laptop per Child foundation. My subscription was forwarded to the list moderator for approval. Then i got a nice e-mail from Jim Gettys. He wrote that if my interest in the list is to get a developer's board, then please follow the following instructions (look at the bootom): http://wiki.laptop.org/index.php/Developers_Program This will result in a developer's board if the request is at all reasonable, and you will be added to the mailing list (which is meant to be low volume announcements for people with boards). I wrote some suggestions for a plan to get the OLPC-machine up running April 5th 2006: http://lists.debian.org/debian-edu/2006/04/msg00016.html So people, I could apply for boards to realize this plan. (The plan is not at all finale, but a suggestion): 1. To make the Debian installer work with OLPC-machines 2. To make bare bone Debian run with network connectivety in a mesh network (IPv6) 3. Make the power management work 4. To make X and a window manager with simplified debloated desktop But with no developers interested doing the development, I see no reason for applying for boards. So it depends on what the Debian Edu and Debian contributers are interested in. It's a considerable job tailoring the different subsystem in Debian to OLPC hardware. The installer has to be tailored, the network mesh net support has to work, simplified debloated desktop has to be configured, and the power management has to work. We have done interesting things with Custom Debian Distributions and Debian Installer in the Skolelinux / Debian Edu environment before. It seems to me that more people have joined the Skolelinux / Debian Edu project. I believe the One Laptop per Child is important for Debian, and we should do this development. - What do you think about this suggestions? - Who are interested to develop tailored Debian Edu for OLPC-machines? Regards Knut Yrvin Project manager Skolelinux Norway

15 years, 3 months

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coreboot June 2006