I just released FILO 0.4.
http://te.to/~ts1/filo/
It can boot distro CDs if you give a proper command line.
SuSE 8.2 LiveEval CD worked without a glitch, I enjoyed the
KDE desktop, OpenOffice, etc, from the CD on an EPIA booted
from LinuxBIOS.
Also added support for booting from BIOS flash, to boot an
alternative bootloader like Etherboot.
PCI support in IDE driver is also added (or recovered), but
the native PCI mode is not fully tested.
I tried to configure EPIA (V1) code to use native mode,
and the ports read something not 0xff, but the drive doesn't
respond to soft reset.
I don't know the bug is in FILO, LinuxBIOS, or the hardware.
I'll work on config file support next time.
Version 0.4 ts1 2003-10-15
* Support for ATAPI CD-ROM.
* ISO-9660 filesystem is taken from a GRUB patch by
Leonid Lisovskiy <lly(a)pisem.net>. The filesystem code was originally
written by Kousuke Takai <tak(a)kmc.gr.jp> for GRUB/98 project.
* Support for mounting boot disk image of El Torito bootable CD-ROM.
("hdc1" means the boot disk image of the CD-ROM at hdc.)
* Support for memory as device, raw device as image, and
user-specifiable device offset and length.
(eg. boot: mem@0xfffd0000,0x10000)
* PCI support in IDE driver. Now it by default uses PCI enumeration
to find the PCI IDE controller, and can use native PCI mode
if the controller is configured to this mode by BIOS.
To disable this, turn off SUPPORT_PCI.
* Fixed Linux loader to boot RedHat 9 kernel properly.
--
Takeshi
Hello,
I have recently upgraded my dual MSI-6120 from 2xCeleron (Mendocino)
300@450MHz with 2xMSI-6905 slot 370 to slot 1 adapters to one Celeron2
1.3GHz (Tualatin) using a Slot-T adapter card. The plan is to equip the
mobo with 2xPIII or preferably 2xVIA C3 Nehemiah (when SMP capable).
The problem is that the latest MSI BIOS (v2.0) for the mobo does not
support Coppermine/Tualatin processors. The single GNU/Linux kernels
boot without problems but _extremely_ slowly, at least with a speed
reduction by a factor 10. hdparm -tT gives around 20/2 compared with
250/25 with the Mendocino CPU(s). For example uncompressing the kernel
takes minute(s) compared to seconds. After some trials and web searching
I suspect that the problem is with the level 2 cache not activated by
the BIOS.
I see the you have code in the linuxbios for activating caches.
i) Does this code work for 440BX motherboards?
ii) Is it possible to extract this code and try out after the kernel has
booted (slowly), to verify my assumption?
iii) Is there some other tool available for cache activation?
iv) One interesting continuation would be to try to replace the MSI
(AMI) BIOS with linuxbios, but as a first step I think this would be a
little risky.
Any ideas?
Thanks,
Svante
Hi linuxbiosians,
Heard and Read that Windows 2000 can be booted using
Linuxbios. Keeeeeeen and Interested in entering
linuxbios. Could i get the list of OS's
booted using LINUXBIOS and a brief explanation
document along with it ? or links plz....
I am stilll looking for a motherboard in Chennai,INDIA
Has anyone tried linuxbios in CHENNAI,INDIA ?
need your support to start linuxbios with.
Regards,
karthik bala guru
________________________________________________________________________
Yahoo! India Promos: Win TVs, Bikes, DVD players & more!
Go to http://in.promos.yahoo.com
* SONE Takeshi <ts1(a)tsn.or.jp> [031030 13:25]:
> On Thu, Oct 30, 2003 at 12:40:02PM +0100, Stefan Reinauer wrote:
> > * SONE Takeshi <ts1(a)tsn.or.jp> [031030 11:40]:
> > > On Thu, Oct 30, 2003 at 11:34:29AM +0100, Stefan Reinauer wrote:
> > > > I am using an etherboot payload that reads an elf image from
> > > > the first sectors on the disk. This works fine, I put filo there
> > > > so I can load a kernel from any filesystem. Unfortunately filo seems
> > > > to find no IDE controller, it says IDE channel 0 not found.
> > > > Etherboot and Linux can see the ide controller though (it's on bus 1)
> > >
> > > Maybe the problem is with my PCI code.
> > > Please send me the output log with DEBUG_ALL.
> >
> > You only seem to scan bus 0:
>
> Ok..
> My PCI scan routine starts from bus 0, and recurses when PCI bridges are
> found. I think I took this algorithm from pciutils.
>
> However your board has only host bridges on bus 0, so FILO doesn't know
> if bus 1 exists.
>
> I checked Etherboot and it just scans bus 0 to 255 unconditionally.
> I don't know which is better.
> Anyway attached patch changes the PCI scan to Etherboot way.
Thanks. with this patch it also works using PCI.
Stefan
--
Stefan Reinauer, SUSE LINUX AG
Teamleader Architecture Development
So need one customerization Installation image to execute the sh to install
conf file. Also the kernel in the installation image should support X server
without VGA init.
YH.
-----邮件原件-----
发件人: SONE Takeshi [mailto:ts1@tsn.or.jp]
发送时间: 2003年10月30日 22:21
收件人: YhLu
抄送: Stefan Reinauer; linuxbios(a)clustermatic.org
主题: Re: filo on Tyan s2880
On Thu, Oct 30, 2003 at 10:25:07AM -0800, YhLu wrote:
> So if the user installed the Linux Distribution to HD in normal BIOS and
> after that he flash the ROM to LinuxBIOS with FIFO and the system call
work
> without any problem.
If the user writes the FILO configuration file.
It will be possible that FILO loads the configuration file from
distribution CD and boot from the CD almost automatically,
and the distribution installer creates the FILO configuration file
on the hard disk, so the machine will boot from hard disk next time.
(the default location of the config file can be saved in CMOS)
So the LinuxBIOS pre-installed workstation will be possible.
--
Takeshi
SONE,
What is the FIFO URL and the status?
Is it some kind payload for LinuxBIOS?
Regards
YH.
-----邮件原件-----
发件人: Stefan Reinauer [mailto:stepan@suse.de]
发送时间: 2003年10月30日 4:33
收件人: SONE Takeshi
抄送: linuxbios(a)clustermatic.org
主题: Re: filo on Tyan s2880
* SONE Takeshi <ts1(a)tsn.or.jp> [031030 13:25]:
> On Thu, Oct 30, 2003 at 12:40:02PM +0100, Stefan Reinauer wrote:
> > * SONE Takeshi <ts1(a)tsn.or.jp> [031030 11:40]:
> > > On Thu, Oct 30, 2003 at 11:34:29AM +0100, Stefan Reinauer wrote:
> > > > I am using an etherboot payload that reads an elf image from
> > > > the first sectors on the disk. This works fine, I put filo there
> > > > so I can load a kernel from any filesystem. Unfortunately filo seems
> > > > to find no IDE controller, it says IDE channel 0 not found.
> > > > Etherboot and Linux can see the ide controller though (it's on bus
1)
> > >
> > > Maybe the problem is with my PCI code.
> > > Please send me the output log with DEBUG_ALL.
> >
> > You only seem to scan bus 0:
>
> Ok..
> My PCI scan routine starts from bus 0, and recurses when PCI bridges are
> found. I think I took this algorithm from pciutils.
>
> However your board has only host bridges on bus 0, so FILO doesn't know
> if bus 1 exists.
>
> I checked Etherboot and it just scans bus 0 to 255 unconditionally.
> I don't know which is better.
> Anyway attached patch changes the PCI scan to Etherboot way.
Thanks. with this patch it also works using PCI.
Stefan
--
Stefan Reinauer, SUSE LINUX AG
Teamleader Architecture Development
Sone,
So if the user installed the Linux Distribution to HD in normal BIOS and
after that he flash the ROM to LinuxBIOS with FIFO and the system call work
without any problem.
YH.
-----邮件原件-----
发件人: SONE Takeshi [mailto:ts1@tsn.or.jp]
发送时间: 2003年10月30日 10:13
收件人: YhLu
抄送: Stefan Reinauer; linuxbios(a)clustermatic.org
主题: Re: filo on Tyan s2880
On Thu, Oct 30, 2003 at 09:49:49AM -0800, YhLu wrote:
> What is the FIFO URL and the status?
> Is it some kind payload for LinuxBIOS?
FILO loads vmlinuz and ELF kernel from filesystem (like ext2)
on the local IDE hard disk, CD-ROM, CompactFlash, or ROM.
It's working well on my EPIA, and also reported to work with
K8 based boards including Tyan's.
See this for details: http://te.to/~ts1/filo/
My plan is to add support for configuration file, so the default kernel
location and parameters will no longer be hard coded in the Flash, and
Stephan told me maybe he can support this config file in the future
releases of SuSE installation CDs.
--
Takeshi
Stefan Reinauer <stepan(a)suse.de> writes:
> Hi,
>
> I'm running out of registers with the Quartet code, I think it's in
> spd_set_memclk(). That function has quite a lot of state variables, so
> it seems hard to optimize registers away. The code goes fine without
> the smbus_write_byte() but those are needed to select the correct
> spdrom. Is it viable to add a couple of hooks to the code to trigger
> selection of the hub channel? I guess doing this with every spd_read_byte
> is quite some overkill and we might save some registers that way.
That sounds like a reasonable idea.
To confirm where you are running out of registers I would suggest
commenting out the code in question to see if it compiles without it.
Knowing that should help craft a solution.
Depending on the nature of the problem and how we are running out of
registers it might make sense to store a couple of values in a single
variable.
If you want to keep it from running forever before it gives up I suggest
-fmax-allocation-passes=8 -fdebug-live-range-conflicts.
The -fdebug-live-range-conflicts is not terribly interesting except it
tells you how many passes romcc goes through before it gives up.
The -fmax-allocation-passes=8 sets the limit on the number of register allocation
passes romcc will use. The most I have seen it make and succeed in my regression
tests is 6. And the default is 100.
Eric
I just found my old WD Caviar drive. It was in an unused PC.
It's 1.2GB, WDC AC31200F.
And the problem Steve reported is reproduced here.
I'll see if I can fix this.
--
Takeshi
I'm trying to use filo to boot from a cdrom which is on hdb, it looks to me
that using boot: hdb1 should do it but i'm getting Unsupported sector size
2352.
Eltorito is enabled in the Config file.
any suggestions?
ICQ 4186920
