Maybe this has been asked before, but i've been thinking about exporting
functions like serial console, debugger entry points, etc. the PC BIOS
uses the interrupt vectors as, well, vectors. I remember the C=64 had a
jump table at a fixed address. I was wondering how hard it would be to
use an ELF symbol table as a jump table, or at least as the source of
information to build one.
--
Jeremy Jackson
Coplanar Networks
(519)897-1516
http://www.coplanar.net
Ron/Eric/Stephan/Ollie,
Please check the patch.
1. some tyan volatile messing because of ROMCC changes.
2. S2882 interrupt line assignment in mptable.c
3. exclude range for flash_rom.
4. better ht_setup_chainx() in incoherent_ht.c ---> change share bus 0 to
different bus for different incoherent HT link.
5. fix one bug about io and mem allocation for multi ht links. --- in
northbridge.c
Mark it if used before assign final value.
6. enable amd/quartet to init multi incoherent HT link in auto.c --- not
test, no MB on hand.
7. enable S2885 to init multi incoherent HT link in auto.c
Regards
YH
SMP or single CPU?
If SMP, and io apci is enabled, you may only focus on mptable.c and
irq-tables.c may only contain device that point to the peer roots bus.
YH
_____
From: Dave Aubin [mailto:daubin@actuality-systems.com]
Sent: Thursday, September 30, 2004 11:53 AM
To: Dave Aubin; linuxbios(a)clustermatic.org
Subject: RE: PCI IRQ tables
Hi,
I didn't get an answer from the previous post so I'll just simplify
a little bit. Can someone point me to where I can learn more about
the magic that makes the pci_irq files?
Thanks,
Dave:)
_____
From: linuxbios-admin(a)clustermatic.org
[mailto:linuxbios-admin@clustermatic.org] On Behalf Of Dave Aubin
Sent: Wednesday, September 29, 2004 5:18 PM
To: linuxbios(a)clustermatic.org
Subject: PCI IRQ tables
Hi,
What happens if the pci irq mapping is a mess? I know you can use getpir
with a good bios, but what if you don't have one? Is there a way to get the
pci irq mapping without a standard bios? If you had to do it by hand could
you explain how it should be done?
Thanks,
Dave
PCI IRQ specification:)
http://www.microsoft.com/whdc/archive/pciirq.mspx
-----Original Message-----
From: Ronald G. Minnich [mailto:rminnich@lanl.gov]
Sent: Thursday, September 30, 2004 3:49 PM
To: Dave Aubin
Cc: linuxbios(a)clustermatic.org
Subject: RE: PCI IRQ tables
you can find the definition of $PIR standard at microsoft -- I always
lose it, but google always finds it.
ron
Hi,
No I think my question is even simpler than that. Where do I go to
learn about the magic that is inside the mp and irq files?
Thanks,
Dave:)
________________________________
From: YhLu [mailto:YhLu@tyan.com]
Sent: Thursday, September 30, 2004 3:14 PM
To: Dave Aubin; linuxbios(a)clustermatic.org
Subject: RE: PCI IRQ tables
SMP or single CPU?
If SMP, and io apci is enabled, you may only focus on mptable.c and
irq-tables.c may only contain device that point to the peer roots bus.
YH
________________________________
From: Dave Aubin [mailto:daubin@actuality-systems.com]
Sent: Thursday, September 30, 2004 11:53 AM
To: Dave Aubin; linuxbios(a)clustermatic.org
Subject: RE: PCI IRQ tables
Hi,
I didn't get an answer from the previous post so I'll just simplify
a little bit. Can someone point me to where I can learn more about
the magic that makes the pci_irq files?
Thanks,
Dave:)
________________________________
From: linuxbios-admin(a)clustermatic.org
[mailto:linuxbios-admin@clustermatic.org] On Behalf Of Dave Aubin
Sent: Wednesday, September 29, 2004 5:18 PM
To: linuxbios(a)clustermatic.org
Subject: PCI IRQ tables
Hi,
What happens if the pci irq mapping is a mess? I know you can use
getpir
with a good bios, but what if you don't have one? Is there a way to get
the
pci irq mapping without a standard bios? If you had to do it by hand
could
you explain how it should be done?
Thanks,
Dave
Hi,
I didn't get an answer from the previous post so I'll just simplify
a little bit. Can someone point me to where I can learn more about
the magic that makes the pci_irq files?
Thanks,
Dave:)
________________________________
From: linuxbios-admin(a)clustermatic.org
[mailto:linuxbios-admin@clustermatic.org] On Behalf Of Dave Aubin
Sent: Wednesday, September 29, 2004 5:18 PM
To: linuxbios(a)clustermatic.org
Subject: PCI IRQ tables
Hi,
What happens if the pci irq mapping is a mess? I know you can use
getpir
with a good bios, but what if you don't have one? Is there a way to get
the
pci irq mapping without a standard bios? If you had to do it by hand
could
you explain how it should be done?
Thanks,
Dave
I guess 82801er need that too.
YH
-----Original Message-----
From: Ronald G. Minnich [mailto:rminnich@lanl.gov]
Sent: Thursday, September 30, 2004 9:38 AM
To: linuxbios(a)clustermatic.org
Subject: changes today.
A few changes that are important to some of you.
First, I found a fun problem in the i82801dbm early smbus code. It starts
an op, then waits for the 'active' bit to go to zero. The CPU is so fast
that it polls before the bit goes to one, sees that it is zero, says 'the
op is done', then gets an error because the right done bit is not set. The
result on the digital Logic adl855pc was that it would not reliably read
the smbus.
So I've added, to this file:
southbridge/intel/i82801dbm/i82801dbm_early_smbus.c
this function:
> static int smbus_wait_until_active(void)
> {
> unsigned long loops;
> loops = SMBUS_TIMEOUT;
> do {
> unsigned char val;
> smbus_delay();
> val = inb(SMBUS_IO_BASE + SMBHSTSTAT);
> if ((val & 1)) {
> break;
> }
> } while(--loops);
> return loops?0:-4;
> }
which I hope is the right way to do this :-)
And in the smbus_read_byte, it now calls the function in this manner:
> /* poll for it to start */
> if (smbus_wait_until_active() < 0) {
> return -4;
> }
in other words, wait until it is started BEFORE you see if it is done :-)
This affects all mobos using this part; let me know if it is trouble for
you. It should not be.
Next, flash_and_burn now has an erase_block_jedec function, and I have
added support for the SST firmware hub parts. Tested and working on the 1
MBYTE SST part (49LF008A)
ron
_______________________________________________
Linuxbios mailing list
Linuxbios(a)clustermatic.org
http://www.clustermatic.org/mailman/listinfo/linuxbios
A few changes that are important to some of you.
First, I found a fun problem in the i82801dbm early smbus code. It starts
an op, then waits for the 'active' bit to go to zero. The CPU is so fast
that it polls before the bit goes to one, sees that it is zero, says 'the
op is done', then gets an error because the right done bit is not set. The
result on the digital Logic adl855pc was that it would not reliably read
the smbus.
So I've added, to this file:
southbridge/intel/i82801dbm/i82801dbm_early_smbus.c
this function:
> static int smbus_wait_until_active(void)
> {
> unsigned long loops;
> loops = SMBUS_TIMEOUT;
> do {
> unsigned char val;
> smbus_delay();
> val = inb(SMBUS_IO_BASE + SMBHSTSTAT);
> if ((val & 1)) {
> break;
> }
> } while(--loops);
> return loops?0:-4;
> }
which I hope is the right way to do this :-)
And in the smbus_read_byte, it now calls the function in this manner:
> /* poll for it to start */
> if (smbus_wait_until_active() < 0) {
> return -4;
> }
in other words, wait until it is started BEFORE you see if it is done :-)
This affects all mobos using this part; let me know if it is trouble for
you. It should not be.
Next, flash_and_burn now has an erase_block_jedec function, and I have
added support for the SST firmware hub parts. Tested and working on the 1
MBYTE SST part (49LF008A)
ron
When p4 power up , what's the value and meaning of the
registers such as ebx, edx etc?
Who know the information, need help.
tks
zhu
__________________________________
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