How about add acpi that only is related to pci to the LinuxBIOS?
Otherwise how make the PCI-E device get interrupt assigned?
Sent: Thursday, September 23, 2004 6:54 PM
Subject: RE: Intel E7520 support
How to set let the PCI-E device know the interrupt assign it?
Under Normal BIOS, the device can get interrupt via ACPI, and there is no
entry in mptable for it.
So when using LinuxBIOS, How to do ?
> Stefan Reinauer <stepan(a)openbios.org> writes:
> > * Liu Tao <liutao(a)safe-mail.net> [040922 04:57]:
> > > I googled some results of amdk8 linuxbios, and seems after
> > > dev_enumerate() AMD8111 is not at bus0. So does it mean
> when we are
> > > running from the BIOS ROM the IO HUB must be at bus0, and when we
> > > are running in RAM the bus number doesn't matter?
> Yes. So long as linux can find it. We just put it at
> bus 0 as convenience so we can find it easily.
> Putting the hypertransport chains on their own bus is clearer
> reflection of reality than putting extra devices on bus 0.
It's even simpler than that. Before the HT and IO routing is initialized the
BIOS ROM access happens because of an HT feature called the compatibility
bit. This bit is set for all accesses that are not covered by any routing
table io/memory/mem-mapped-io etc. Requests with the compatibility bit set
are routed down the link with the IO hub on it and generally, 8131 can route
to the PCI bus, these end up in the southbridge/iohub which in the case of
ROM BIOS address routes to the ROM.
Once the HT and routing is initialized BIOS ROM addresses would be routed to
by the routing tables to the BIOS rom, this may be on Bus 0 or Bus 1 or any
other number, as long as the routing tables are appropriately setup.
I finally made the jump and compiled a freebios2 image for the Epia M
but it's not booting at all. I used the default Config.lb, except that
I changed the serial speed to 115200 and the payload to etherboot.
Now, I get nothing on the serial port and the system locks up hard.
Booting with the stock BIOS doesn't even bring it to life unless I clear
CMOS, remove the power and let it sit for a little bit. Anybody know
what I can try besides banging my head against the wall? Thanks.
The linuxbios website says to get the source tree from:
cvs -d:pserver:firstname.lastname@example.org:/cvsroot/freebios login
But it always times out (tried from varios locations).
When I go to the "CVS Repository" link, it says to get it from:
cvs -d:pserver:email@example.com:/cvsroot/freebios login
That worked, but what I get appears to be a very old version.
There's no freebios2 directory and nothing updated from this year.
On this page I see a freebios2 directory:
What is the correct way to get the latest source tree?
Change to -O
From: Jeff Stevens [mailto:firstname.lastname@example.org]
Sent: Thursday, September 23, 2004 11:27 AM
Subject: Re: freebios2 compilation error (romcc)
I also found if I remove the -O2 option from romcc it
compiles fine, but then auto.inc is way to big.
--- Jeff Stevens <jsteve17(a)yahoo.com> wrote:
> I have downloaded the latest version of LinuxBIOS
> AMD64 (freebios2), and am having problems compiling
> it. It is erroring out when it runs romcc. Here is
> screen dump of the error:
> ./romcc -mcpu=k8 -O2 ./auto.E > auto.inc
> auto.c:118.49: coherent_ht.c:291.41:
> coherent_ht.c:410.23: coherent_ht.c:645.27:
> Load address out of bounds
> make: *** [auto.inc] Error 1
> I tried commenting out those lines, and if I just
> comment out line 645 of coherent_ht.c (result =
> setup_smp();) it compiles fine. What do I need to
> to get this to compile correctly.
> Jeff Stevens
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Linuxbios mailing list
I have downloaded the latest version of LinuxBIOS for
AMD64 (freebios2), and am having problems compiling
it. It is erroring out when it runs romcc. Here is a
screen dump of the error:
./romcc -mcpu=k8 -O2 ./auto.E > auto.inc
Load address out of bounds
make: *** [auto.inc] Error 1
I tried commenting out those lines, and if I just
comment out line 645 of coherent_ht.c (result =
setup_smp();) it compiles fine. What do I need to do
to get this to compile correctly.
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(1) The bios from original MB have to handle registers
40~4F, but I check them in i845GV datasheet, they are
all intel reserved. Where can I find information
about such intel reserved registers?
(2) what earlymtrr doing for? Is it related to ddr
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I used : mkelfImage-2.5
./objdir/sbin/mkelfImage -t bzImage-i386 --kernel=/home/sagivy/vmlinuz \
--command-line="console=ttyS0,115200 root=/dev/hda3" \
I had problem in building mkelfImage:
linux-i386/head.S: Assembler messages:
linux-i386/head.S:458: Error: junk at end of line, first unrecognized
character is `U'
So in file convert.h I change from:
#define CONVERT_MAGIC 0XA5A5A5A5UL
#define CONVERT_MAGIC 0XA5A5A5A5
and then it was built.
From: David Hendricks [mailto:email@example.com]
Sent: Tuesday, September 21, 2004 6:16 PM
Subject: Re: Boot problem
As I recall, that's a message Etherboot tends to spew when there's
something seriously wrong with the elf image. How did you create the
elf? Which version of mkelfImage (If that's what you used)?
On Tue, 21 Sep 2004 10:21:23 +0200
"Sagiv Yefet" <sagivy(a)3vium.com> wrote:
> I prepared a kernel elf file.
> The station is up and it loads the elf file.
> Then nothing happens.
> Just print something:
> Firmware: bios is Linuxbios
> What can be the problem?
Linuxbios mailing list
In AMD's <<BIOS and Kernel developer's Guide>> 3.3.16 LDTi Bus Number
Registers section it says that if the link contains the HT IO hub the
bus number must be programmed to 0. But amdk8_scan_chains() is called with
max=0, so it won't write the secondary register of any link to 0? Or some
other code handles this case?