Stefan Reinauer <stepan(a)openbios.org> writes:
* Liu Tao <liutao(a)safe-mail.net> [040922
> I googled some results of amdk8 linuxbios, and seems after
> dev_enumerate() AMD8111 is not at bus0. So does it mean
when we are
> running from the BIOS ROM the IO HUB must be
at bus0, and when we
> are running in RAM the bus number doesn't matter?
Yes. So long as linux can find it. We just put it at
bus 0 as convenience so we can find it easily.
Putting the hypertransport chains on their own bus is clearer
reflection of reality than putting extra devices on bus 0.
It's even simpler than that. Before the HT and IO routing is initialized the
BIOS ROM access happens because of an HT feature called the compatibility
bit. This bit is set for all accesses that are not covered by any routing
table io/memory/mem-mapped-io etc. Requests with the compatibility bit set
are routed down the link with the IO hub on it and generally, 8131 can route
to the PCI bus, these end up in the southbridge/iohub which in the case of
ROM BIOS address routes to the ROM.
Once the HT and routing is initialized BIOS ROM addresses would be routed to
by the routing tables to the BIOS rom, this may be on Bus 0 or Bus 1 or any
other number, as long as the routing tables are appropriately setup.