Hello,
I recently got my hands on boardviews of many Asus P8x7x series
mainboards, and some offshoots such as Z77-A and Sabertooth Z77, and
have also found a way to extract VBT data and the USB port config out
of the vendor firmware image (which isn't really a straight image, but
what looks like an update capsule), allowing me to attempt something
quite ambitious given I only have the P8Z77-M on hand: Bring coreboot
to the entire family.
Again because I only have the vendor firmware image and boardview to
go by, I will only be able to put out an untested new board patch,
hence I am calling for anyone with these boards, that aren't already
in the tree, to help me test them, and to get things I can't get out
of firmware image, such as HDA verbs and GPIO setup, by running
autoport on your board.
Additionally, if you have a P8Z77-V (Hello Bill!), please test this patch:
https://review.coreboot.org/c/coreboot/+/85413
And if you have a P8Z77-M PRO, please test your serial port, and if changing
it to use serial port A like P8Z77-M does, make the serial port work.
Now, during my survey of the board family, I found that:
1. They link their power LEDs to only one of two GPIOs on the PCH: 8
or 27. That's easily determined from the boardview.
2. Except for P8C WS which I can't get a boardview for, this family
only uses one of two Nuvoton super I/Os: NCT5535D or NCT6779D. 6779 is
well known, but I cannot find the datasheet for 5535, and the pinout
for the closest thing I can find, NCT5532D, have the pins shifted by
approximately 3 pins, and there may be more differences.
Does anyone know anything about NCT5535D or can hook me up with a datasheet?
Thanks
Keith
Hello coreboot,
Please note that the leadership meeting scheduled for Wednesday, December 25, 2024,
has been canceled as it falls on Christmas Day.
Thank you for your understanding, and I wish you a joyous and merry Christmas.
Best regards,
Mina.
Issue #121 has been updated by Anastasios Koutian.
Anastasios Koutian wrote in #note-100:
> Have been using this change: https://review.coreboot.org/c/coreboot/+/78609 since it was merged (May 23) and haven't seen any freezes.
> It's possible that this solves the issue. Can others confirm?
Still no freezes since.
----------------------------------------
Bug #121: T520: Hangs in OS
https://ticket.coreboot.org/issues/121#change-1995
* Author: Firstname Lastname
* Status: In Progress
* Priority: Normal
* Category: chipset configuration
* Start date: 2017-06-09
* Affected hardware: SNB, IVY
* Affected OS: -
----------------------------------------
I have been running coreboot since 2017.04.15 and have experienced hangs ever since then. It was suggested by folk on the IRC that I run memtest to check for incorrect raminit causing errors, however I have run memtest for 12 hours straight with no errors.
Due to the ambiguous nature of the hangs (immediate freeze with no warning signs, audio gets stuck repeating the last 50ms or so of noise, not sure what this effect is called) I don't have much useful information other than the .config and dmesg. However one thing I can say with high confidence is that the hangs occur significantly more frequently in Linux (*buntu distros) than Windows 10. Within an hour of launching Linux a hang is likely, whereas Windows typically runs for many hours before a hang occurs. I considered this an insignificant anecdotal anomaly at first but over the course of the nearly 2 months I have been running coreboot it seems to be a solid trend. The hangs occur anywhere, typically during mere desktop usage or basic web browsing.
Additionally there is another form of hang I experience where the screen goes black except for some sort of graphical corruption down the left side (http://i.imgur.com/4zWrlpX.jpg), whether this is related to the more common total freeze hangs I don't know but I figured I should include it nonetheless. These hangs only occur about 1:20 compared to the regular hangs.
---Files--------------------------------
config (20.7 KB)
dmesg.txt (57.3 KB)
cbmem-raminit.txt (62 KB)
lspci.txt (29.6 KB)
cpuinfo.txt (3.94 KB)
defconfig (1023 Bytes)
defconfig (699 Bytes)
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Issue #574 has been reported by Alicja Michalska.
----------------------------------------
Bug #574: Stack corruption in romstage on Intel platform (ADL-N) with recent builds
https://ticket.coreboot.org/issues/574
* Author: Alicja Michalska
* Status: New
* Priority: Normal
* Category: coreboot common code
* Target version: none
* Start date: 2024-12-17
* Affected versions: master
----------------------------------------
While building from master (testing CB:85609), I've noticed CBMEM complaining about stack corruption.
Older build made a ~month ago did not experience the same issue. Maybe caused by Xeon-SP refactoring?
`[INFO ] CBFS: Found 'fallback/romstage' @0x21d40 size 0x11c28 in mcache @0xfef8c28c
[DEBUG] BS: bootblock times (exec / console): total (unknown) / 465 ms
[NOTE ] coreboot-24.08-922-gf9b4c5a996dc-dirty Mon Dec 16 23:28:48 UTC 2024 x86_32 romstage starting (log level: 8)...
[ERROR] Stack corruption detected at eip: 0xffc74870
[DEBUG] pm1_sts: 0000 pm1_en: 0000 pm1_cnt: 00001c00
[DEBUG] gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
[DEBUG] gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
[DEBUG] gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
[DEBUG] gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
[DEBUG] TCO_STS: 0000 0000
[DEBUG] GEN_PMCON: d8a01a78 00002200
[DEBUG] GBLRST_CAUSE: 00000002 00000000
[DEBUG] HPR_CAUSE0: 00000002
[DEBUG] prev_sleep_state 0 (S0)
[INFO ] OC Watchdog: disabling watchdog timer
[DEBUG] Abort disabling TXT, as CPU is not TXT capable.
[SPEW ] CBFS DEBUG: _cbfs_alloc(name='fspm.bin', alloc=0x00000000(0xfef87e98), force_ro=false, type=-1)
[DEBUG] FMAP: area COREBOOT found @ c50200 (3866112 bytes)
[INFO ] Fixed Decode Window: SPI flash base=0x600000, Host base=0xff600000, Size=0xa00000
[INFO ] CBFS: Found 'fspm.bin' @0x58dc0 size 0xc0000 in mcache @0xfef8c414
[DEBUG] FMAP: area RW_MRC_CACHE found @ c00000 (65536 bytes)
[SPEW ] MRC cache found, size 63176 bytes
[SPEW ] bootmode is set to: 2 (boot assuming no config change)`
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Hello coreboot!
We are pleased to announce that our upcoming review session is scheduled for Wednesday, December 18, 2024:
https://meet.google.com/kpu-yozw-gtt
As usual, we'll begin by reviewing a few patches together, then switch to individual reviews.
However, everyone will still be available if you have questions about the patch you're reviewing.
Here is the link to the list of patches to be reviewed this week:
(https://docs.google.com/spreadsheets/d/1io-tewVlkX3PAkhR9ttCKjJXiXR9Emy6qsY…).
Kindly add any specific patches you'd like the group to review to the top of the sheet.
Thank you.
Best regards,
Mina.
Issue #571 has been reported by Wreg Yek.
----------------------------------------
Support #571: Keyboard scan codes of HP Elitebook 2170p under coreboot are different with those under oem firmware.
https://ticket.coreboot.org/issues/571
* Author: Wreg Yek
* Status: New
* Priority: Normal
* Target version: none
* Start date: 2024-11-23
* Affected hardware: HP Elitebook 2170p
* Affected OS: GNU/Linux with systemd v257-rc1 or later
----------------------------------------
HP Elitebook 2170p is weird compared with many other Elitebooks supported by coreboot, for its keyboard scan codes under coreboot is different with those under oem firmware, regardless of the same set of EC firmware blobs are used.
The scan codes under oem firmware conform to the upstream [60-keyboard.hwdb](https://github.com/systemd/systemd/blob/main/hwdb.d/60-ke…, while after systemd v257-rc1, the `KEYBOARD_KEY_66=pickup_phone` within [upstream](https://github.com/systemd/systemd/commit/93b078c3dd40b10eed34a77… 60-keyboard.hwdb starts to conflict with the scan codes of backspace key under coreboot, where it is 0x66.
Besides backspace, I have collected the scan codes of all Fn-keys under coreboot into the attached 61-2170p-kb.hwdb, which is adjusted to the default SMBIOS tables of coreboot for Elitebook 2170p, and could be used to walk around the scan code conflict.
---Files--------------------------------
61-2170p-kb.hwdb (508 Bytes)
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# 2024-12-11- coreboot Leadership Meeting
## Attendees
Felix Singer, Jon Murphy, David Hendricks, Mina Asante, Werner Zeh, Matt DeVillier, Jay Talbott,
Julius Werner, Maximilian Brune, Andre, Alicja Michalska, Karthik, Felix Held, Jeremy Compostella,
Christian Walter.
## Announcements & Events
* coreboot 24.12 release tag scheduled for December 18.
* Please mark patches you want merged before the release with the hashtag “coreboot_release_2412”.
* Patches which need to be merged afterwards (e.g. toolchain related) are marked with the hashtag “coreboot_post_release_2412”.
## Open Action Items
* 2024-11-27
* Send out poll with regards to LLM usage (requested by SFC)
* 2024-10-30
* Add clarification to docs, “do not use gerrit change-id or CB: format in reference to already-merged patches”.
* 2024-10-16
* Matt: Set up a meeting to discuss board status alternatives and send out invites.
* Decouple data collection with uploading
* Require gerrit credentials or other auth to push
* Json format?
* https://github.com/chrultrabook/linux-tools/blob/main/debugging.sh
* 2024-09-18
* Jon: Schedule a dedicated meeting to discuss the Coverity defects and action plan.
* Werner: Send out an invite for the meeting.
Sent out a poll to find a time slot: https://rallly.co/invite/1c8J3azXAcje
* 2024-05-01
* Nick Van Der Harst volunteered for Dutch. "gogo gogo" would like to translate to Russian (?)
* 2024-01-10
* Nico: (https://review.coreboot.org/q/topic:enforce_region_api)
* Daniel: Look at how we want to localize (non console) strings for coreboot. Long term project.
## Minutes
### Chaos Computer Congress 38
* Felix Singer, Alicja Michalska, and others will be there
* (https://events.ccc.de/congress/2024/hub/en/assembly/osfw/)
* (https://events.ccc.de/congress/2024/hub/en/event/corebooting-intel-based-sy…)
### [David] Preemptively cancel the next leadership meeting, currently scheduled for Christmas day?
* Yes, cancelled.
### [jpmurphy] When is the next release? The release page says upcoming Nov 24 (https://doc.coreboot.org/releases/index.html)
* Pushed to late December due to holiday scheduling.
* Just need to make review + merge patches tagged for the release.
### [alicja] Customers are asking about dynamically configuring FSP parameters
* Need to revive some runtime configuration mechanisms (e.g. CFR: (https://review.coreboot.org/c/coreboot/+/74121))
* Try using the newfangled process so it doesn't get hamstrung like previous attempts:
(https://docs.google.com/document/d/1gTWR4bnaapzhgDfoEDf_izNj9F3O8BqNpyTfpgn…)
### [alicja] ARM64 and potentially RISC-V - Standardize SoC tree and provide minimal flattened
device tree.
* Make it easy to use the coreboot framebuffer and such.
* ARM64 is a bit of a mess, the more alicja works on standards compliance the more issues she runs into.
* Example: u-boot has a generic device tree that provides generic interrupts, FB, etc. and then Linux adds things like audio.
* Reduce reliance on the payload to modify the devicetree, since right now Depthcharge does a lot
of work and we'd like to improve support for u-boot SPL, EDK2, etc.
* Look at Universal Payload (UPL)?
# Next Leadership Meeting
* January 8,2025.
* [coreboot Calendar](https://coreboot.org/calendar.html).
# Notice
* Decisions shown here are not necessarily final, and are based
on the current information available. If there are questions or comments
about decisions made, or additional information to present, please put
it on the leadership meeting agenda and show up if possible to discuss it.
Of course items may also be discussed on the mailing list, but as it's
difficult to interpret tone over email, controversial topics frequently
do not have good progress in those discussions. For particularly
difficult issues, it may be best to try to schedule another meeting.
# coreboot leadership meeting minutes
https://docs.google.com/document/d/1NRXqXcLBp5pFkHiJbrLdv3Spqh1Hu086HYkKrgK…
We are a quite late with the upcoming release this time, but we didn't
forget it. The tag is planned for December 18th.
Patches which should make it into the release are marked with the
hashtag
coreboot_release_2412
Patches which need to be merged afterwards (e.g. toolchain related) are
marked with the hashtag
coreboot_post_release_2412
As always, the final announcement will be done around one week later,
and this time during the 38th Chaos Communication Congress in Hamburg!
Hope to see you there :)
Felix
Dear Friends, I invite you to a joint ''DUG#8 & vPub 0xD'' event next Thursday:
1. on DUG (5 PM UTC) we will discuss the Dasharo distribution of
coreboot opensource PC firmware and explore its new feature: a
built-in tiny OS called DTS (Dasharo Tools Suite)
2. on vPub (7 PM UTC) we will be having an Opensource Online Party :
with a cozy free-for-all chat about everything opensource
firmware/hardware-related, as well as a few planned talks by our peers
who would like to share their hard-won in-depth knowledge:
* how to analyze the proprietary firmware images of AMD boards
* how to check if your AMD board is not blocked by Platform Secure
Boot from running the opensource firmware
* how to improve the security of your homelab & intranet networks from
the low-level angle
* how to ensure that your opensource firmware builds are reproducible.
Also, you may learn about rare devices that support the opensource
firmwares and are hard to stumble upon elsewhere
Join links & full events schedule are available here (both video
streams and text chats will be available) :
https://vpub.dasharo.com/e/15/dasharo-user-group-8
You are highly welcome and we will be waiting for you!
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/