#95: Run coreboot in VirtualBox
---------------------------------+------------------------------------------
Reporter: uwe | Owner: somebody
Type: defect | Status: new
Priority: minor | Milestone:
Component: misc | Version:
Keywords: | Dependencies:
Patchstatus: there is no patch |
---------------------------------+------------------------------------------
It would be nice if we could test coreboot images in VirtualBox, see
http://virtualbox.org/.
VirtualBox does not (yet) provide a simple mechanism to use a different
BIOS in their emulated machines (something like "-L" in qemu). Instead the
BIOS image (a custom bochs BIOS + LGPL'g VGABIOS) is converted to C code
(an array of bytes, or the like) and merged into the VirtualBox
executable.
The relevant files are
{{{
src/VBox/Devices/PC/DevPcBios.cpp
bldprogs/bin2c.c
}}}
if someone want to hack VirtualBox to easily support using coreboot images
instead of their usual BIOS.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/95>
coreboot <http://www.coreboot.org/>
I wanted to know which physical port of my multiple USB controllers have
the debug capability. There was no way to find that easily, so I created
a tool which will do most of the work for the user.
Example output:
The following PCI devices support a USB debug port (says lspci):
0000:00:1d.7
The following PCI devices support a USB debug port (says the kernel):
0000:00:1d.7
PCI device 0000:00:1d.7, USB bus 3, USB physical port 1
Currently connected high-speed devices:
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=ehci_hcd/6p, 480M
|__ Port 2: Dev 20, If 0, Class=stor., Driver=usb-storage, 480M
The output can be improved, but it's a good start.
Regards,
Carl-Daniel
--
http://www.hailfinger.org/
#131: New flashrom motherboard support
---------------------------------+------------------------------------------
Reporter: anonymous | Owner: somebody
Type: enhancement | Status: new
Priority: trivial | Milestone: Going mainstream
Component: flashrom | Version: v2
Keywords: flashrom asus | Dependencies:
Patchstatus: there is no patch |
---------------------------------+------------------------------------------
Did not know where I should put this but the bugtracker seemed like the
right place.
I tried flashrom and it could not detect my chip on my ASUS P5ND2-SLI
Deluxe motherboard. The board has a SST49LF004B flash chip and after
enforcing the right chip flashrom seems to work fine.
{{{
# ./flashrom -V -f -r -c SST49LF004A/B test
Calibrating delay loop... 796M loops per second, 100 myus = 201 us. OK.
No coreboot table found.
WARNING: No chipset found. Flash detection will most likely fail.
Probing for SST SST49LF004A/B, 512 KB: probe_jedec: id1 0x21, id2 0x5e,
id1 parity violation
No EEPROM/flash device found.
Force read (-f -r -c) requested, forcing chip probe success:
Probing for SST SST49LF004A/B, 512 KB: Found chip "SST SST49LF004A/B" (512
KB) at physical address 0xfff80000.
Force reading flash... done.
}}}
This should probably apply to the P5ND-SLI board, too.
What do you need from me for adding autodetection of this board/chip?
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/131>
coreboot <http://www.coreboot.org/>
#135: Flashrom deletes MAC addresses on Tyan Tomcat n3400B (S2925-E)
---------------------------------+------------------------------------------
Reporter: Jan@… | Owner: somebody
Type: defect | Status: new
Priority: major | Milestone:
Component: flashrom | Version: v2
Keywords: | Dependencies:
Patchstatus: there is no patch |
---------------------------------+------------------------------------------
I've tried updating the BIOS of a Tomcat n3400B (S2925-E). The update
itself worked fine, but the MAC addresses of the onboard NVidia-Gigabit
Ethernet chips were set to bogus values (66:55:44:33:22:11 or something
like that) afterwards. Restoring the old flash backup worked. This does
not happen with the official update tool from Tyan.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/135>
coreboot <http://www.coreboot.org/>
Hello!
Amazon tells me that there are now two people selling their Akimbo
boxes. Perhaps I'll definitely buy one.
And Joe here is the linked page which contains a reference to the STB
kit from Intel:
http://cerberus.teamhackaday.com/?p=3
It turns out that it comes up right below the description for the
device. It seems the only thing nonstandard about it is the crappy
BIOS that Akimbo insisted on.
-----
Gregg C Levine gregg.drwho8(a)gmail.com
"This signature fought the Time Wars, time and again."
#162: Move SYSTEM_TYPE to Kconfig
----------------------------+-----------------------------------------------
Reporter: oxygene | Owner: oxygene
Type: enhancement | Status: new
Priority: minor | Milestone:
Component: coreboot | Keywords:
Dependencies: | Patchstatus: there is no patch
----------------------------+-----------------------------------------------
SYSTEM_TYPE is used to tell coreboot if the board is "server", "desktop"
or "laptop". It's only used for AMD for now, but could also be used
elsewhere to tweak configuration (and there's a flag in some table, maybe
ACPI, that tells the OS about the system type, too).
It's defined for some boards, there's a default defined somewhere in the
code, that looks a lot like a good match for Kconfig.
--
Ticket URL: <https://tracker.coreboot.org/trac/coreboot/ticket/162>
coreboot <http://www.coreboot.org/>
Oskar Enoksson wrote:
> Myles Watson wrote:
>
>>> I think Myles was right, there is a i2c mux in this server that somehow
>>> multiplexes DIMM devices on the i2c bus. I was able to guess which i2c
>>> ports contain the DIMM info, and which port is the mux, then added the
>>> mux to devicetree.cb and the DIMM ports under it. Now I'm able to use
>>> memory from both CPU's, at least for the combination of DIMM's I have
>>> (2x2x1GB and 2x2x512MB).
>>>
>>>
>> I'm glad it worked out!
>>
>>
>>> So I'm basically able to use these servers now. I would love to have
>>> ACPI and Cool'nQuiet of course, perhaps I'll try to do that later.
>>>
>>> Thanks very much for all help! If you want me to commit the new
>>> mainboard to your svn repository let me know.
>>>
>>>
>> Yes, please. If you'll send your latest patch with a Signed-off-by: line,
>> I'll take it from there.
>>
>> Thanks,
>> Myles
>>
>>
> I hope this file is the way you want it. I did "svn cp
> src/mainboard/tyan/s2881 src/mainboard/hp/dl145_g1" and then modified
> the files, then "svn diff src/mainboard" so I assume you should do the
> same svn cp operation, then apply my patch, then commit to retain the
> original files' history.
>
I have fixed several problems and now it boots reliably for both and
older dual Opteron 248 server and an upgraded dual Opteron 280 server.
memtest86+ doesn't work, but according to another mailinglist thread
memtest cannot handle tables in high memory, so that seems to be a
memtest issue.
Attached is a cleaned-up patch. Thanks to Myles and others for excellent
help and support. I hope someone finds the result useful.
