coreboot October 2020

coreboot@coreboot.org
  • 37 participants
  • 32 discussions

Reserve Device DRAM
by Bryan Angelo
5 months, 1 week

IRQ routing: how to do the mainboard_picr_data/_intr_data structures?
by Mike Banon
6 months, 3 weeks

Coreboot Picasso FSP questions
by chen.kenyy@inventec.com
7 months

Flashing coreboot and Intel Flash Descriptor Erase Issue
by Balaji Sivakumar
7 months

Flashing coreboot and Intel Flash Descriptor Erase Issue
by Balaji Sivakumar
7 months, 1 week

AMD AGESA: Missing PCI bridge 00:15.2 on Asus F2A85-M PRO
by Paul Menzel
7 months, 1 week

Native RAM init
by Alif Ilhan
7 months, 1 week

amd_blobs submodule update issue when using git sup alias and how to fix it
by Felix Held
7 months, 2 weeks

Universal Payload Project
by Paul Menzel
7 months, 2 weeks

[RFC] Change in CBFS "stage" binary format
by Julius Werner
7 months, 2 weeks
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