coreboot October 2020

coreboot@coreboot.org
  • 37 participants
  • 33 discussions

ThinkPad T420 and FireWire chip on Linux
by Alesandar Metodiev
1 month

A different lapic number in devicetree.cb needed for CPU with the same SKU and steping (Intel Atom C3538).
by dponamorev@gmail.com
4 months, 3 weeks

Reserve Device DRAM
by Bryan Angelo
1 year

IRQ routing: how to do the mainboard_picr_data/_intr_data structures?
by Mike Banon
1 year, 1 month

Coreboot Picasso FSP questions
by chen.kenyy@inventec.com
1 year, 2 months

Flashing coreboot and Intel Flash Descriptor Erase Issue
by Balaji Sivakumar
1 year, 2 months

Flashing coreboot and Intel Flash Descriptor Erase Issue
by Balaji Sivakumar
1 year, 2 months

AMD AGESA: Missing PCI bridge 00:15.2 on Asus F2A85-M PRO
by Paul Menzel
1 year, 2 months

Native RAM init
by Alif Ilhan
1 year, 2 months

amd_blobs submodule update issue when using git sup alias and how to fix it
by Felix Held
1 year, 2 months
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