I'm going to check in new cache_as_ram code. It is more solid and could
copy data from cache to ram. So we can pass some info from CAR stage to
I want to change the default value for CONFIG_LB_MEM_TOPK from 1024 to
So I don't need to change every Opteron MB Config.lb...
Let me know if is ok to you.
I am a freshman to linuxbios. And I am preparing porting linuxbios on my
My northbridge is Server works (SWC HT2000),and southbridge is Serverworks
HT-1000, I don't know if it supports the chipset? could you please tell me ?
and I cannot find relate source code in the source tree , should I create it
I just committed the support for the the SOM-2354 CPU board running on
a SOM-DB2301 base board.
MSR 20000018 was from the rumba setup which didn't work on this board.
Current value was ripped from how XpressROM set it. Other than that
all I had to change was the superIO.
The unit boots jumps to linubios and looks for the vsabin which it
can't find since its not there.
I have also made a little bit of progress on compiling the VSA.
OpenWatcom has a 16-bit compiler and I've been hacking the makefile(s)
to get it to work. OWC has a cl compability mode but IFAICT its 32bit
only. I've attemped to translate the switches.
I'm currently at the point of trying to figure out how to feed the OWC
linker all the object files.
Richard A. Smith
Svn diff to current tree.
Please check it. I will commit it some time next week.
Guys have problem with s2891, s2881, s2892, please try it by
patch -p0 to the latest tree.
1. new CAR with copy data from cache to ram
2. new coherent_ht_car.c
3. new reset code for amd8111
4. new amd8111_early_ctrl without sysinfo...