[GSOC 2016] Coreboot panic room

[Antonello Dettori]

      Hello everyone,
I am currently a computing student at the University of Abertay in 
Scotland and I would like to take part in this year GSOC.

The proposal that I want to submit concerns the coreboot panic room idea 
since it looks like something that could really benefit the project as a 
whole and also because it seems like a really interesting technical 
challenge.

I already digged through the blog and the mail exchanges of the previous 
developer working on this, Tadas Slotkus, and took a look at the patches 
that he wrote so I already have a general understanding of their aim.

I would like to concentrate most of my efforts towards improving and 
upstreaming the previous efforts, implementing a way to easily access 
the recovery mode when needed and further the integration between 
coreboot, serialICE and flashrom for this use-case.

Regarding the existing patches I would like to know if they would need 
to stay romc-compatible or should the scope be limited to CAR boards?

Any suggestions on how to tackle this project or GSOC in general?

Thanks in advance.

[Denis 'GNUtoo' Carikli]

      On Thu, 10 Mar 2016 22:34:45 +0000
Antonello Dettori <dev(a)dettori.io&gt; wrote:

  Hello everyone,
Hi,

  I would like to concentrate most of my efforts towards
improving and 
 upstreaming the previous efforts, implementing a way to easily access 
 the recovery mode when needed and further the integration between 
 coreboot, serialICE and flashrom for this use-case.
 
 Regarding the existing patches I would like to know if they would
 need to stay romc-compatible or should the scope be limited to CAR
 boards?
How was it implemented?

I see several building blocks:
- nvramtool and the fallback/normal mecanism.
- Many hardware also do have watchdogs, but I believe it's disabled by
  coreboot.
- SerialICE: I'm not sure it can work from coreboot, or how to
  integrate it in the same flash. Patches to add some kind of support
  for it in coreboot might exist in gerrit.
- libhwremote: works with SerialICE, and was made to work with pciutils
  and superiotool
- Coreboot also has gdb support, and even something like gdbwait, but
  only in ramstage.
- Coreboot also has some code to write to some flash chips, in order to
  store its logs there.

Denis.