coreboot February 2013

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Patch merged into coreboot/master: 475d42a cbfstool: Add `-Werror` to make all warnings into errors
by gerrit＠coreboot.org 18 Feb '13

18 Feb '13

the following patch was just integrated into master: commit 475d42a16c0a9ce3946c1ac2b3d20c32feec4fec Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Mon Feb 18 11:56:13 2013 +0100 cbfstool: Add `-Werror` to make all warnings into errors Ensure that no changes with warnings are committed. Although using `-Werror` is debatable [1][2]. [1] http://blog.flameeyes.eu/2009/02/future-proof-your-code-dont-use-werror [2] http://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html Change-Id: I402f2d82dd4087d8a575b0a85305a02ef04bb537 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2441 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Mon Feb 18 12:10:35 2013, giving +2 See http://review.coreboot.org/2441 for details. -gerrit

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New patch to review for coreboot: 3b8c8db cbfstool: Add `-Werror` to make all warnings into errors
by Paul Menzel 18 Feb '13

18 Feb '13

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2441 -gerrit commit 3b8c8db3ef61a3c086fe2abf322000d14b737871 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Mon Feb 18 11:56:13 2013 +0100 cbfstool: Add `-Werror` to make all warnings into errors Ensure that no changes with warnings are committed. Although using `-Werror` is debatable [1][2]. [1] http://blog.flameeyes.eu/2009/02/future-proof-your-code-dont-use-werror [2] http://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html Change-Id: I402f2d82dd4087d8a575b0a85305a02ef04bb537 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- util/cbfstool/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile index 3ace744..a14a76f 100644 --- a/util/cbfstool/Makefile +++ b/util/cbfstool/Makefile @@ -2,7 +2,7 @@ obj ?= $(shell pwd) HOSTCXX ?= g++ HOSTCC ?= gcc -CFLAGS ?= -g -Wall +CFLAGS ?= -g -Wall -Werror CFLAGS += -D_7ZIP_ST BINARY:=$(obj)/cbfstool

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Patch set updated for coreboot: ce494dc cbfstool: Fix compile warnings caused by incorrect data types.
by Paul Menzel 18 Feb '13

18 Feb '13

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2440 -gerrit commit ce494dcfd10833d1b9ec446612523cbc3aa17232 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Mon Feb 18 18:35:00 2013 +0800 cbfstool: Fix compile warnings caused by incorrect data types. The "offset" in cbfs-mkpayload should be printed as type %lu instead of %d as `gcc` rightfully warns about. gcc -g -Wall -D_7ZIP_ST -c -o /srv/filme/src/coreboot/util/cbfstool/cbfs-mkpayload.o cbfs-mkpayload.c cbfs-mkpayload.c: In function ‘parse_fv_to_payload’: cbfs-mkpayload.c:284:3: warning: format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘long unsigned int’ [-Wformat] cbfs-mkpayload.c:296:3: warning: format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘long unsigned int’ [-Wformat] This warning was introduced in the following commit. commit 4610247ef1744ccabbcc6bfc441a3583aa49f7b5 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Feb 9 13:26:19 2013 +0100 cbfstool: Handle alignment in UEFI payloads Reviewed-on: http://review.coreboot.org/2334 Change-Id: I50c26a314723d45fcc6ff9ae2f08266cb7969a12 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- util/cbfstool/cbfs-mkpayload.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/util/cbfstool/cbfs-mkpayload.c b/util/cbfstool/cbfs-mkpayload.c index 6115e49..9f3dabf 100644 --- a/util/cbfstool/cbfs-mkpayload.c +++ b/util/cbfstool/cbfs-mkpayload.c @@ -281,7 +281,7 @@ int parse_fv_to_payload(const struct buffer *input, fh = (ffs_file_header_t *)(input->data + fv->header_length); while (fh->file_type == FILETYPE_PAD) { unsigned long offset = (fh->size[2] << 16) | (fh->size[1] << 8) | fh->size[0]; - ERROR("skipping %d bytes of FV padding\n", offset); + ERROR("skipping %lu bytes of FV padding\n", offset); fh = (ffs_file_header_t *)(((void*)fh) + offset); } if (fh->file_type != FILETYPE_SEC) { @@ -293,7 +293,7 @@ int parse_fv_to_payload(const struct buffer *input, cs = (common_section_header_t *)&fh[1]; while (cs->section_type == SECTION_RAW) { unsigned long offset = (cs->size[2] << 16) | (cs->size[1] << 8) | cs->size[0]; - ERROR("skipping %d bytes of section padding\n", offset); + ERROR("skipping %lu bytes of section padding\n", offset); cs = (common_section_header_t *)(((void*)cs) + offset); } if (cs->section_type != SECTION_PE32) {

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New patch to review for coreboot: ae7f0ed cbfstool: Fix compile warnings caused by incorrect data types.
by Hung-Te Lin 18 Feb '13

18 Feb '13

Hung-Te Lin (hungte(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2440 -gerrit commit ae7f0ed2d1fc3f96a9adec408d9906c1fb31bb05 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Mon Feb 18 18:35:00 2013 +0800 cbfstool: Fix compile warnings caused by incorrect data types. The "offset" in cbfs-mkpayload should be printed as type %lu instead of %d. Change-Id: I50c26a314723d45fcc6ff9ae2f08266cb7969a12 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- util/cbfstool/cbfs-mkpayload.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/util/cbfstool/cbfs-mkpayload.c b/util/cbfstool/cbfs-mkpayload.c index 6115e49..9f3dabf 100644 --- a/util/cbfstool/cbfs-mkpayload.c +++ b/util/cbfstool/cbfs-mkpayload.c @@ -281,7 +281,7 @@ int parse_fv_to_payload(const struct buffer *input, fh = (ffs_file_header_t *)(input->data + fv->header_length); while (fh->file_type == FILETYPE_PAD) { unsigned long offset = (fh->size[2] << 16) | (fh->size[1] << 8) | fh->size[0]; - ERROR("skipping %d bytes of FV padding\n", offset); + ERROR("skipping %lu bytes of FV padding\n", offset); fh = (ffs_file_header_t *)(((void*)fh) + offset); } if (fh->file_type != FILETYPE_SEC) { @@ -293,7 +293,7 @@ int parse_fv_to_payload(const struct buffer *input, cs = (common_section_header_t *)&fh[1]; while (cs->section_type == SECTION_RAW) { unsigned long offset = (cs->size[2] << 16) | (cs->size[1] << 8) | cs->size[0]; - ERROR("skipping %d bytes of section padding\n", offset); + ERROR("skipping %lu bytes of section padding\n", offset); cs = (common_section_header_t *)(((void*)cs) + offset); } if (cs->section_type != SECTION_PE32) {

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Patch merged into coreboot/master: ca6e1f6 AMD S3: Program the flash in a bigger data packet
by gerrit＠coreboot.org 18 Feb '13

18 Feb '13

the following patch was just integrated into master: commit ca6e1f6c04c96c435bdbf30a1b88cab0e5be330b Author: Zheng Bao <fishbaozi(a)gmail.com> Date: Sun Feb 17 17:27:46 2013 +0800 AMD S3: Program the flash in a bigger data packet According to spi.c in src/southbridge/amd/agesa/hudson readwrite = (bytesin + readoffby1) << 4 | bytesout; We can see that Hudson limits the SPI programming data packet size as 15. We used to write data to SPI in dword mode. It didn't take full advantage of the data packet size. We need to leverage that to speed up programming time. Change-Id: I615e3c8e754e58702247bc26cfffbedaf5827ea8 Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: http://review.coreboot.org/2306 Tested-by: build bot (Jenkins) Reviewed-by: Dave Frodin <dave.frodin(a)se-eng.com> Reviewed-by: Martin Roth <martin.roth(a)se-eng.com> See http://review.coreboot.org/2306 for details. -gerrit

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Patch merged into coreboot/master: 178df11 AMD S3: Fix typo vol*a*tile in southbridge Kconfig
by gerrit＠coreboot.org 18 Feb '13

18 Feb '13

the following patch was just integrated into master: commit 178df1121d638650f5eed3210ee94da1981070ea Author: Zheng Bao <fishbaozi(a)gmail.com> Date: Sun Feb 17 16:41:14 2013 +0800 AMD S3: Fix typo vol*a*tile in southbridge Kconfig Change non-volitile to non-volatile. Change-Id: Idfc7db3b3dcf078f0f3134fc62679bed439a4fd2 Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: http://review.coreboot.org/2437 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Dave Frodin <dave.frodin(a)se-eng.com> See http://review.coreboot.org/2437 for details. -gerrit

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Patch merged into coreboot/master: 92f03c0 AMD Family12h: Fix warnings
by gerrit＠coreboot.org 18 Feb '13

18 Feb '13

the following patch was just integrated into master: commit 92f03c0a063e842febf616641a0a9ff967dd2013 Author: Martin Roth <martin.roth(a)se-eng.com> Date: Sun Feb 10 14:53:35 2013 -0700 AMD Family12h: Fix warnings Add needed prototypes to .h files. Remove unused variables and fix types in printk statements. Add #IFNDEFs around #DEFINEs to keep them from being defined twice. Fix a whole bunch of casts. Fix undefined pre-increment behaviour in a couple of macros. These now match the macros in the F14 tree. Change a value of 0xFF that was getting truncated when being assigned to a 4-bit bitfield to a value of 0x0f. This was tested with the torpedo build. This fixes roughly 132 of the 561 warnings in the coreboot build so I'm not going to list them all. Here is a sample of the warnings fixed: In file included from src/cpu/amd/agesa/family12/model_12_init.c:35:0: src/include/cpu/amd/amdfam12.h:52:5: warning: redundant redeclaration of 'get_initial_apicid' [-Wredundant-decls] In file included from src/cpu/amd/agesa/family12/model_12_init.c:34:0: src/include/cpu/amd/multicore.h:48:5: note: previous declaration of 'get_initial_apicid' was here src/northbridge/amd/agesa/family12/northbridge.c:50:10: warning: no previous prototype for 'get_node_pci' [-Wmissing-prototypes] src/northbridge/amd/agesa/family12/northbridge.c: In function 'get_hw_mem_hole_info': src/northbridge/amd/agesa/family12/northbridge.c:302:13: warning: unused variable 'i' [-Wunused-variable] src/northbridge/amd/agesa/family12/northbridge.c: In function 'domain_set_resources': src/northbridge/amd/agesa/family12/northbridge.c:587:5: warning: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'device_t' [-Wformat] src/northbridge/amd/agesa/family12/northbridge.c:587:5: warning: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'device_t' [-Wformat] src/northbridge/amd/agesa/family12/northbridge.c:716:1: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'long unsigned int' [-Wformat] In file included from src/mainboard/amd/torpedo/agesawrapper.h:31:0, from src/northbridge/amd/agesa/family12/northbridge.c:38: src/vendorcode/amd/agesa/f12/AGESA.h:1282:0: warning: "TOP_MEM" redefined [enabled by default] In file included from src/northbridge/amd/agesa/family12/northbridge.c:34:0: src/include/cpu/amd/mtrr.h:31:0: note: this is the location of the previous definition In file included from src/mainboard/amd/torpedo/agesawrapper.h:31:0, from src/northbridge/amd/agesa/family12/northbridge.c:38: src/vendorcode/amd/agesa/f12/AGESA.h:1283:0: warning: "TOP_MEM2" redefined [enabled by default] src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c: In function 'PcieInputParserGetNumberOfComplexes': src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c:99:19: warning: operation on 'ComplexList' may be undefined [-Wsequence-point] src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c: In function 'PcieInputParserGetLengthOfPcieEnginesList': src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c:126:20: warning: operation on 'PciePortList' may be undefined [-Wsequence-point] src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c: In function 'PcieInputParserGetLengthOfDdiEnginesList': src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c:153:19: warning: operation on 'DdiLinkList' may be undefined [-Wsequence-point] src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c: In function 'PcieInputParserGetComplexDescriptorOfSocket': src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c:225:17: warning: operation on 'ComplexList' may be undefined [-Wsequence-point] src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PciePhyServices.c:246:1: warning: no previous prototype for 'PcieFmForceDccRecalibrationCallback' [-Wmissing-prototypes] In file included from src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieComplexConfig.c:58:0: src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/LlanoComplexData.h:120:5: warning: large integer implicitly truncated to unsigned type [-Woverflow] And fixed a boatload of these types of warning: src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c: In function 'HeapGetBaseAddress': src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c:687:17: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c:694:19: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c:701:23: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c:702:23: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c:705:23: warning: assignment makes integer from pointer without a cast [enabled by default] src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c:709:21: warning: assignment makes integer from pointer without a cast [enabled by default] Change-Id: I97fa0b8edb453eb582e4402c66482ae9f0a8f764 Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/2348 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Dave Frodin <dave.frodin(a)se-eng.com> Reviewed-by: Anton Kochkov <anton.kochkov(a)gmail.com> Build-Tested: build bot (Jenkins) at Sun Feb 10 23:44:48 2013, giving +1 Reviewed-By: Anton Kochkov <anton.kochkov(a)gmail.com> at Thu Feb 14 14:38:09 2013, giving +2 See http://review.coreboot.org/2348 for details. -gerrit

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Patch merged into coreboot/master: 96508a7 AMD S3: Include the s3_resume.h only when S3 is enabled.
by gerrit＠coreboot.org 18 Feb '13

18 Feb '13

the following patch was just integrated into master: commit 96508a794969f35f10e8a346c227dfa7a026e9ea Author: Zheng Bao <fishbaozi(a)gmail.com> Date: Sun Feb 17 16:25:36 2013 +0800 AMD S3: Include the s3_resume.h only when S3 is enabled. Change-Id: I9a6c4f61e5dda6665f92c8526bb26a458ee2b739 Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: http://review.coreboot.org/2384 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Dave Frodin <dave.frodin(a)se-eng.com> Build-Tested: build bot (Jenkins) at Sun Feb 17 12:36:08 2013, giving +1 Reviewed-By: Dave Frodin <dave.frodin(a)se-eng.com> at Mon Feb 18 01:08:43 2013, giving +2 See http://review.coreboot.org/2384 for details. -gerrit

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New patch to review for coreboot: a0a495d AMD SB800/Hudson: Change `sb800` to `hudson` in path to IMC binary blob
by Paul Menzel 17 Feb '13

17 Feb '13

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2439 -gerrit commit a0a495dc844534efed8a2bd43c4b3624b009ab15 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Sun Feb 17 23:35:58 2013 +0100 AMD SB800/Hudson: Change `sb800` to `hudson` in path to IMC binary blob The current default path does not exist in the blobs repository [1]. $ ls -R 3rdparty/southbridge/amd/ 3rdparty/southbridge/amd/: hudson 3rdparty/southbridge/amd/hudson: imc.bin xhci.bin [1] http://review.coreboot.org/gitweb?p=blobs.git;a=shortlog;h=HEAD Change-Id: I80f01dbb8c03750bedcbbd89199002c53b166c33 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/southbridge/amd/cimx/sb800/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig index 1f3ee9a..535e0b7 100644 --- a/src/southbridge/amd/cimx/sb800/Kconfig +++ b/src/southbridge/amd/cimx/sb800/Kconfig @@ -140,7 +140,7 @@ if SB800_IMC_FWM config SB800_IMC_FWM_FILE string "IMC firmware path and filename" - default "3rdparty/southbridge/amd/sb800/imc.bin" + default "3rdparty/southbridge/amd/hudson/imc.bin" choice prompt "SB800 Firmware ROM Position"

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Patch set updated for coreboot: de0570a build system: Retire REQUIRES_BLOB
by Patrick Georgi 17 Feb '13

17 Feb '13

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2418 -gerrit commit de0570a59b7f97e1fe2726e19a43cf3332eee8af Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Feb 16 01:06:57 2013 +0100 build system: Retire REQUIRES_BLOB REQUIRES_BLOB assumes that all blob files come from the 3rdparty directory, builds failed when all files were configured to point to other sources. This change modifies the blob mechanism so that cbfs-files can be tagged as "required" with some specification what is missing. If the configured files can't be found (wrong path, missing file), the build system returns a list of descriptions, then aborts. Change-Id: Icc128e3afcee8acf49bff9409b93af7769db3517 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- Makefile | 3 +++ Makefile.inc | 12 +++++++----- src/Kconfig | 10 ---------- src/cpu/amd/geode_gx2/Makefile.inc | 2 ++ src/cpu/amd/geode_lx/Kconfig | 1 - src/cpu/amd/geode_lx/Makefile.inc | 2 ++ src/southbridge/amd/agesa/hudson/Kconfig | 3 --- src/southbridge/amd/agesa/hudson/Makefile.inc | 4 ++++ 8 files changed, 18 insertions(+), 19 deletions(-) diff --git a/Makefile b/Makefile index 92b4d0b..9aafe7c 100644 --- a/Makefile +++ b/Makefile @@ -232,6 +232,9 @@ evaluate_subdirs= \ # collect all object files eligible for building subdirs:=$(TOPLEVEL) $(eval $(call evaluate_subdirs)) +ifeq ($(FAILBUILD),1) +$(error cannot continue build) +endif # Eliminate duplicate mentions of source files in a class $(foreach class,$(classes),$(eval $(class)-srcs:=$(sort $($(class)-srcs)))) diff --git a/Makefile.inc b/Makefile.inc index 069bdfe..ad97363 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -105,10 +105,6 @@ endif ifeq ($(CONFIG_USE_BLOBS),y) forgetthis:=$(shell git submodule update --init --checkout 3rdparty) -else -ifeq ($(CONFIG_REQUIRES_BLOB),y) -$(error Your current configuration requires binary-only components, but you did not choose to use them) -endif endif bootblock-c-ccopts:=-D__BOOT_BLOCK__ -D__PRE_RAM__ @@ -164,6 +160,11 @@ cbfs-files-handler= \ $(if $(wildcard $(1)$($(2)-file)), \ $(eval tmp-cbfs-file:= $(wildcard $(1)$($(2)-file))), \ $(eval tmp-cbfs-file:= $($(2)-file))) \ + $(if $(strip $($(2)-required)), \ + $(if $(wildcard $(tmp-cbfs-file)),, \ + $(info This build configuration requires $($(2)-required)) \ + $(eval FAILBUILD:=1) \ + )) \ $(if $(tmp-cbfs-method), \ $(eval tmp-old-cbfs-file:=$(tmp-cbfs-file)) \ $(eval tmp-cbfs-file:=$(shell mkdir -p $(obj)/mainboard/$(MAINBOARDDIR); mktemp $(obj)/mainboard/$(MAINBOARDDIR)/cbfs-file.XXXXXX).out) \ @@ -172,7 +173,8 @@ cbfs-files-handler= \ $(eval $(2)-name:=) \ $(eval $(2)-type:=) \ $(eval $(2)-compression:=) \ - $(eval $(2)-position:=) + $(eval $(2)-position:=) \ + $(eval $(2)-required:=) ####################################################################### # a variety of flags for our build diff --git a/src/Kconfig b/src/Kconfig index 4e7957e..2dc251d 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -184,16 +184,6 @@ config USE_BLOBS might be required for some chipsets or boards. This flag ensures that a "Free" option remains available for users. -config REQUIRES_BLOB - bool - default n - help - This option can be configured by boards that require the blobs - repository for the default configuration. It will make the build - fail if USE_BLOBS is disabled. Users that still desire to do a - coreboot build for such a board can override this manually, but - this option serves as warning that it might fail. - config COVERAGE bool "Code coverage support" depends on COMPILER_GCC diff --git a/src/cpu/amd/geode_gx2/Makefile.inc b/src/cpu/amd/geode_gx2/Makefile.inc index b3f3de9..d8a4faf 100644 --- a/src/cpu/amd/geode_gx2/Makefile.inc +++ b/src/cpu/amd/geode_gx2/Makefile.inc @@ -11,3 +11,5 @@ cpu_incs += $(src)/cpu/amd/geode_gx2/cache_as_ram.inc cbfs-files-$(CONFIG_GEODE_VSA_FILE) += vsa vsa-file = $(call strip_quotes,$(CONFIG_VSA_FILENAME)):vsa vsa-type = stage +vsa-required = VSA binary (binary and MASM source code available in coreboot/3rdparty repository) + diff --git a/src/cpu/amd/geode_lx/Kconfig b/src/cpu/amd/geode_lx/Kconfig index 777dc94..7deb100 100644 --- a/src/cpu/amd/geode_lx/Kconfig +++ b/src/cpu/amd/geode_lx/Kconfig @@ -19,7 +19,6 @@ config GEODE_VSA bool default y select PCI_OPTION_ROM_RUN_REALMODE - select REQUIRES_BLOB config GEODE_VSA_FILE bool "Add a VSA image" diff --git a/src/cpu/amd/geode_lx/Makefile.inc b/src/cpu/amd/geode_lx/Makefile.inc index c9df888..0280aac 100644 --- a/src/cpu/amd/geode_lx/Makefile.inc +++ b/src/cpu/amd/geode_lx/Makefile.inc @@ -11,3 +11,5 @@ cpu_incs += $(src)/cpu/amd/geode_lx/cache_as_ram.inc cbfs-files-$(CONFIG_GEODE_VSA_FILE) += vsa vsa-file = $(call strip_quotes,$(CONFIG_VSA_FILENAME)):vsa vsa-type = stage +vsa-required = VSA binary (binary and MASM source code available in coreboot/3rdparty repository) + diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig index 92e5960..6cbed53 100644 --- a/src/southbridge/amd/agesa/hudson/Kconfig +++ b/src/southbridge/amd/agesa/hudson/Kconfig @@ -46,21 +46,18 @@ if SOUTHBRIDGE_AMD_AGESA_HUDSON config HUDSON_XHCI_FWM bool "Add xhci firmware" default y - select REQUIRES_BLOB help Add Hudson 2/3/4 XHCI Firmware to support the onboard usb3.0 config HUDSON_IMC_FWM bool "Add imc firmware" default y - select REQUIRES_BLOB help Add Hudson 2/3/4 IMC Firmware to support the onboard fan control config HUDSON_GEC_FWM bool "Add gec firmware" default n - select REQUIRES_BLOB help Add Hudson 2/3/4 GEC Firmware diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index c9a1731..18a0ffb 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -74,6 +74,7 @@ cbfs-files-y += hudson/xhci hudson/xhci-file := $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM_FILE)) hudson/xhci-position := $(HUDSON_XHCI_POSITION) hudson/xhci-type := raw +hudson/xhci-required := Hudson XHCI firmware (available in coreboot/3rdparty if enabled) endif ifeq ($(CONFIG_HUDSON_IMC_FWM), y) @@ -81,6 +82,7 @@ cbfs-files-y += hudson/imc hudson/imc-file := $(call strip_quotes, $(CONFIG_HUDSON_IMC_FWM_FILE)) hudson/imc-position := $(HUDSON_IMC_POSITION) hudson/imc-type := raw +hudson/imc-required := Hudson IMC Firmware (available in coreboot/3rdparty if enabled) endif ifeq ($(CONFIG_HUDSON_GEC_FWM), y) @@ -88,6 +90,7 @@ cbfs-files-y += hudson/gec hudson/gec-file := $(call strip_quotes, $(CONFIG_HUDSON_GEC_FWM_FILE)) hudson/gec-position := $(HUDSON_GEC_POSITION) hudson/gec-type := raw +hudson/gec-required := Hudson Gigabit Ethernet Controller Firmware (Contact your AMD representative) endif #ifeq ($(CONFIG_HUDSON_SATA_AHCI), y) @@ -96,5 +99,6 @@ stripped_ahci_rom_id = $(call strip_quotes,$(CONFIG_AHCI_ROM_ID)) cbfs-files-y += pci$(stripped_ahci_rom_id).rom pci$(stripped_ahci_rom_id).rom-file := $(call strip_quotes,$(CONFIG_AHCI_ROM_FILE)) pci$(stripped_ahci_rom_id).rom-type := optionrom +pci$(stripped_ahci_rom_id).rom-required := Hudson AHCI Option ROM (Contact your AMD representative) #endif endif

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coreboot February 2013