coreboot January 2011

coreboot@coreboot.org

65 participants
299 discussions

enabling expert mode -> build fails (warnings treated as errors) on fam10 boards
by Ward Vandewege 13 Jan '11

13 Jan '11

Hi all, If one enables expert mode in Kconfig and builds a fam10 board, this is what happens: $ make clean && make ROMCC mainboard/supermicro/h8qme_fam10/bootblock.inc GEN bootblock/bootblock.S CC mainboard/supermicro/h8qme_fam10/bootblock.s CC mainboard/supermicro/h8qme_fam10/bootblock.o GEN bootblock/ldscript.ld LINK bootblock.elf OBJCOPY coreboot.bootblock OPTION option_table.h GEN build.h CC romstage.inc cc1: warnings being treated as errors In file included from src/northbridge/amd/amdht/ht_wrapper.c:52:0, from src/cpu/amd/quadcore/quadcore.c:22, from src/mainboard/supermicro/h8qme_fam10/romstage.c:72: src/northbridge/amd/amdht/h3finit.c: In function 'selectOptimalWidthAndFrequency': src/northbridge/amd/amdht/h3finit.c:1332:24: error: "CONFIG_LIMIT_HT_SPEED_300" is not defined src/northbridge/amd/amdht/h3finit.c:1336:24: error: "CONFIG_LIMIT_HT_SPEED_500" is not defined make: *** [build/mainboard/supermicro/h8qme_fam10/romstage.pre.inc] Error 1 I looked around a bit; those config variables do not appear to be used anywhere but in the checks in h3finit.c. What's the best way to fix this? Thanks, Ward. -- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior Systems Administrator

3 2

[PATCH]Initialize CMOS from CBFS if checksum is incorrect
by Patrick Georgi 13 Jan '11

13 Jan '11

Hi, attached patch provides a way to initialize the CMOS if the checksum test failed. For this to work, a CMOS dump must be stored as "cmos.default" (filetype "cmos default") in CBFS. After CMOS is rewritten, the system is rebooted to ensure that all parts of coreboot run with the new (working) configuration. For a couple of boards, a "cmos_defaults_loaded" field is added to cmos.layout. This can be used to tell the system that defaults were applied by setting this flag in cmos.default and parsing/resetting it in the system. Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com>

2 1

Here is my new board. Can coreboot be implemented on it?
by Kfir Lavi 13 Jan '11

13 Jan '11

Hi, Attached lspci -vvvnn dmidecode I'm considering developing coreboot for this platform. Last time I asked this question in gentoo-embedded mailing lists, Peter said it would take 8 months to develop. http://www.gossamer-threads.com/lists/gentoo/embedded/223304#223304 ... For an experienced coreboot developer I would estimate an absolute minimum of eight man-months of work. This assumes that Intel NDAs and document retrieval requests are processed instantly. It took 9 months just to get NDAs processed for the coreboot developer who went through that process. On the other hand, one Intel FAE I talked to mentioned only weeks needed in some of his projects. ... I don't have 8 months for start and I'm really not an experienced coreboot developer, so I want you to look again on the attached files, so maybe it could be easier then Peter initially stated. Regards, Kfir

3 4

Initial bits to support Thinkpad X60
by Sven Schnelle 13 Jan '11

13 Jan '11

All, i started a port of coreboot to my Thinkpad X60 last week. Things implemented right now: Serial I/O over X6 ultrabase. The X60 itself doesn't have a serial interface, so the first thing i've done was to buy a Docking station. CPU + Chipset initialization. There still one thing to discuss: The X60s has a L2300 CPU, which has (AFAIK) a Socket 479 M, but the coreboot code doesn't know model_6ex for socket_479M. so i added model_6ex and speedsteep to the subdirs in src/cpu/intel/socket_mPGA479M/Makefile.inc. Another thing: socket_479M has it's own CAR code, which doesn't work on my CPU. Removed the extra include and using the common intel CAR code works. And most important: Linux boots with the DSDT extracted from the Vendor BIOS. Without ACPI, interrupt routing is currently broken. Have not tried windows. I did not add the disassembled IBM/Lenovo DSDT, as i'm not sure if this violates any Copyright. (And we want to replace it by our own ACPI code anyways) Things not working: - Dual Channel DRAM: The X60 has one DIMM per Channel, but coreboot expects the SPD Addresses for Dual Channel on 0x50/0x52, but the Thinkpad has it wired to 0x50/0x51. - Power Management (of course :) ) Needs reverse engineering of the Embedded Controller interface. This is the next thing on my TODO List. I wrote a LPC Bus Support Package for my Tektronix Logic Analyzer, so i'm able to capture all LPC traffic. I will add dumps to the coreboot Wiki. - Trackpoint Needs probably some magic enable command to EC. I'm adding the current version as diff to this email, in case anybody wants to play with the code. Not sure if "it boot's Linux' is enough to go into the coreboot SVN. Yet another important thing: I've modified my X60 in a way that i can switch between the original BIOS Flash (SPI, MX25L1605D) and the Artecgroup USB Dongle (which is connected via LPC) with the Wireless RFKILL switch. So i have not tried booting the Notebook via SPI, as i don't want to erase my original BIOS (still required for reverse engineering ;) ) I expect it to boot via SPI, but haven't tried it. So be careful when flashing your Thinkpad :D Regards, Sven

4 7

[OT] What can I delete in commercial bios if I'm running Linux
by Kfir Lavi 13 Jan '11

13 Jan '11

Hi, I'm in an embedded Linux project, and the board is Intel based with AMI Bios. Currently the bios loads in 22sec, and we would like to get it to ~3sec. I know that the commercial bios have roms that can be deleted. What is safe to ask the board/bios manufacturer to delete from the bios. Currently the bios has: usb vga,lvds intel ethernet sata ide Thanks for your help, Kfir

3 2

[commit] r6252 - trunk/src/mainboard/kontron/986lcd-m
by repository service 13 Jan '11

13 Jan '11

Author: oxygene Date: Thu Jan 13 12:40:38 2011 New Revision: 6252 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6252 Log: Default to CRT on Kontron/986lcd-m. "default display" doesn't always select the right output device. Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> Acked-by: Joseph Smith <joe(a)settoplinux.org> Modified: trunk/src/mainboard/kontron/986lcd-m/mainboard.c Modified: trunk/src/mainboard/kontron/986lcd-m/mainboard.c ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/mainboard.c Thu Jan 13 12:38:46 2011 (r6251) +++ trunk/src/mainboard/kontron/986lcd-m/mainboard.c Thu Jan 13 12:40:38 2011 (r6252) @@ -46,7 +46,7 @@ switch (M.x86.R_AX) { case 0x5f35: /* Boot Display */ M.x86.R_AX = 0x005f; // Success - M.x86.R_CL = BOOT_DISPLAY_DEFAULT; + M.x86.R_CL = BOOT_DISPLAY_CRT; break; case 0x5f40: /* Boot Panel Type */ // M.x86.R_AX = 0x015f; // Supported but failed

1 0

[commit] r6251 - in trunk/src/devices/oprom/yabel: . compat
by repository service 13 Jan '11

13 Jan '11

Author: oxygene Date: Thu Jan 13 12:38:46 2011 New Revision: 6251 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6251 Log: Improve compatibility of YABEL with real-world VGABIOSes Some of them do weird things to the option rom region (mapping registers there or so) which failed as we handled these memory region in emulation. As they were copied back to real memory after the emulation was done, we can just as well use real memory directly for these regions. This affects IVT, BDA, and option ROM space. Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> Acked-by: Joseph Smith <joe(a)settoplinux.org> Modified: trunk/src/devices/oprom/yabel/biosemu.c trunk/src/devices/oprom/yabel/compat/functions.c trunk/src/devices/oprom/yabel/device.c trunk/src/devices/oprom/yabel/device.h trunk/src/devices/oprom/yabel/io.c trunk/src/devices/oprom/yabel/mem.c Modified: trunk/src/devices/oprom/yabel/biosemu.c ============================================================================== --- trunk/src/devices/oprom/yabel/biosemu.c Thu Jan 13 10:09:21 2011 (r6250) +++ trunk/src/devices/oprom/yabel/biosemu.c Thu Jan 13 12:38:46 2011 (r6251) @@ -106,6 +106,9 @@ printf("Error: Device Expansion ROM invalid!\n"); return -1; } + biosemu_add_special_memory(0, 0x500); // IVT + BDA + biosemu_add_special_memory(OPTION_ROM_CODE_SEGMENT << 4, 0x10000); // option ROM + rom_image = (u8 *) bios_device.img_addr; DEBUG_PRINTF("executing rom_image from %p\n", rom_image); DEBUG_PRINTF("biosmem at %p\n", biosmem); @@ -129,7 +132,7 @@ // copy expansion ROM image to segment OPTION_ROM_CODE_SEGMENT // NOTE: this sometimes fails, some bytes are 0x00... so we compare // after copying and do some retries... - u8 *mem_img = biosmem + (OPTION_ROM_CODE_SEGMENT << 4); + u8 *mem_img = OPTION_ROM_CODE_SEGMENT << 4; u8 copy_count = 0; u8 cmp_result = 0; do { @@ -152,7 +155,7 @@ break; } clr_ci(); - *(mem_img + i) = c; + my_wrb(mem_img + i, c); } #endif copy_count++; Modified: trunk/src/devices/oprom/yabel/compat/functions.c ============================================================================== --- trunk/src/devices/oprom/yabel/compat/functions.c Thu Jan 13 10:09:21 2011 (r6250) +++ trunk/src/devices/oprom/yabel/compat/functions.c Thu Jan 13 12:38:46 2011 (r6251) @@ -41,13 +41,6 @@ #if CONFIG_BOOTSPLASH vbe_set_graphics(); #endif - - if (vmem != NULL) { - printf("Copying legacy memory from %p to the lower 1MB\n", vmem); - memcpy((void *)0x00000, vmem + 0x00000, 0x400); // IVT - memcpy((void *)0x00400, vmem + 0x00400, 0x100); // BDA - memcpy((void *)0xc0000, vmem + 0xc0000, 0x10000); // VGA OPROM - } } unsigned long tb_freq = 0; Modified: trunk/src/devices/oprom/yabel/device.c ============================================================================== --- trunk/src/devices/oprom/yabel/device.c Thu Jan 13 10:09:21 2011 (r6250) +++ trunk/src/devices/oprom/yabel/device.c Thu Jan 13 12:38:46 2011 (r6251) @@ -24,8 +24,8 @@ /* the device we are working with... */ biosemu_device_t bios_device; -//max. 6 BARs and 1 Exp.ROM plus CfgSpace and 3 legacy ranges -translate_address_t translate_address_array[11]; +//max. 6 BARs and 1 Exp.ROM plus CfgSpace and 3 legacy ranges, plus 2 "special" memory ranges +translate_address_t translate_address_array[13]; u8 taa_last_entry; typedef struct { @@ -209,6 +209,23 @@ } #endif +// "special memory" is a hack to make some parts of memory fall through to real memory +// (ie. no translation). Necessary if option ROMs attempt DMA there, map registers or +// do similarily crazy things. +void +biosemu_add_special_memory(u32 start, u32 size) +{ + int taa_index = ++taa_last_entry; + translate_address_array[taa_index].info = IORESOURCE_FIXED | IORESOURCE_MEM; + translate_address_array[taa_index].bus = 0; + translate_address_array[taa_index].devfn = 0; + translate_address_array[taa_index].cfg_space_offset = 0; + translate_address_array[taa_index].address = start; + translate_address_array[taa_index].size = size; + /* dont translate addresses... all addresses are 1:1 */ + translate_address_array[taa_index].address_offset = 0; +} + #ifndef CONFIG_PCI_OPTION_ROM_RUN_YABEL // to simulate accesses to legacy VGA Memory (0xA0000-0xBFFFF) // we look for the first prefetchable memory BAR, if no prefetchable BAR found, @@ -419,7 +436,7 @@ // and accessing client interface for every translation... // returns: 0 if addr not found in translate_address_array, 1 if found. u8 -biosemu_dev_translate_address(unsigned long * addr) +biosemu_dev_translate_address(int type, unsigned long * addr) { int i = 0; translate_address_t ta; @@ -443,7 +460,7 @@ #endif for (i = 0; i <= taa_last_entry; i++) { ta = translate_address_array[i]; - if ((*addr >= ta.address) && (*addr <= (ta.address + ta.size))) { + if ((*addr >= ta.address) && (*addr <= (ta.address + ta.size)) && (ta.info & type)) { *addr += ta.address_offset; return 1; } Modified: trunk/src/devices/oprom/yabel/device.h ============================================================================== --- trunk/src/devices/oprom/yabel/device.h Thu Jan 13 10:09:21 2011 (r6250) +++ trunk/src/devices/oprom/yabel/device.h Thu Jan 13 12:38:46 2011 (r6251) @@ -101,15 +101,18 @@ // device. Needed for faster address translation, so // not every I/O or Memory Access needs to call translate_address_dev // and access the device tree -// 6 BARs, 1 Exp. ROM, 1 Cfg.Space, and 3 Legacy +// 6 BARs, 1 Exp. ROM, 1 Cfg.Space, and 3 Legacy, plus 2 "special" // translations are supported... this should be enough for // most devices... for VGA it is enough anyways... -extern translate_address_t translate_address_array[11]; +extern translate_address_t translate_address_array[13]; // index of last translate_address_array entry // set by get_dev_addr_info function extern u8 taa_last_entry; +// add 1:1 mapped memory regions to translation table +void biosemu_add_special_memory(u32 start, u32 size); + /* the device we are working with... */ extern biosemu_device_t bios_device; @@ -117,7 +120,7 @@ // NOTE: for dev_check_exprom to work, biosemu_dev_init MUST be called first! u8 biosemu_dev_check_exprom(unsigned long rom_base_addr); -u8 biosemu_dev_translate_address(unsigned long * addr); +u8 biosemu_dev_translate_address(int type, unsigned long * addr); /* endianness swap functions for 16 and 32 bit words * copied from axon_pciconfig.c Modified: trunk/src/devices/oprom/yabel/io.c ============================================================================== --- trunk/src/devices/oprom/yabel/io.c Thu Jan 13 10:09:21 2011 (r6250) +++ trunk/src/devices/oprom/yabel/io.c Thu Jan 13 12:38:46 2011 (r6251) @@ -22,6 +22,7 @@ #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL #include <device/pci.h> #include <device/pci_ops.h> +#include <device/resource.h> #endif #ifdef CONFIG_ARCH_X86 @@ -181,7 +182,7 @@ { u8 rval = 0xFF; unsigned long translated_addr = addr; - u8 translated = biosemu_dev_translate_address(&translated_addr); + u8 translated = biosemu_dev_translate_address(IORESOURCE_IO, &translated_addr); if (translated != 0) { //translation successfull, access Device I/O (BAR or Legacy...) DEBUG_PRINTF_IO("%s(%x): access to Device I/O\n", __func__, @@ -231,7 +232,7 @@ my_inw(X86EMU_pioAddr addr) { unsigned long translated_addr = addr; - u8 translated = biosemu_dev_translate_address(&translated_addr); + u8 translated = biosemu_dev_translate_address(IORESOURCE_IO, &translated_addr); if (translated != 0) { //translation successfull, access Device I/O (BAR or Legacy...) DEBUG_PRINTF_IO("%s(%x): access to Device I/O\n", __func__, @@ -276,7 +277,7 @@ my_inl(X86EMU_pioAddr addr) { unsigned long translated_addr = addr; - u8 translated = biosemu_dev_translate_address(&translated_addr); + u8 translated = biosemu_dev_translate_address(IORESOURCE_IO, &translated_addr); if (translated != 0) { //translation successfull, access Device I/O (BAR or Legacy...) DEBUG_PRINTF_IO("%s(%x): access to Device I/O\n", __func__, @@ -322,7 +323,7 @@ my_outb(X86EMU_pioAddr addr, u8 val) { unsigned long translated_addr = addr; - u8 translated = biosemu_dev_translate_address(&translated_addr); + u8 translated = biosemu_dev_translate_address(IORESOURCE_IO, &translated_addr); if (translated != 0) { //translation successfull, access Device I/O (BAR or Legacy...) DEBUG_PRINTF_IO("%s(%x, %x): access to Device I/O\n", @@ -354,7 +355,7 @@ my_outw(X86EMU_pioAddr addr, u16 val) { unsigned long translated_addr = addr; - u8 translated = biosemu_dev_translate_address(&translated_addr); + u8 translated = biosemu_dev_translate_address(IORESOURCE_IO, &translated_addr); if (translated != 0) { //translation successfull, access Device I/O (BAR or Legacy...) DEBUG_PRINTF_IO("%s(%x, %x): access to Device I/O\n", @@ -395,7 +396,7 @@ my_outl(X86EMU_pioAddr addr, u32 val) { unsigned long translated_addr = addr; - u8 translated = biosemu_dev_translate_address(&translated_addr); + u8 translated = biosemu_dev_translate_address(IORESOURCE_IO, &translated_addr); if (translated != 0) { //translation successfull, access Device I/O (BAR or Legacy...) DEBUG_PRINTF_IO("%s(%x, %x): access to Device I/O\n", Modified: trunk/src/devices/oprom/yabel/mem.c ============================================================================== --- trunk/src/devices/oprom/yabel/mem.c Thu Jan 13 10:09:21 2011 (r6250) +++ trunk/src/devices/oprom/yabel/mem.c Thu Jan 13 12:38:46 2011 (r6251) @@ -21,6 +21,10 @@ #if !defined(CONFIG_YABEL_DIRECTHW) || (!CONFIG_YABEL_DIRECTHW) +#ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL +#include <device/resource.h> +#endif + // define a check for access to certain (virtual) memory regions (interrupt handlers, BIOS Data Area, ...) #if CONFIG_X86EMU_DEBUG static u8 in_check = 0; // to avoid recursion... @@ -195,7 +199,7 @@ my_rdb(u32 addr) { unsigned long translated_addr = addr; - u8 translated = biosemu_dev_translate_address(&translated_addr); + u8 translated = biosemu_dev_translate_address(IORESOURCE_MEM, &translated_addr); u8 rval; if (translated != 0) { //translation successfull, access VGA Memory (BAR or Legacy...) @@ -227,7 +231,7 @@ my_rdw(u32 addr) { unsigned long translated_addr = addr; - u8 translated = biosemu_dev_translate_address(&translated_addr); + u8 translated = biosemu_dev_translate_address(IORESOURCE_MEM, &translated_addr); u16 rval; if (translated != 0) { //translation successfull, access VGA Memory (BAR or Legacy...) @@ -278,7 +282,7 @@ my_rdl(u32 addr) { unsigned long translated_addr = addr; - u8 translated = biosemu_dev_translate_address(&translated_addr); + u8 translated = biosemu_dev_translate_address(IORESOURCE_MEM, &translated_addr); u32 rval; if (translated != 0) { //translation successfull, access VGA Memory (BAR or Legacy...) @@ -341,7 +345,7 @@ my_wrb(u32 addr, u8 val) { unsigned long translated_addr = addr; - u8 translated = biosemu_dev_translate_address(&translated_addr); + u8 translated = biosemu_dev_translate_address(IORESOURCE_MEM, &translated_addr); if (translated != 0) { //translation successfull, access VGA Memory (BAR or Legacy...) DEBUG_PRINTF_MEM("%s(%x, %x): access to VGA Memory\n", @@ -366,7 +370,7 @@ my_wrw(u32 addr, u16 val) { unsigned long translated_addr = addr; - u8 translated = biosemu_dev_translate_address(&translated_addr); + u8 translated = biosemu_dev_translate_address(IORESOURCE_MEM, &translated_addr); if (translated != 0) { //translation successfull, access VGA Memory (BAR or Legacy...) DEBUG_PRINTF_MEM("%s(%x, %x): access to VGA Memory\n", @@ -411,7 +415,7 @@ my_wrl(u32 addr, u32 val) { unsigned long translated_addr = addr; - u8 translated = biosemu_dev_translate_address(&translated_addr); + u8 translated = biosemu_dev_translate_address(IORESOURCE_MEM, &translated_addr); if (translated != 0) { //translation successfull, access VGA Memory (BAR or Legacy...) DEBUG_PRINTF_MEM("%s(%x, %x): access to VGA Memory\n",

1 0

[PATCH]Set display type to CRT on kontron 986lcd-m
by Patrick Georgi 13 Jan '11

13 Jan '11

Hi, attached patch changes the display type to CRT on kontron/986lcd-m as the VGABIOS doesn't reliably pick a useful default (in some versions). Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com>

2 1

[commit] r6250 - trunk/util/cbfstool
by repository service 13 Jan '11

13 Jan '11

Author: oxygene Date: Thu Jan 13 10:09:21 2011 New Revision: 6250 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6250 Log: Add "cbfstool extract" function. It dumps everything you ask for, but you might not get what you expect if the file is compressed or otherwise converted (eg. payloads in SELF format). (Originally it would only extract "raw" files. This is a change by me, as filetypes are commonly used to differentiate raw data files --Patrick) Signed-off-by: Aurelien Guillaume <aurelien(a)iwi.me> Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> Acked-by: Patrick Georgi <patrick.georgi(a)secunet.com> Modified: trunk/util/cbfstool/cbfstool.c trunk/util/cbfstool/common.c trunk/util/cbfstool/common.h Modified: trunk/util/cbfstool/cbfstool.c ============================================================================== --- trunk/util/cbfstool/cbfstool.c Wed Jan 12 22:09:25 2011 (r6249) +++ trunk/util/cbfstool/cbfstool.c Thu Jan 13 10:09:21 2011 (r6250) @@ -29,7 +29,8 @@ CMD_ADD_STAGE, CMD_CREATE, CMD_LOCATE, - CMD_PRINT + CMD_PRINT, + CMD_EXTRACT, } cmd_t; struct command { @@ -244,13 +245,34 @@ return 0; } +static int cbfs_extract(int argc, char **argv) +{ + char *romname = argv[1]; + char *cmd = argv[2]; + void *rom = loadrom(romname); + + if (rom == NULL) { + printf("Could not load ROM image '%s'.\n", romname); + return 1; + } + + if (argc != 5) + { + printf("Error: you must specify a CBFS name and a file to dump it in.\n"); + return 1; + } + + return extract_file_from_cbfs(romname, argv[3], argv[4]); +} + struct command commands[] = { {CMD_ADD, "add", cbfs_add}, {CMD_ADD_PAYLOAD, "add-payload", cbfs_add_payload}, {CMD_ADD_STAGE, "add-stage", cbfs_add_stage}, {CMD_CREATE, "create", cbfs_create}, {CMD_LOCATE, "locate", cbfs_locate}, - {CMD_PRINT, "print", cbfs_print} + {CMD_PRINT, "print", cbfs_print}, + {CMD_EXTRACT, "extract", cbfs_extract}, }; void usage(void) @@ -266,7 +288,8 @@ " add-stage FILE NAME [COMP] [base] Add a stage to the ROM\n" " create SIZE BOOTBLOCK [ALIGN] Create a ROM file\n" " locate FILE NAME ALIGN Find a place for a file of that size\n" - " print Show the contents of the ROM\n\n" + " print Show the contents of the ROM\n" + " extract NAME FILE Extracts a raw payload from ROM\n\n" "TYPEs:\n" ); print_supported_filetypes(); Modified: trunk/util/cbfstool/common.c ============================================================================== --- trunk/util/cbfstool/common.c Wed Jan 12 22:09:25 2011 (r6249) +++ trunk/util/cbfstool/common.c Thu Jan 13 10:09:21 2011 (r6250) @@ -207,6 +207,69 @@ } } +int extract_file_from_cbfs(const char *filename, const char *payloadname, const char *outpath) +{ + // Identify the coreboot image. + printf( + "%s: %d kB, bootblocksize %d, romsize %d, offset 0x%x\nAlignment: %d bytes\n\n", + basename((char *)filename), romsize / 1024, ntohl(master_header->bootblocksize), + romsize, ntohl(master_header->offset), align); + + FILE *outfile = NULL; + uint32_t current = phys_start; + while (current < phys_end) { + if (!cbfs_file_header(current)) { + current += align; + continue; + } + + // Locate the file start struct + struct cbfs_file *thisfile = + (struct cbfs_file *)phys_to_virt(current); + // And its length + uint32_t length = ntohl(thisfile->len); + // Locate the file name + char *fname = (char *)(phys_to_virt(current) + sizeof(struct cbfs_file)); + // It's not the file we are looking for.. + if (strcmp(fname, payloadname) != 0) + { + current = + ALIGN(current + ntohl(thisfile->len) + + ntohl(thisfile->offset), align); + continue; + } + + // Else, it's our file. + printf("Found %.30s payload at 0x%x, type %.12s, size %d\n", fname, + current - phys_start, strfiletype(ntohl(thisfile->type)), + length); + + // If we are not dumping to stdout, open the out file. + outfile = fopen(outpath, "wb"); + if (!outfile) + { + printf("Could not open the file %s for writing. Aborting.\n", outpath); + return 1; + } + + if (ntohl(thisfile->type) != CBFS_COMPONENT_RAW) + { + printf("Warning: only 'raw' files are safe to extract.\n"); + } + + fwrite(((char *)thisfile) + + ntohl(thisfile->offset), length, 1, outfile); + + fclose(outfile); + printf("Successfully dumped the payload.\n"); + + // We'll only dump one file. + return 0; + } + +} + + int add_file_to_cbfs(void *content, uint32_t contentsize, uint32_t location) { uint32_t current = phys_start; Modified: trunk/util/cbfstool/common.h ============================================================================== --- trunk/util/cbfstool/common.h Wed Jan 12 22:09:25 2011 (r6249) +++ trunk/util/cbfstool/common.h Thu Jan 13 10:09:21 2011 (r6250) @@ -68,6 +68,7 @@ int add_file_to_cbfs(void *content, uint32_t contentsize, uint32_t location); void print_cbfs_directory(const char *filename); +int extract_file_from_cbfs(const char *filename, const char *payloadname, const char *outpath); uint32_t cbfs_find_location(const char *romfile, uint32_t filesize, const char *filename, uint32_t align);

1 0

Restarting at "Jumping to image"
by Joseph Smith 13 Jan '11

13 Jan '11

Hello, I am working on a new mainboard/northbridge and have got it all the way to "Jumping to image" and then it immediately restarts and loops at that point over and over. I even did a ram_check() on the whole memory (accept vga range) and it passes just fine. Has anyone seen this before? Is there a simple way to verify/read the raw data after coreboot is copied to memory? Help? Here is my bootlog: http://coreboot.pastebin.com/KNyMM9xZ -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

2 1

← Newer
1
...
21
22
23
24
25
26
27
...
30
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot January 2011