It should be on the list of supported motherboards. Sorry about that. It's
been a while since I was involved in testing it, so you should have a backup
chip ready (as always). It should just work, but if it doesn't, send the
serial output to the list.
> -----Original Message-----
> From: Martins Lazdans [mailto:firstname.lastname@example.org]
> Sent: Thursday, January 06, 2011 7:14 AM
> To: mylesgw(a)gmail.com
> Subject: Re: [coreboot] DL145 G1 with dual dualcore CPU using coreboot ?
> I was reading HP DL145 G1 discussion here
> and wondering is this included in some coreboot stable version already?
> I couldn't find HP DL145 G1 listed in supported lists.
> Many thanks!
> Martins Lazdans
I like to wish a very happy new year 2011 to all the contributors of this
amazing project, one more time !
And I have a little question :
What is about Coreboot and ARM processor. I understand that one of the
major functionnaliy for Coreboot is to initialize PCI bus but today we can
anticipate that some futur PCs will be powered with ARM processors and with
PCI so could we expect Coreboot on them ?
Thanks for your attention.
This is the next board I want to port coreboot to. And the three logs
are attached. "Sissy" is what I name the machine the board is in,
after SiS. :D
The flash chip i know for sure is SST 39SF020A. It needs a board
enable, for which I have figured out 3 of the 5 operations involved,
thanks to Luc's slides up at Phoronix.
It used a soldered PLCC32 flash chip. I soldered a socket on myself,
and the chip miraclously survived. But I have not been able to get
another of the same chip for backup. All my 3 spares are DIP32.
Super I/O is IT8705F, already supported. So it looks like all that's
needed is porting SiS630 from coreboot v1. I think I would also be the
first to port a single chip chipset to v4.
Thanks to a previous thread on this list, I got the '630 datasheet,
but I don't know for sure what is different between it (the 630) and
my chip (630ET).
Appreciate all the help I can get for this one.
Date: Wed Jan 5 03:27:53 2011
New Revision: 6244
move single options out of main menu and remove stray "options"
Signed-off-by: Stefan Reinauer <stepan(a)coreboot.org>
Acked-by: Stefan Reinauer <stepan(a)coreboot.org>
--- trunk/src/Kconfig.deprecated_options Wed Jan 5 03:10:50 2011 (r6243)
+++ trunk/src/Kconfig.deprecated_options Wed Jan 5 03:27:53 2011 (r6244)
@@ -2,6 +2,8 @@
# if possible, and if you find the time, or touch the general area
# for other purposes, please consider removing their uses.
# It might be possible to consolidate hard_reset() to southbridges,
# given that it (usually) uses its registers.
# The long term goal would be to eliminate hard_reset() from boards.
@@ -49,3 +51,4 @@
this option, then you can say N here to speed up boot time.
Otherwise say Y.
--- trunk/src/arch/x86/Kconfig Wed Jan 5 03:10:50 2011 (r6243)
+++ trunk/src/arch/x86/Kconfig Wed Jan 5 03:27:53 2011 (r6244)
@@ -1,3 +1,5 @@
+menu "Architecture (x86)"
# This is an SMP option. It relates to starting up APs.
# It is usually set in mainboard/*/Kconfig.
# TODO: Improve description.
@@ -91,3 +93,5 @@
--- trunk/src/console/Kconfig Wed Jan 5 03:10:50 2011 (r6243)
+++ trunk/src/console/Kconfig Wed Jan 5 03:27:53 2011 (r6244)
@@ -1,4 +1,4 @@
-menu "Console options"
# TODO: Rename to SERIAL_CONSOLE once Kconfig transition is complete.
bool "Serial port console output"