coreboot September 2010

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build service results for r5845
by repository service 25 Sep '10

25 Sep '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "oxygene" checked in revision 5845 to the coreboot repository. This caused the following changes: Change Log: Add an EHCI driver to libpayload's USB stack. Interrupt transfer support is missing (ie. no keyboard), bulk and control transfers work (ie. mass storage). Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Peter Stuge <peter(a)stuge.se> Build Log: Compilation of amd:serengeti_cheetah_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5845&device=serengeti_chee… Compilation of hp:dl165_g6_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5845&device=dl165_g6_fam10… Compilation of supermicro:h8dmr_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5845&device=h8dmr_fam10&ve… Compilation of supermicro:h8qme_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5845&device=h8qme_fam10&ve… Compilation of tyan:s2912_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5845&device=s2912_fam10&ve… If something broke during this checkin please be a pain in oxygene's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[commit] r5846 - trunk/src/northbridge/amd/amdht
by repository service 25 Sep '10

25 Sep '10

Author: oxygene Date: Sat Sep 25 19:24:10 2010 New Revision: 5846 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5846 Log: Mark read-only data as read-only, so the global vars test doesn't fail on it. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/northbridge/amd/amdht/h3finit.c trunk/src/northbridge/amd/amdht/h3finit.h trunk/src/northbridge/amd/amdht/ht_wrapper.c Modified: trunk/src/northbridge/amd/amdht/h3finit.c ============================================================================== --- trunk/src/northbridge/amd/amdht/h3finit.c Sat Sep 25 19:01:13 2010 (r5845) +++ trunk/src/northbridge/amd/amdht/h3finit.c Sat Sep 25 19:24:10 2010 (r5846) @@ -899,7 +899,7 @@ u32 unitIDcnt; SBDFO currentPtr; u8 depth; - u8 *pSwapPtr; + const u8 *pSwapPtr; SBDFO lastSBDFO = ILLEGAL_SBDFO; u8 lastLink = 0; Modified: trunk/src/northbridge/amd/amdht/h3finit.h ============================================================================== --- trunk/src/northbridge/amd/amdht/h3finit.h Sat Sep 25 19:01:13 2010 (r5845) +++ trunk/src/northbridge/amd/amdht/h3finit.h Sat Sep 25 19:24:10 2010 (r5846) @@ -195,7 +195,7 @@ * * --------------------------------------------------------------------------------------- */ - BOOL (*AMD_CB_ManualBUIDSwapList)(u8 Node, u8 Link, u8 **List); + BOOL (*AMD_CB_ManualBUIDSwapList)(u8 Node, u8 Link, const u8 **List); /**---------------------------------------------------------------------------------------- * Modified: trunk/src/northbridge/amd/amdht/ht_wrapper.c ============================================================================== --- trunk/src/northbridge/amd/amdht/ht_wrapper.c Sat Sep 25 19:01:13 2010 (r5845) +++ trunk/src/northbridge/amd/amdht/ht_wrapper.c Sat Sep 25 19:24:10 2010 (r5846) @@ -117,9 +117,9 @@ * @param[out] BOOL result = true to use a manual list * false to initialize the link automatically */ -static BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, u8 **List) +static BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List) { - static u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; + static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF }; /* If the BUID was adjusted in early_ht we need to do the manual override */ if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) { printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");

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[commit] r5842 - in trunk/src: mainboard/getac/p470 mainboard/hp/dl145_g3 mainboard/hp/dl165_g6_fam10 mainboard/ibase/mb899 mainboard/intel/d945gclf mainboard/kontron/986lcd-m mainboard/roda/rk886e...
by repository service 25 Sep '10

25 Sep '10

Author: uwe Date: Sat Sep 25 16:23:31 2010 New Revision: 5842 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5842 Log: Various USB Debug Port fixes (trivial). - Drop unused DBGP_DEFAULT #defines on boards with chipsets where no USB Debug Port support is implemented anyway (at the moment, at least): - hp/dl145_g3 - hp/dl165_g6_fam10 - ICH7: Move unrelated code out of set_debug_port(). All ICH southbridges with Debug Port hardcode the physical USB port used as Debug Port to 1. In other words, this port is not user-configurable (as seems to be the case on NVIDIA MCP55). For now we keep the 'port' parameter in order to not change the API, this might be fixed differently later. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/src/mainboard/getac/p470/romstage.c trunk/src/mainboard/hp/dl145_g3/romstage.c trunk/src/mainboard/hp/dl165_g6_fam10/romstage.c trunk/src/mainboard/ibase/mb899/romstage.c trunk/src/mainboard/intel/d945gclf/romstage.c trunk/src/mainboard/kontron/986lcd-m/romstage.c trunk/src/mainboard/roda/rk886ex/romstage.c trunk/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c Modified: trunk/src/mainboard/getac/p470/romstage.c ============================================================================== --- trunk/src/mainboard/getac/p470/romstage.c Sat Sep 25 16:15:41 2010 (r5841) +++ trunk/src/mainboard/getac/p470/romstage.c Sat Sep 25 16:23:31 2010 (r5842) @@ -37,7 +37,6 @@ #include <cpu/x86/bist.h> #if CONFIG_USBDEBUG -#define DBGP_DEFAULT 0 #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" #include "pc80/usbdebug_serial.c" #endif @@ -319,7 +318,7 @@ uart_init(); #if CONFIG_USBDEBUG - i82801gx_enable_usbdebug(DBGP_DEFAULT); + i82801gx_enable_usbdebug(1); early_usbdebug_init(); #endif console_init(); Modified: trunk/src/mainboard/hp/dl145_g3/romstage.c ============================================================================== --- trunk/src/mainboard/hp/dl145_g3/romstage.c Sat Sep 25 16:15:41 2010 (r5841) +++ trunk/src/mainboard/hp/dl145_g3/romstage.c Sat Sep 25 16:23:31 2010 (r5842) @@ -44,8 +44,6 @@ #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 #endif -#define DBGP_DEFAULT 7 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> Modified: trunk/src/mainboard/hp/dl165_g6_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/hp/dl165_g6_fam10/romstage.c Sat Sep 25 16:15:41 2010 (r5841) +++ trunk/src/mainboard/hp/dl165_g6_fam10/romstage.c Sat Sep 25 16:23:31 2010 (r5842) @@ -39,8 +39,6 @@ #define SET_FIDVID 1 #define SET_FIDVID_CORE_RANGE 0 -#define DBGP_DEFAULT 7 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> Modified: trunk/src/mainboard/ibase/mb899/romstage.c ============================================================================== --- trunk/src/mainboard/ibase/mb899/romstage.c Sat Sep 25 16:15:41 2010 (r5841) +++ trunk/src/mainboard/ibase/mb899/romstage.c Sat Sep 25 16:23:31 2010 (r5842) @@ -40,7 +40,6 @@ #include <cpu/x86/bist.h> #if CONFIG_USBDEBUG -#define DBGP_DEFAULT 1 #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" #include "pc80/usbdebug_serial.c" #endif @@ -275,7 +274,7 @@ uart_init(); #if CONFIG_USBDEBUG - i82801gx_enable_usbdebug(DBGP_DEFAULT); + i82801gx_enable_usbdebug(1); early_usbdebug_init(); #endif Modified: trunk/src/mainboard/intel/d945gclf/romstage.c ============================================================================== --- trunk/src/mainboard/intel/d945gclf/romstage.c Sat Sep 25 16:15:41 2010 (r5841) +++ trunk/src/mainboard/intel/d945gclf/romstage.c Sat Sep 25 16:23:31 2010 (r5842) @@ -39,7 +39,6 @@ #include <cpu/x86/bist.h> #if CONFIG_USBDEBUG -#define DBGP_DEFAULT 1 #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" #include "pc80/usbdebug_serial.c" #endif @@ -236,7 +235,7 @@ uart_init(); #if CONFIG_USBDEBUG - i82801gx_enable_usbdebug(DBGP_DEFAULT); + i82801gx_enable_usbdebug(1); early_usbdebug_init(); #endif Modified: trunk/src/mainboard/kontron/986lcd-m/romstage.c ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/romstage.c Sat Sep 25 16:15:41 2010 (r5841) +++ trunk/src/mainboard/kontron/986lcd-m/romstage.c Sat Sep 25 16:23:31 2010 (r5842) @@ -49,8 +49,6 @@ #include <cpu/x86/bist.h> #if CONFIG_USBDEBUG -#define DBGP_DEFAULT 1 -#include <usbdebug.h> #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" #include "pc80/usbdebug_serial.c" #endif @@ -379,7 +377,7 @@ uart_init(); #if CONFIG_USBDEBUG - i82801gx_enable_usbdebug(DBGP_DEFAULT); + i82801gx_enable_usbdebug(1); early_usbdebug_init(); #endif Modified: trunk/src/mainboard/roda/rk886ex/romstage.c ============================================================================== --- trunk/src/mainboard/roda/rk886ex/romstage.c Sat Sep 25 16:15:41 2010 (r5841) +++ trunk/src/mainboard/roda/rk886ex/romstage.c Sat Sep 25 16:23:31 2010 (r5842) @@ -41,7 +41,6 @@ #include <cpu/x86/bist.h> #if CONFIG_USBDEBUG -#define DBGP_DEFAULT 1 #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" #include "pc80/usbdebug_serial.c" #endif @@ -291,7 +290,7 @@ uart_init(); #if CONFIG_USBDEBUG - i82801gx_enable_usbdebug(DBGP_DEFAULT); + i82801gx_enable_usbdebug(1); early_usbdebug_init(); #endif Modified: trunk/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c ============================================================================== --- trunk/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c Sat Sep 25 16:15:41 2010 (r5841) +++ trunk/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c Sat Sep 25 16:23:31 2010 (r5842) @@ -17,6 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <usbdebug.h> + // An arbitrary address for the BAR #define EHCI_BAR 0xFEF00000 // These could be read from DEBUG_BASE (0:1d.7 R 0x5A 16bit) @@ -26,22 +28,22 @@ #define EHCI_PORTSC 0x44 #define EHCI_DEBUG_OFFSET 0xA0 -#include <usbdebug.h> +/* Required for successful build, but currently empty. */ +void set_debug_port(unsigned int port) +{ + /* Not needed, the ICH* southbridges hardcode physical USB port 1. */ +} -void set_debug_port(unsigned port) +static void i82801gx_enable_usbdebug(unsigned int port) { u32 dbgctl; + pci_write_config32(PCI_DEV(0, 0x1d, 7), EHCI_BAR_INDEX, EHCI_BAR); + pci_write_config8(PCI_DEV(0, 0x1d, 7), 0x04, 0x2); // Memory Space Enable + printk(BIOS_DEBUG, "Enabling OWNER_CNT\n"); dbgctl = read32(EHCI_BAR + EHCI_DEBUG_OFFSET); dbgctl |= (1 << 30); write32(EHCI_BAR + EHCI_DEBUG_OFFSET, dbgctl); } -static void i82801gx_enable_usbdebug(unsigned port) -{ - pci_write_config32(PCI_DEV(0, 0x1d, 7), EHCI_BAR_INDEX, EHCI_BAR); - pci_write_config8(PCI_DEV(0, 0x1d, 7), 0x04, 0x2); // Memory Space Enable - set_debug_port(port); -} -

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[commit] r5845 - in trunk/payloads/libpayload: . configs drivers drivers/usb
by repository service 25 Sep '10

25 Sep '10

Author: oxygene Date: Sat Sep 25 19:01:13 2010 New Revision: 5845 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5845 Log: Add an EHCI driver to libpayload's USB stack. Interrupt transfer support is missing (ie. no keyboard), bulk and control transfers work (ie. mass storage). Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Peter Stuge <peter(a)stuge.se> Added: trunk/payloads/libpayload/drivers/usb/ehci.c trunk/payloads/libpayload/drivers/usb/ehci.h trunk/payloads/libpayload/drivers/usb/ehci_private.h trunk/payloads/libpayload/drivers/usb/ehci_rh.c Modified: trunk/payloads/libpayload/Config.in trunk/payloads/libpayload/configs/defconfig trunk/payloads/libpayload/drivers/Makefile.inc trunk/payloads/libpayload/drivers/usb/usbinit.c Modified: trunk/payloads/libpayload/Config.in ============================================================================== --- trunk/payloads/libpayload/Config.in Sat Sep 25 18:17:20 2010 (r5844) +++ trunk/payloads/libpayload/Config.in Sat Sep 25 19:01:13 2010 (r5845) @@ -230,7 +230,6 @@ depends on USB help Select this option if you want to use USB 2.0 - NOTE: This option is not (fully) implemented yet config USB_XHCI bool "Support for USB xHCI controllers" Modified: trunk/payloads/libpayload/configs/defconfig ============================================================================== --- trunk/payloads/libpayload/configs/defconfig Sat Sep 25 18:17:20 2010 (r5844) +++ trunk/payloads/libpayload/configs/defconfig Sat Sep 25 19:01:13 2010 (r5845) @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # libpayload version: 0.2.0 -# Fri Mar 26 12:45:27 2010 +# Sat Sep 25 14:01:26 2010 # # @@ -49,8 +49,9 @@ CONFIG_SPEAKER=y CONFIG_USB=y CONFIG_USB_UHCI=y -# CONFIG_USB_OHCI is not set -# CONFIG_USB_EHCI is not set +CONFIG_USB_OHCI=y +CONFIG_USB_EHCI=y +CONFIG_USB_XHCI=y CONFIG_USB_HID=y CONFIG_USB_HUB=y CONFIG_USB_MSC=y Modified: trunk/payloads/libpayload/drivers/Makefile.inc ============================================================================== --- trunk/payloads/libpayload/drivers/Makefile.inc Sat Sep 25 18:17:20 2010 (r5844) +++ trunk/payloads/libpayload/drivers/Makefile.inc Sat Sep 25 19:01:13 2010 (r5845) @@ -62,6 +62,8 @@ TARGETS-$(CONFIG_USB_UHCI) += drivers/usb/uhci_rh.o TARGETS-$(CONFIG_USB_OHCI) += drivers/usb/ohci.o TARGETS-$(CONFIG_USB_OHCI) += drivers/usb/ohci_rh.o +TARGETS-$(CONFIG_USB_EHCI) += drivers/usb/ehci.o +TARGETS-$(CONFIG_USB_EHCI) += drivers/usb/ehci_rh.o TARGETS-$(CONFIG_USB_XHCI) += drivers/usb/xhci.o TARGETS-$(CONFIG_USB_XHCI) += drivers/usb/xhci_rh.o TARGETS-$(CONFIG_USB_HID) += drivers/usb/usbhid.o Added: trunk/payloads/libpayload/drivers/usb/ehci.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/payloads/libpayload/drivers/usb/ehci.c Sat Sep 25 19:01:13 2010 (r5845) @@ -0,0 +1,359 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2010 coresystems GmbH + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <libpayload.h> +#include "ehci.h" +#include "ehci_private.h" + +static void dump_td(u32 addr) { + qtd_t *td = phys_to_virt(addr); + printf("td at phys(%x): active: %x, halted: %x, data_buf_err: %x\n babble: %x, xact_err: %x, missed_mframe: %x\n splitxstate: %x, perr: %x\n\n", + addr, td->active, td->halted, td->data_buf_err, td->babble, td->xact_err, td->missed_mframe, td->splitxstate, td->perr); + printf("- cerr: %x, total_len: %x\n\n", td->cerr, td->total_len); +} + +static void ehci_start (hci_t *controller) +{ + EHCI_INST(controller)->operation->rs = 1; +} + +static void ehci_stop (hci_t *controller) +{ + EHCI_INST(controller)->operation->rs = 0; +} + +static void ehci_reset (hci_t *controller) +{ + +} + +static void ehci_shutdown (hci_t *controller) +{ + +} + +enum { EHCI_OUT=0, EHCI_IN=1, EHCI_SETUP=2 }; + +/* returns handled bytes */ +int fill_td(qtd_t *td, void* data, int datalen) { + u32 total_len = 0; + u32 page_minus_1 = 0; + + u32 start = virt_to_phys(data); + u32 page = start & ~4095; + u32 offset = start & 4095; + u32 page_len = 4096 - offset; + + td->c_page = 0; + td->bufptr0 = page; + td->cur_off = offset; + + if (datalen <= page_len) { + total_len = datalen; + } else { + datalen -= page_len; + total_len += page_len; + + do { + /* we have a continguous mapping between virtual and physical memory */ + page += 4096; + + td->bufptrs[page_minus_1] = page; + if (datalen <= 4096) { + total_len += datalen; + break; + } + page_minus_1++; + datalen -= 4096; + total_len += 4096; + } while (page_minus_1<4); + } + td->total_len = total_len; + return total_len; +} + +/* free up data structures */ +void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur) { + qtd_t *next; + while (cur) { + next = (qtd_t*)phys_to_virt(cur->next_qtd & ~31); + free(cur); + cur = next; + } + free(qh); +} + +int wait_for_tds(qtd_t *head) { + int result = 0; + qtd_t *cur = head; + while (1) { + if (0) dump_td(virt_to_phys(cur)); + while (cur->active && !cur->halted) udelay(60); + if (cur->halted) { + printf("ERROR with packet\n"); + dump_td(virt_to_phys(cur)); + printf("-----------------\n"); + return 1; + } + if (cur->next_qtd & 1) { + return 0; + } + if (0) dump_td(virt_to_phys(cur)); + /* helps debugging the TD chain */ + if (0) printf("\nmoving from %x to %x\n", cur, phys_to_virt(cur->next_qtd)); + cur = phys_to_virt(cur->next_qtd); + } + return result; +} + +static int ehci_bulk (endpoint_t *ep, int size, u8 *data, int finalize) +{ + int result = 0; + int endp = ep->endpoint & 0xf; + int pid = (ep->direction==IN)?EHCI_IN:EHCI_OUT; + + qtd_t *head = memalign(32, sizeof(qtd_t)); + qtd_t *cur = head; + while (1) { + memset(cur, 0, sizeof(qtd_t)); + cur->active = 1; + cur->pid = pid; + cur->cerr = 0; + u32 chunk = fill_td(cur, data, size); + size -= chunk; + data += chunk; + + cur->alt_terminate = 1; + if (size == 0) { + cur->next_qtd = virt_to_phys(0); + cur->terminate = 1; + break; + } else { + qtd_t *next = memalign(32, sizeof(qtd_t)); + cur->next_qtd = virt_to_phys(next); + cur = next; + } + } + + /* create QH */ + ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t)); + memset(qh, 0, sizeof(ehci_qh_t)); + qh->horiz_link_ptr = virt_to_phys(qh); + qh->type = 1; // FIXME: proper symbols for type. this is QH + qh->addr = ep->dev->address; + qh->ep = endp; + qh->eps = ep->dev->speed; + qh->dtc = 0; + qh->reclaim_head = 1; + qh->max_packet_len = ep->maxpacketsize; + qh->nak_cnt_reload = 0; + qh->pipe_multiplier = 3; + + qh->td.next_qtd = virt_to_phys(head); + qh->td.dt = ep->toggle; + head->dt = ep->toggle; + + /* hook up QH */ + EHCI_INST(ep->dev->controller)->operation->asynclistaddr = virt_to_phys(qh); + + /* start async schedule */ + EHCI_INST(ep->dev->controller)->operation->async_sched_enable = 1; + while (!EHCI_INST(ep->dev->controller)->operation->async_sched_status) ; /* wait */ + + /* wait for result */ + result = wait_for_tds(head); + + /* disable async schedule */ + EHCI_INST(ep->dev->controller)->operation->async_sched_enable = 0; + while (EHCI_INST(ep->dev->controller)->operation->async_sched_status) ; /* wait */ + + ep->toggle = cur->dt; + + free_qh_and_tds(qh, head); + return result; +} + + +/* FIXME: Handle control transfers as 3 QHs, so the 2nd stage can be >0x4000 bytes */ +static int ehci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, + int dalen, u8 *data) +{ + int endp = 0; // this is control. always 0 (for now) + int toggle = 0; + int mlen = dev->endpoints[0].maxpacketsize; + int result = 0; + + /* create qTDs */ + qtd_t *head = memalign(32, sizeof(qtd_t)); + qtd_t *cur = head; + memset(cur, 0, sizeof(qtd_t)); + cur->active = 1; + cur->dt = toggle; + cur->pid = EHCI_SETUP; + cur->cerr = 3; + if (fill_td(cur, devreq, drlen) != drlen) { + printf("ERROR: couldn't send the entire device request\n"); + } + qtd_t *next = memalign(32, sizeof(qtd_t)); + cur->next_qtd = virt_to_phys(next); + cur->alt_terminate = 1; + + /* FIXME: We're limited to 16-20K (depending on alignment) for payload for now. + * Figure out, how toggle can be set sensibly in this scenario */ + if (dalen > 0) { + toggle ^= 1; + cur = next; + memset(cur, 0, sizeof(qtd_t)); + cur->active = 1; + cur->dt = toggle; + cur->pid = (dir == OUT)?EHCI_OUT:EHCI_IN; + cur->cerr = 3; + if (fill_td(cur, data, dalen) != dalen) { + printf("ERROR: couldn't send the entire control payload\n"); + } + next = memalign(32, sizeof(qtd_t)); + cur->next_qtd = virt_to_phys(next); + cur->alt_terminate = 1; + } + + toggle = 1; + cur = next; + memset(cur, 0, sizeof(qtd_t)); + cur->active = 1; + cur->dt = toggle; + cur->pid = (dir == OUT)?EHCI_IN:EHCI_OUT; + cur->cerr = 0; + fill_td(cur, NULL, 0); + cur->next_qtd = virt_to_phys(0); + cur->terminate = 1; + cur->alt_terminate = 1; + + /* create QH */ + ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t)); + memset(qh, 0, sizeof(ehci_qh_t)); + qh->horiz_link_ptr = virt_to_phys(qh); + qh->type = 1; // FIXME: proper symbols for type. this is QH + qh->addr = dev->address; + qh->ep = endp; + qh->eps = dev->speed; + qh->dtc = 1; /* Take data toggle from TD, as control transfers are special */ + qh->reclaim_head = 1; + qh->max_packet_len = mlen; + qh->non_hs_control_ep = 0; // no support for non-HS devices at this time + qh->nak_cnt_reload = 0; + qh->pipe_multiplier = 3; + qh->td.next_qtd = virt_to_phys(head); + + /* hook up QH */ + EHCI_INST(dev->controller)->operation->asynclistaddr = virt_to_phys(qh); + + /* start async schedule */ + EHCI_INST(dev->controller)->operation->async_sched_enable = 1; + while (!EHCI_INST(dev->controller)->operation->async_sched_status) ; /* wait */ + + result = wait_for_tds(head); + + /* disable async schedule */ + EHCI_INST(dev->controller)->operation->async_sched_enable = 0; + while (EHCI_INST(dev->controller)->operation->async_sched_status) ; /* wait */ + + free_qh_and_tds(qh, head); + return result; +} + +static void* ehci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming) +{ + return NULL; +} + +static void ehci_destroy_intr_queue (endpoint_t *ep, void *queue) +{ +} + +static u8* ehci_poll_intr_queue (void *queue) +{ + return NULL; +} + +hci_t * +ehci_init (pcidev_t addr) +{ + int i; + hci_t *controller = new_controller (); + + if (!controller) + usb_fatal("Could not create USB controller instance.\n"); + + controller->instance = malloc (sizeof (ehci_t)); + if(!controller->instance) + usb_fatal("Not enough memory creating USB controller instance.\n"); + +#define PCI_COMMAND 4 +#define PCI_COMMAND_IO 1 +#define PCI_COMMAND_MEMORY 2 +#define PCI_COMMAND_MASTER 4 + + u32 pci_command = pci_read_config32(addr, PCI_COMMAND); + pci_command = (pci_command | PCI_COMMAND_MEMORY) & ~PCI_COMMAND_IO ; + pci_write_config32(addr, PCI_COMMAND, pci_command); + + controller->start = ehci_start; + controller->stop = ehci_stop; + controller->reset = ehci_reset; + controller->shutdown = ehci_shutdown; + controller->bulk = ehci_bulk; + controller->control = ehci_control; + controller->create_intr_queue = ehci_create_intr_queue; + controller->destroy_intr_queue = ehci_destroy_intr_queue; + controller->poll_intr_queue = ehci_poll_intr_queue; + for (i = 0; i < 128; i++) { + controller->devices[i] = 0; + } + init_device_entry (controller, 0); + + EHCI_INST(controller)->capabilities = phys_to_virt(pci_read_config32(addr, USBBASE)); + EHCI_INST(controller)->operation = (hc_op_t *)(phys_to_virt(pci_read_config32(addr, USBBASE)) + EHCI_INST(controller)->capabilities->caplength); + + /* default value for frame length adjust */ + pci_write_config8(addr, FLADJ, FLADJ_framelength(60000)); + + /* Enable operation of controller */ + controller->start(controller); + + /* take over all ports. USB1 should be blind now */ + EHCI_INST(controller)->operation->configflag = 1; + + /* TODO lots of stuff missing */ + + controller->devices[0]->controller = controller; + controller->devices[0]->init = ehci_rh_init; + controller->devices[0]->init (controller->devices[0]); + + return controller; +} Added: trunk/payloads/libpayload/drivers/usb/ehci.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/payloads/libpayload/drivers/usb/ehci.h Sat Sep 25 19:01:13 2010 (r5845) @@ -0,0 +1,40 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2010 coresystems GmbH + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef __EHCI_H +#define __EHCI_H + +#include <pci.h> +#include <usb/usb.h> + +hci_t *ehci_init (pcidev_t addr); + +void ehci_rh_init (usbdev_t *dev); + +#endif Added: trunk/payloads/libpayload/drivers/usb/ehci_private.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/payloads/libpayload/drivers/usb/ehci_private.h Sat Sep 25 19:01:13 2010 (r5845) @@ -0,0 +1,266 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2010 coresystems GmbH + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef __EHCI_PRIVATE_H +#define __EHCI_PRIVATE_H + +#include <pci.h> +#include <usb/usb.h> + +#define USBBASE 0x10 +#define FLADJ 0x61 +#define FLADJ_framelength(x) (((x)-59488)/16) + +typedef union { + u32 val; + volatile struct { + unsigned long current_conn_status:1; + unsigned long conn_status_change:1; + unsigned long port_enable:1; + unsigned long port_enable_change:1; + unsigned long overcurrent:1; + unsigned long overcurrent_change:1; + unsigned long force_port_resume:1; + unsigned long suspend:1; + unsigned long port_reset:1; + unsigned long:1; + unsigned long line_status:2; + unsigned long pp:1; + unsigned long port_owner:1; + unsigned long port_indicator_control:2; + unsigned long port_test_control:4; + unsigned long wake_on_connect_en:1; + unsigned long wake_on_disconnect_en:1; + unsigned long wake_on_overcurrent_en:1; + unsigned long:9; + } __attribute__ ((packed)); +} __attribute__ ((packed)) portsc_t; + +typedef struct { + u8 caplength; + u8 res1; + u16 hciversion; + union { + u32 hcsparams; + struct { + unsigned long n_ports:4; + unsigned long ppc:1; + unsigned long:2; + unsigned long port_routing_rules:1; + unsigned long n_pcc:4; + unsigned long n_cc:4; + unsigned long p_indicator:1; + unsigned long:3; + unsigned long debug_port_number:4; + unsigned long:8; + } __attribute__ ((packed)); + }; + union { + u32 hccparams; + struct { + unsigned long cap_64b_addr:1; + unsigned long cap_prog_framelist_size:1; + unsigned long cap_async_park:1; + unsigned long:1; + unsigned long isoc_sched_threshold:4; + unsigned long eecp:8; + unsigned long:16; + } __attribute__ ((packed)); + }; + union { + u64 hcsp_portroute; + struct { + unsigned long portroute0:4; + unsigned long portroute1:4; + unsigned long portroute2:4; + unsigned long portroute3:4; + unsigned long portroute4:4; + unsigned long portroute5:4; + unsigned long portroute6:4; + unsigned long portroute7:4; + unsigned long portroute8:4; + unsigned long portroute9:4; + unsigned long portroute10:4; + unsigned long portroute11:4; + unsigned long portroute12:4; + unsigned long portroute13:4; + unsigned long portroute14:4; + unsigned long portroute15:4; + unsigned long:4; + } __attribute__ ((packed)); + }; +} __attribute__ ((packed)) hc_cap_t; + +typedef struct { + union { + u32 usbcmd; + volatile struct { + unsigned long rs:1; + unsigned long hcreset:1; + unsigned long frame_list_size:2; + unsigned long periodic_sched_enable:1; + unsigned long async_sched_enable:1; + unsigned long irq_on_async_advance_doorbell:1; + unsigned long light_hc_reset:1; + unsigned long async_sched_park_mode_count:2; + unsigned long:1; + unsigned long async_sched_park_mode_enable:1; + unsigned long:4; + unsigned long irq_threshold_count:8; + unsigned long:8; + } __attribute__ ((packed)); + }; + union { + u32 usbsts; + struct { + unsigned long usbint:1; + unsigned long usberrint:1; + unsigned long port_change_detect:1; + unsigned long frame_list_rollover:1; + unsigned long host_system_error:1; + unsigned long irq_on_async_advance:1; + unsigned long:6; + unsigned long hchalted:1; + unsigned long reclamation:1; + unsigned long periodic_sched_status:1; + unsigned long async_sched_status:1; + unsigned long:16; + } __attribute__ ((packed)); + }; + union { + u32 usbintr; + struct { + unsigned long en_usb_irq:1; + unsigned long en_usb_err_irq:1; + unsigned long en_port_change_irq:1; + unsigned long en_frame_list_rollover_irq:1; + unsigned long en_host_system_error_irq:1; + unsigned long en_irq_on_async_advance:1; + unsigned long:26; + } __attribute__ ((packed)); + }; + u32 frindex; + u32 ctrldssegment; + u32 periodiclistbase; + u32 asynclistaddr; + u8 res1[0x3f-0x1c]; + u32 configflag; + portsc_t portsc[0]; +} hc_op_t; + +typedef struct { + union { + u32 next_qtd; + struct { + unsigned long terminate:1; + unsigned long:4; + unsigned long:27; + } __attribute__ ((packed)); + }; + union { + u32 alt_next_qtd; + struct { + unsigned long alt_terminate:1; + unsigned long:4; + unsigned long:27; + } __attribute__ ((packed)); + }; + struct { + union { + volatile u8 status; + struct { + volatile unsigned long perr:1; + volatile unsigned long splitxstate:1; + volatile unsigned long missed_mframe:1; + volatile unsigned long xact_err:1; + volatile unsigned long babble:1; + volatile unsigned long data_buf_err:1; + volatile unsigned long halted:1; + volatile unsigned long active:1; + } __attribute__ ((packed)); + }; + unsigned long pid:2; + volatile unsigned long cerr:2; + volatile unsigned long c_page:3; + unsigned long ioc:1; + volatile unsigned long total_len:15; + volatile unsigned long dt:1; + } __attribute__ ((packed)); + union { + u32 bufptr0; + struct { + volatile unsigned long cur_off:12; + unsigned long:20; + } __attribute__ ((packed)); + }; + u32 bufptrs[4]; + u32 bufptrs64[5]; +} __attribute__ ((packed)) qtd_t; + +typedef struct { + union { + u32 horiz_link_ptr; + struct { + unsigned long terminate:1; + unsigned long type:2; + unsigned long:1; + unsigned long:28; + } __attribute__ ((packed)); + }; + struct { + unsigned long addr:7; + unsigned long inactivate:1; + unsigned long ep:4; + unsigned long eps:2; + unsigned long dtc:1; + unsigned long reclaim_head:1; + unsigned long max_packet_len:11; + unsigned long non_hs_control_ep:1; + unsigned long nak_cnt_reload:4; + } __attribute__ ((packed)); + struct { + unsigned long irq_sched_mask:8; + unsigned long split_compl_mask:8; + unsigned long hub_addr:7; + unsigned long port_num:7; + unsigned long pipe_multiplier:2; + } __attribute__ ((packed)); + volatile u32 current_td_ptr; + volatile qtd_t td; +} ehci_qh_t; + +typedef struct ehci { + hc_cap_t *capabilities; + hc_op_t *operation; +} ehci_t; + + +#define EHCI_INST(controller) ((ehci_t*)((controller)->instance)) + +#endif Added: trunk/payloads/libpayload/drivers/usb/ehci_rh.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/payloads/libpayload/drivers/usb/ehci_rh.c Sat Sep 25 19:01:13 2010 (r5845) @@ -0,0 +1,145 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2010 coresystems GmbH + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <libpayload.h> +#include "ehci.h" +#include "ehci_private.h" + +typedef struct { + int n_ports; + /* typical C, n_ports is the number + * of ports, while ports[] spans [0,n_ports-1], + * even though the spec counts from 1. + */ + volatile portsc_t *ports; + int *devices; +} rh_inst_t; + +#define RH_INST(dev) ((rh_inst_t*)(dev)->data) + +static void +ehci_rh_destroy (usbdev_t *dev) +{ + free (RH_INST(dev)->devices); + free (RH_INST(dev)); +} + +static void +ehci_rh_hand_over_port (usbdev_t *dev, int port) +{ + volatile portsc_t *p = &(RH_INST(dev)->ports[port]); + + printf("giving up port %x, it's USB1\n", port+1); + + /* Lowspeed device. Hand over to companion */ + p->port_owner = 1; + do {} while (!p->conn_status_change); + /* RW/C register, so clear it by writing 1 */ + p->conn_status_change = 1; + return; +} + +static void +ehci_rh_scanport (usbdev_t *dev, int port) +{ + volatile portsc_t *p = &(RH_INST(dev)->ports[port]); + if (RH_INST(dev)->devices[port]!=-1) { + printf("Unregister device at port %x\n", port+1); + usb_detach_device(dev->controller, RH_INST(dev)->devices[port]); + RH_INST(dev)->devices[port]=-1; + } + /* device connected, handle */ + if (p->current_conn_status) { + mdelay(100); + if (p->line_status == 0x1) { + ehci_rh_hand_over_port(dev, port); + return; + } + p->port_enable = 0; + p->port_reset = 1; + mdelay(50); + p->port_reset = 0; + /* Wait for flag change to finish. The controller might take a while */ + while (p->port_reset) ; + if (!p->port_enable) { + ehci_rh_hand_over_port(dev, port); + return; + } + printf("port %x hosts a USB2 device\n", port+1); + RH_INST(dev)->devices[port] = usb_attach_device(dev->controller, dev->address, port, 2); + } + /* RW/C register, so clear it by writing 1 */ + p->conn_status_change = 1; +} + +static int +ehci_rh_report_port_changes (usbdev_t *dev) +{ + int i; + for (i=0; i<RH_INST(dev)->n_ports; i++) { + if (RH_INST(dev)->ports[i].conn_status_change) + return i; + } + return -1; +} + +static void +ehci_rh_poll (usbdev_t *dev) +{ + int port; + while ((port = ehci_rh_report_port_changes (dev)) != -1) + ehci_rh_scanport (dev, port); +} + + +void +ehci_rh_init (usbdev_t *dev) +{ + int i; + + dev->destroy = ehci_rh_destroy; + dev->poll = ehci_rh_poll; + + dev->data = malloc(sizeof(rh_inst_t)); + + RH_INST(dev)->n_ports = EHCI_INST(dev->controller)->capabilities->n_ports; + RH_INST(dev)->ports = EHCI_INST(dev->controller)->operation->portsc; + + printf("root hub has %x ports\n", RH_INST(dev)->n_ports); + + RH_INST(dev)->devices = malloc(RH_INST(dev)->n_ports * sizeof(int)); + for (i=0; i < RH_INST(dev)->n_ports; i++) { + RH_INST(dev)->devices[i] = -1; + RH_INST(dev)->ports[i].pp = 1; + } + + dev->address = 0; + dev->hub = -1; + dev->port = -1; +} Modified: trunk/payloads/libpayload/drivers/usb/usbinit.c ============================================================================== --- trunk/payloads/libpayload/drivers/usb/usbinit.c Sat Sep 25 18:17:20 2010 (r5844) +++ trunk/payloads/libpayload/drivers/usb/usbinit.c Sat Sep 25 19:01:13 2010 (r5845) @@ -31,7 +31,7 @@ #include <usb/usb.h> #include "uhci.h" #include "ohci.h" -//#include "ehci.h" +#include "ehci.h" #include "xhci.h" #include <usb/usbdisk.h> @@ -90,8 +90,7 @@ if (prog_if == 0x20) { printf ("EHCI controller\n"); #ifdef CONFIG_USB_EHCI - //ehci_init(addr); - printf ("Not supported.\n"); + ehci_init(addr); #else printf ("Not supported.\n"); #endif

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[PATCH]EHCI support for libpayload
by Patrick Georgi 25 Sep '10

25 Sep '10

Hi, attached patch provides an EHCI driver for libpayload. It doesn't implement interrupt transfers yet (ie. keyboard support), but provides robust bulk transfers (ie. mass storage). Speedwise, in my tests with FILO it's mostly limited by FILO's VFS, but there's probably some potential in the driver as well. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>

2 1

build service results for r5844
by repository service 25 Sep '10

25 Sep '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "uwe" checked in revision 5844 to the coreboot repository. This caused the following changes: Change Log: Drop some useless "../../../" in #includes (trivial). Build-tested using abuild. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of amd:serengeti_cheetah_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5844&device=serengeti_chee… Compilation of hp:dl165_g6_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5844&device=dl165_g6_fam10… Compilation of supermicro:h8dmr_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5844&device=h8dmr_fam10&ve… Compilation of supermicro:h8qme_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5844&device=h8qme_fam10&ve… Compilation of tyan:s2912_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5844&device=s2912_fam10&ve… If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[commit] r5844 - in trunk/src/mainboard: amd/db800 amd/dbm690t amd/mahogany amd/mahogany_fam10 amd/norwich amd/pistachio amd/serengeti_cheetah amd/tilapia_fam10 artecgroup/dbe61 asrock/939a785gmh a...
by repository service 25 Sep '10

25 Sep '10

Author: uwe Date: Sat Sep 25 18:17:20 2010 New Revision: 5844 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5844 Log: Drop some useless "../../../" in #includes (trivial). Build-tested using abuild. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/src/mainboard/amd/db800/irq_tables.c trunk/src/mainboard/amd/dbm690t/acpi_tables.c trunk/src/mainboard/amd/dbm690t/fadt.c trunk/src/mainboard/amd/mahogany/acpi_tables.c trunk/src/mainboard/amd/mahogany/fadt.c trunk/src/mainboard/amd/mahogany_fam10/fadt.c trunk/src/mainboard/amd/norwich/irq_tables.c trunk/src/mainboard/amd/pistachio/acpi_tables.c trunk/src/mainboard/amd/pistachio/fadt.c trunk/src/mainboard/amd/serengeti_cheetah/acpi_tables.c trunk/src/mainboard/amd/tilapia_fam10/fadt.c trunk/src/mainboard/artecgroup/dbe61/irq_tables.c trunk/src/mainboard/artecgroup/dbe61/mainboard.c trunk/src/mainboard/asrock/939a785gmh/acpi_tables.c trunk/src/mainboard/asrock/939a785gmh/fadt.c trunk/src/mainboard/asus/a8v-e_se/acpi_tables.c trunk/src/mainboard/asus/a8v-e_se/mptable.c trunk/src/mainboard/asus/m2v-mx_se/acpi_tables.c trunk/src/mainboard/asus/m4a785-m/fadt.c trunk/src/mainboard/digitallogic/msm800sev/irq_tables.c trunk/src/mainboard/getac/p470/acpi_tables.c trunk/src/mainboard/gigabyte/m57sli/acpi_tables.c trunk/src/mainboard/gigabyte/ma785gmt/fadt.c trunk/src/mainboard/gigabyte/ma78gm/fadt.c trunk/src/mainboard/ibase/mb899/acpi_tables.c trunk/src/mainboard/ibase/mb899/mainboard_smi.c trunk/src/mainboard/iei/kino-780am2-fam10/fadt.c trunk/src/mainboard/intel/d945gclf/acpi_tables.c trunk/src/mainboard/intel/d945gclf/mainboard_smi.c trunk/src/mainboard/iwill/dk8_htx/acpi_tables.c trunk/src/mainboard/jetway/pa78vm5/fadt.c trunk/src/mainboard/kontron/986lcd-m/acpi_tables.c trunk/src/mainboard/kontron/986lcd-m/mainboard_smi.c trunk/src/mainboard/kontron/kt690/acpi_tables.c trunk/src/mainboard/kontron/kt690/fadt.c trunk/src/mainboard/lippert/hurricane-lx/irq_tables.c trunk/src/mainboard/lippert/literunner-lx/irq_tables.c trunk/src/mainboard/lippert/roadrunner-lx/irq_tables.c trunk/src/mainboard/lippert/spacerunner-lx/irq_tables.c trunk/src/mainboard/msi/ms9652_fam10/acpi_tables.c trunk/src/mainboard/olpc/btest/mainboard.c trunk/src/mainboard/olpc/rev_a/mainboard.c trunk/src/mainboard/pcengines/alix1c/irq_tables.c trunk/src/mainboard/pcengines/alix2d/irq_tables.c trunk/src/mainboard/roda/rk886ex/acpi_tables.c trunk/src/mainboard/roda/rk886ex/mainboard_smi.c trunk/src/mainboard/technexion/tim5690/acpi_tables.c trunk/src/mainboard/technexion/tim5690/fadt.c trunk/src/mainboard/technexion/tim5690/speaker.c trunk/src/mainboard/technexion/tim8690/acpi_tables.c trunk/src/mainboard/technexion/tim8690/fadt.c trunk/src/mainboard/traverse/geos/irq_tables.c trunk/src/mainboard/tyan/s2891/acpi_tables.c trunk/src/mainboard/tyan/s2892/acpi_tables.c trunk/src/mainboard/tyan/s2895/acpi_tables.c trunk/src/mainboard/via/epia-m700/acpi_tables.c trunk/src/mainboard/via/epia-m700/fadt.c trunk/src/mainboard/via/epia-n/acpi_tables.c trunk/src/mainboard/via/epia-n/fadt.c trunk/src/mainboard/via/pc2500e/mptable.c trunk/src/mainboard/winent/pl6064/irq_tables.c Modified: trunk/src/mainboard/amd/db800/irq_tables.c ============================================================================== --- trunk/src/mainboard/amd/db800/irq_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/amd/db800/irq_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -21,7 +21,7 @@ #include <console/console.h> #include <arch/io.h> #include <arch/pirq_routing.h> -#include "../../../southbridge/amd/cs5536/cs5536.h" +#include "southbridge/amd/cs5536/cs5536.h" /* Platform IRQs */ #define PIRQA 10 Modified: trunk/src/mainboard/amd/dbm690t/acpi_tables.c ============================================================================== --- trunk/src/mainboard/amd/dbm690t/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/amd/dbm690t/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -25,7 +25,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> Modified: trunk/src/mainboard/amd/dbm690t/fadt.c ============================================================================== --- trunk/src/mainboard/amd/dbm690t/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/amd/dbm690t/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb600/sb600.h" +#include "southbridge/amd/sb600/sb600.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/amd/mahogany/acpi_tables.c ============================================================================== --- trunk/src/mainboard/amd/mahogany/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/amd/mahogany/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -25,7 +25,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> Modified: trunk/src/mainboard/amd/mahogany/fadt.c ============================================================================== --- trunk/src/mainboard/amd/mahogany/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/amd/mahogany/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb700/sb700.h" +#include "southbridge/amd/sb700/sb700.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/amd/mahogany_fam10/fadt.c ============================================================================== --- trunk/src/mainboard/amd/mahogany_fam10/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/amd/mahogany_fam10/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb700/sb700.h" +#include "southbridge/amd/sb700/sb700.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/amd/norwich/irq_tables.c ============================================================================== --- trunk/src/mainboard/amd/norwich/irq_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/amd/norwich/irq_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -21,7 +21,7 @@ #include <console/console.h> #include <arch/io.h> #include <arch/pirq_routing.h> -#include "../../../southbridge/amd/cs5536/cs5536.h" +#include "southbridge/amd/cs5536/cs5536.h" /* Platform IRQs */ #define PIRQA 11 Modified: trunk/src/mainboard/amd/pistachio/acpi_tables.c ============================================================================== --- trunk/src/mainboard/amd/pistachio/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/amd/pistachio/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -25,7 +25,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> Modified: trunk/src/mainboard/amd/pistachio/fadt.c ============================================================================== --- trunk/src/mainboard/amd/pistachio/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/amd/pistachio/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb600/sb600.h" +#include "southbridge/amd/sb600/sb600.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/amd/serengeti_cheetah/acpi_tables.c ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/amd/serengeti_cheetah/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -16,7 +16,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include "mb_sysconf.h" Modified: trunk/src/mainboard/amd/tilapia_fam10/fadt.c ============================================================================== --- trunk/src/mainboard/amd/tilapia_fam10/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/amd/tilapia_fam10/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb700/sb700.h" +#include "southbridge/amd/sb700/sb700.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/artecgroup/dbe61/irq_tables.c ============================================================================== --- trunk/src/mainboard/artecgroup/dbe61/irq_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/artecgroup/dbe61/irq_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -21,7 +21,7 @@ #include <console/console.h> #include <arch/io.h> #include <arch/pirq_routing.h> -#include "../../../southbridge/amd/cs5536/cs5536.h" +#include "southbridge/amd/cs5536/cs5536.h" /* Platform IRQs */ #define PIRQA 10 Modified: trunk/src/mainboard/artecgroup/dbe61/mainboard.c ============================================================================== --- trunk/src/mainboard/artecgroup/dbe61/mainboard.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/artecgroup/dbe61/mainboard.c Sat Sep 25 18:17:20 2010 (r5844) @@ -25,7 +25,7 @@ #include <arch/io.h> #include <cpu/x86/msr.h> #include <cpu/amd/lxdef.h> -#include "../../../southbridge/amd/cs5536/cs5536.h" +#include "southbridge/amd/cs5536/cs5536.h" #include "chip.h" static void init_gpio(void) Modified: trunk/src/mainboard/asrock/939a785gmh/acpi_tables.c ============================================================================== --- trunk/src/mainboard/asrock/939a785gmh/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/asrock/939a785gmh/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -25,7 +25,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> Modified: trunk/src/mainboard/asrock/939a785gmh/fadt.c ============================================================================== --- trunk/src/mainboard/asrock/939a785gmh/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/asrock/939a785gmh/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb700/sb700.h" +#include "southbridge/amd/sb700/sb700.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/asus/a8v-e_se/acpi_tables.c ============================================================================== --- trunk/src/mainboard/asus/a8v-e_se/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/asus/a8v-e_se/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -28,8 +28,8 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci_ids.h> -#include "../../../southbridge/via/vt8237r/vt8237r.h" -#include "../../../southbridge/via/k8t890/k8t890.h" +#include "southbridge/via/vt8237r/vt8237r.h" +#include "southbridge/via/k8t890/k8t890.h" extern const unsigned char AmlCode[]; Modified: trunk/src/mainboard/asus/a8v-e_se/mptable.c ============================================================================== --- trunk/src/mainboard/asus/a8v-e_se/mptable.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/asus/a8v-e_se/mptable.c Sat Sep 25 18:17:20 2010 (r5844) @@ -20,8 +20,8 @@ #include <string.h> #include <stdint.h> #include <arch/smp/mpspec.h> -#include "../../../southbridge/via/vt8237r/vt8237r.h" -#include "../../../southbridge/via/k8t890/k8t890.h" +#include "southbridge/via/vt8237r/vt8237r.h" +#include "southbridge/via/k8t890/k8t890.h" static void *smp_write_config_table(void *v) { Modified: trunk/src/mainboard/asus/m2v-mx_se/acpi_tables.c ============================================================================== --- trunk/src/mainboard/asus/m2v-mx_se/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/asus/m2v-mx_se/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -28,9 +28,9 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci_ids.h> -#include "../../../southbridge/via/vt8237r/vt8237r.h" -#include "../../../southbridge/via/k8t890/k8t890.h" -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "southbridge/via/vt8237r/vt8237r.h" +#include "southbridge/via/k8t890/k8t890.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include <cpu/amd/model_fxx_powernow.h> extern const unsigned char AmlCode[]; Modified: trunk/src/mainboard/asus/m4a785-m/fadt.c ============================================================================== --- trunk/src/mainboard/asus/m4a785-m/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/asus/m4a785-m/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb700/sb700.h" +#include "southbridge/amd/sb700/sb700.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/digitallogic/msm800sev/irq_tables.c ============================================================================== --- trunk/src/mainboard/digitallogic/msm800sev/irq_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/digitallogic/msm800sev/irq_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -21,7 +21,7 @@ #include <console/console.h> #include <arch/io.h> #include <arch/pirq_routing.h> -#include "../../../southbridge/amd/cs5536/cs5536.h" +#include "southbridge/amd/cs5536/cs5536.h" /* Platform IRQs */ #define PIRQA 11 Modified: trunk/src/mainboard/getac/p470/acpi_tables.c ============================================================================== --- trunk/src/mainboard/getac/p470/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/getac/p470/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -32,7 +32,7 @@ extern unsigned char AmlCode[]; -#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h" +#include "southbridge/intel/i82801gx/i82801gx_nvs.h" static void acpi_create_gnvs(global_nvs_t *gnvs) { Modified: trunk/src/mainboard/gigabyte/m57sli/acpi_tables.c ============================================================================== --- trunk/src/mainboard/gigabyte/m57sli/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/gigabyte/m57sli/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -29,7 +29,7 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci_ids.h> -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include <cpu/amd/model_fxx_powernow.h> #include <device/pci.h> #include <cpu/amd/amdk8_sysconf.h> Modified: trunk/src/mainboard/gigabyte/ma785gmt/fadt.c ============================================================================== --- trunk/src/mainboard/gigabyte/ma785gmt/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/gigabyte/ma785gmt/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb700/sb700.h" +#include "southbridge/amd/sb700/sb700.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/gigabyte/ma78gm/fadt.c ============================================================================== --- trunk/src/mainboard/gigabyte/ma78gm/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/gigabyte/ma78gm/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb700/sb700.h" +#include "southbridge/amd/sb700/sb700.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/ibase/mb899/acpi_tables.c ============================================================================== --- trunk/src/mainboard/ibase/mb899/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/ibase/mb899/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -34,7 +34,7 @@ unsigned long acpi_create_slic(unsigned long current); #endif -#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h" +#include "southbridge/intel/i82801gx/i82801gx_nvs.h" static void acpi_create_gnvs(global_nvs_t *gnvs) { memset((void *)gnvs, 0, sizeof(*gnvs)); Modified: trunk/src/mainboard/ibase/mb899/mainboard_smi.c ============================================================================== --- trunk/src/mainboard/ibase/mb899/mainboard_smi.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/ibase/mb899/mainboard_smi.c Sat Sep 25 18:17:20 2010 (r5844) @@ -21,7 +21,7 @@ #include <arch/romcc_io.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h" +#include "southbridge/intel/i82801gx/i82801gx_nvs.h" /* The southbridge SMI handler checks whether gnvs has a * valid pointer before calling the trap handler Modified: trunk/src/mainboard/iei/kino-780am2-fam10/fadt.c ============================================================================== --- trunk/src/mainboard/iei/kino-780am2-fam10/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/iei/kino-780am2-fam10/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb700/sb700.h" +#include "southbridge/amd/sb700/sb700.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/intel/d945gclf/acpi_tables.c ============================================================================== --- trunk/src/mainboard/intel/d945gclf/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/intel/d945gclf/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -65,7 +65,7 @@ } __attribute__((packed)) acpi_oemb_t; #endif -#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h" +#include "southbridge/intel/i82801gx/i82801gx_nvs.h" #if OLD_ACPI static void acpi_create_oemb(acpi_oemb_t *oemb) Modified: trunk/src/mainboard/intel/d945gclf/mainboard_smi.c ============================================================================== --- trunk/src/mainboard/intel/d945gclf/mainboard_smi.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/intel/d945gclf/mainboard_smi.c Sat Sep 25 18:17:20 2010 (r5844) @@ -21,7 +21,7 @@ #include <arch/romcc_io.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h" +#include "southbridge/intel/i82801gx/i82801gx_nvs.h" /* The southbridge SMI handler checks whether gnvs has a * valid pointer before calling the trap handler Modified: trunk/src/mainboard/iwill/dk8_htx/acpi_tables.c ============================================================================== --- trunk/src/mainboard/iwill/dk8_htx/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/iwill/dk8_htx/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -16,7 +16,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include "mb_sysconf.h" Modified: trunk/src/mainboard/jetway/pa78vm5/fadt.c ============================================================================== --- trunk/src/mainboard/jetway/pa78vm5/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/jetway/pa78vm5/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb700/sb700.h" +#include "southbridge/amd/sb700/sb700.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/kontron/986lcd-m/acpi_tables.c ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/kontron/986lcd-m/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -34,7 +34,7 @@ unsigned long acpi_create_slic(unsigned long current); #endif -#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h" +#include "southbridge/intel/i82801gx/i82801gx_nvs.h" static void acpi_create_gnvs(global_nvs_t *gnvs) { memset((void *)gnvs, 0, sizeof(*gnvs)); Modified: trunk/src/mainboard/kontron/986lcd-m/mainboard_smi.c ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/mainboard_smi.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/kontron/986lcd-m/mainboard_smi.c Sat Sep 25 18:17:20 2010 (r5844) @@ -21,7 +21,7 @@ #include <arch/romcc_io.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h" +#include "southbridge/intel/i82801gx/i82801gx_nvs.h" /* The southbridge SMI handler checks whether gnvs has a * valid pointer before calling the trap handler Modified: trunk/src/mainboard/kontron/kt690/acpi_tables.c ============================================================================== --- trunk/src/mainboard/kontron/kt690/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/kontron/kt690/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -25,7 +25,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> Modified: trunk/src/mainboard/kontron/kt690/fadt.c ============================================================================== --- trunk/src/mainboard/kontron/kt690/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/kontron/kt690/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb600/sb600.h" +#include "southbridge/amd/sb600/sb600.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/lippert/hurricane-lx/irq_tables.c ============================================================================== --- trunk/src/mainboard/lippert/hurricane-lx/irq_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/lippert/hurricane-lx/irq_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -24,7 +24,7 @@ #include <console/console.h> #include <arch/io.h> #include <arch/pirq_routing.h> -#include "../../../southbridge/amd/cs5536/cs5536.h" +#include "southbridge/amd/cs5536/cs5536.h" /* Platform IRQs */ #define PIRQA 10 Modified: trunk/src/mainboard/lippert/literunner-lx/irq_tables.c ============================================================================== --- trunk/src/mainboard/lippert/literunner-lx/irq_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/lippert/literunner-lx/irq_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -24,7 +24,7 @@ #include <console/console.h> #include <arch/io.h> #include <arch/pirq_routing.h> -#include "../../../southbridge/amd/cs5536/cs5536.h" +#include "southbridge/amd/cs5536/cs5536.h" /* Platform IRQs */ #define PIRQA 10 Modified: trunk/src/mainboard/lippert/roadrunner-lx/irq_tables.c ============================================================================== --- trunk/src/mainboard/lippert/roadrunner-lx/irq_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/lippert/roadrunner-lx/irq_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -24,7 +24,7 @@ #include <console/console.h> #include <arch/io.h> #include <arch/pirq_routing.h> -#include "../../../southbridge/amd/cs5536/cs5536.h" +#include "southbridge/amd/cs5536/cs5536.h" /* Platform IRQs */ #define PIRQA 10 Modified: trunk/src/mainboard/lippert/spacerunner-lx/irq_tables.c ============================================================================== --- trunk/src/mainboard/lippert/spacerunner-lx/irq_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/lippert/spacerunner-lx/irq_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -24,7 +24,7 @@ #include <console/console.h> #include <arch/io.h> #include <arch/pirq_routing.h> -#include "../../../southbridge/amd/cs5536/cs5536.h" +#include "southbridge/amd/cs5536/cs5536.h" /* Platform IRQs */ #define PIRQA 10 Modified: trunk/src/mainboard/msi/ms9652_fam10/acpi_tables.c ============================================================================== --- trunk/src/mainboard/msi/ms9652_fam10/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/msi/ms9652_fam10/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -29,7 +29,7 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci_ids.h> -//#include "../../../northbridge/amd/amdfam10/amdfam10_acpi.h" +//#include "northbridge/amd/amdfam10/amdfam10_acpi.h" #include <cpu/amd/model_fxx_powernow.h> #include <device/pci.h> #include <cpu/amd/amdfam10_sysconf.h> Modified: trunk/src/mainboard/olpc/btest/mainboard.c ============================================================================== --- trunk/src/mainboard/olpc/btest/mainboard.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/olpc/btest/mainboard.c Sat Sep 25 18:17:20 2010 (r5844) @@ -6,7 +6,7 @@ #include <arch/io.h> #include <pc80/mc146818rtc.h> #include "chip.h" -#include "../southbridge/amd/cs5536/cs5536_smbus2.h" +#include "southbridge/amd/cs5536/cs5536_smbus2.h" #include <cpu/amd/vr.h> /* Borrowed from mc146818rtc.c */ Modified: trunk/src/mainboard/olpc/rev_a/mainboard.c ============================================================================== --- trunk/src/mainboard/olpc/rev_a/mainboard.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/olpc/rev_a/mainboard.c Sat Sep 25 18:17:20 2010 (r5844) @@ -6,7 +6,7 @@ #include <arch/io.h> #include <pc80/mc146818rtc.h> #include "chip.h" -#include "../southbridge/amd/cs5536/cs5536_smbus2.h" +#include "southbridge/amd/cs5536/cs5536_smbus2.h" /* Borrowed from mc146818rtc.c */ Modified: trunk/src/mainboard/pcengines/alix1c/irq_tables.c ============================================================================== --- trunk/src/mainboard/pcengines/alix1c/irq_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/pcengines/alix1c/irq_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -20,7 +20,7 @@ #include <arch/pirq_routing.h> #include <console/console.h> #include <arch/io.h> -#include "../../../southbridge/amd/cs5536/cs5536.h" +#include "southbridge/amd/cs5536/cs5536.h" /* Platform IRQs */ #define PIRQA 11 Modified: trunk/src/mainboard/pcengines/alix2d/irq_tables.c ============================================================================== --- trunk/src/mainboard/pcengines/alix2d/irq_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/pcengines/alix2d/irq_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -20,7 +20,7 @@ #include <arch/pirq_routing.h> #include <console/console.h> #include <arch/io.h> -#include "../../../southbridge/amd/cs5536/cs5536.h" +#include "southbridge/amd/cs5536/cs5536.h" /* Platform IRQs */ #define PIRQA 11 Modified: trunk/src/mainboard/roda/rk886ex/acpi_tables.c ============================================================================== --- trunk/src/mainboard/roda/rk886ex/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/roda/rk886ex/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -90,7 +90,7 @@ } #endif -#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h" +#include "southbridge/intel/i82801gx/i82801gx_nvs.h" static void acpi_create_gnvs(global_nvs_t *gnvs) { memset((void *)gnvs, 0, sizeof(*gnvs)); Modified: trunk/src/mainboard/roda/rk886ex/mainboard_smi.c ============================================================================== --- trunk/src/mainboard/roda/rk886ex/mainboard_smi.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/roda/rk886ex/mainboard_smi.c Sat Sep 25 18:17:20 2010 (r5844) @@ -23,7 +23,7 @@ #include <arch/romcc_io.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h" +#include "southbridge/intel/i82801gx/i82801gx_nvs.h" /* The southbridge SMI handler checks whether gnvs has a * valid pointer before calling the trap handler Modified: trunk/src/mainboard/technexion/tim5690/acpi_tables.c ============================================================================== --- trunk/src/mainboard/technexion/tim5690/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/technexion/tim5690/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -25,7 +25,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> Modified: trunk/src/mainboard/technexion/tim5690/fadt.c ============================================================================== --- trunk/src/mainboard/technexion/tim5690/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/technexion/tim5690/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb600/sb600.h" +#include "southbridge/amd/sb600/sb600.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/technexion/tim5690/speaker.c ============================================================================== --- trunk/src/mainboard/technexion/tim5690/speaker.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/technexion/tim5690/speaker.c Sat Sep 25 18:17:20 2010 (r5844) @@ -29,7 +29,7 @@ #include <arch/io.h> #include <device/pci.h> #include <device/pci_ids.h> -#include "../../../southbridge/amd/sb600/sb600.h" +#include "southbridge/amd/sb600/sb600.h" #include <delay.h> #endif /* __PRE_RAM__ */ Modified: trunk/src/mainboard/technexion/tim8690/acpi_tables.c ============================================================================== --- trunk/src/mainboard/technexion/tim8690/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/technexion/tim8690/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -25,7 +25,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> Modified: trunk/src/mainboard/technexion/tim8690/fadt.c ============================================================================== --- trunk/src/mainboard/technexion/tim8690/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/technexion/tim8690/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -26,7 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <device/device.h> -#include "../../../southbridge/amd/sb600/sb600.h" +#include "southbridge/amd/sb600/sb600.h" /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ Modified: trunk/src/mainboard/traverse/geos/irq_tables.c ============================================================================== --- trunk/src/mainboard/traverse/geos/irq_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/traverse/geos/irq_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -21,7 +21,7 @@ #include <console/console.h> #include <arch/io.h> #include <arch/pirq_routing.h> -#include "../../../southbridge/amd/cs5536/cs5536.h" +#include "southbridge/amd/cs5536/cs5536.h" /* Platform IRQs */ #define PIRQA 11 Modified: trunk/src/mainboard/tyan/s2891/acpi_tables.c ============================================================================== --- trunk/src/mainboard/tyan/s2891/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/tyan/s2891/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -17,7 +17,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include <cpu/amd/model_fxx_powernow.h> extern const unsigned char AmlCode[]; Modified: trunk/src/mainboard/tyan/s2892/acpi_tables.c ============================================================================== --- trunk/src/mainboard/tyan/s2892/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/tyan/s2892/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -17,7 +17,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include <cpu/amd/model_fxx_powernow.h> extern const unsigned char AmlCode[]; Modified: trunk/src/mainboard/tyan/s2895/acpi_tables.c ============================================================================== --- trunk/src/mainboard/tyan/s2895/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/tyan/s2895/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -17,7 +17,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "../../../northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/amdk8_acpi.h" #include <cpu/amd/model_fxx_powernow.h> extern const unsigned char AmlCode[]; Modified: trunk/src/mainboard/via/epia-m700/acpi_tables.c ============================================================================== --- trunk/src/mainboard/via/epia-m700/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/via/epia-m700/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -33,7 +33,7 @@ #include <arch/acpi.h> #include <device/device.h> #include <device/pci_ids.h> -#include "../../../northbridge/via/vx800/vx800.h" +#include "northbridge/via/vx800/vx800.h" extern const unsigned char AmlCode_dsdt[]; extern const unsigned char AmlCode_ssdt[]; Modified: trunk/src/mainboard/via/epia-m700/fadt.c ============================================================================== --- trunk/src/mainboard/via/epia-m700/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/via/epia-m700/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -21,7 +21,7 @@ #include <string.h> #include <arch/acpi.h> -#include "../../../northbridge/via/vx800/vx800.h" +#include "northbridge/via/vx800/vx800.h" void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) { Modified: trunk/src/mainboard/via/epia-n/acpi_tables.c ============================================================================== --- trunk/src/mainboard/via/epia-n/acpi_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/via/epia-n/acpi_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -33,7 +33,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include "../../../southbridge/via/vt8237r/vt8237r.h" +#include "southbridge/via/vt8237r/vt8237r.h" extern const unsigned char AmlCode[]; Modified: trunk/src/mainboard/via/epia-n/fadt.c ============================================================================== --- trunk/src/mainboard/via/epia-n/fadt.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/via/epia-n/fadt.c Sat Sep 25 18:17:20 2010 (r5844) @@ -25,7 +25,7 @@ #include <string.h> #include <arch/acpi.h> -#include "../../../southbridge/via/vt8237r/vt8237r.h" +#include "southbridge/via/vt8237r/vt8237r.h" void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){ acpi_header_t *header=&(fadt->header); Modified: trunk/src/mainboard/via/pc2500e/mptable.c ============================================================================== --- trunk/src/mainboard/via/pc2500e/mptable.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/via/pc2500e/mptable.c Sat Sep 25 18:17:20 2010 (r5844) @@ -27,7 +27,7 @@ #include <device/pci.h> #include <string.h> #include <stdint.h> -#include "../../../southbridge/via/vt8237r/vt8237r.h" +#include "southbridge/via/vt8237r/vt8237r.h" static void *smp_write_config_table(void *v) { Modified: trunk/src/mainboard/winent/pl6064/irq_tables.c ============================================================================== --- trunk/src/mainboard/winent/pl6064/irq_tables.c Sat Sep 25 16:58:28 2010 (r5843) +++ trunk/src/mainboard/winent/pl6064/irq_tables.c Sat Sep 25 18:17:20 2010 (r5844) @@ -22,7 +22,7 @@ #include <console/console.h> #include <arch/io.h> #include <arch/pirq_routing.h> -#include "../../../southbridge/amd/cs5536/cs5536.h" +#include "southbridge/amd/cs5536/cs5536.h" /* Platform IRQs */ #define PIRQA 11

1 0

build service results for r5843
by repository service 25 Sep '10

25 Sep '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "uwe" checked in revision 5843 to the coreboot repository. This caused the following changes: Change Log: Various CONFIG_DEBUG_RAM_SETUP related fixes (trivial). Some boards still used the old DEBUG_RAM_SETUP (without _CONFIG prefix). Also, consistently use "#if CONFIG_DEBUG_RAM_SETUP" (not #ifdef) as we do elsewhere. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of amd:serengeti_cheetah_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5843&device=serengeti_chee… Compilation of hp:dl165_g6_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5843&device=dl165_g6_fam10… Compilation of supermicro:h8dmr_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5843&device=h8dmr_fam10&ve… Compilation of supermicro:h8qme_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5843&device=h8qme_fam10&ve… Compilation of tyan:s2912_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5843&device=s2912_fam10&ve… If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

build service results for r5842
by repository service 25 Sep '10

25 Sep '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "uwe" checked in revision 5842 to the coreboot repository. This caused the following changes: Change Log: Various USB Debug Port fixes (trivial). - Drop unused DBGP_DEFAULT #defines on boards with chipsets where no USB Debug Port support is implemented anyway (at the moment, at least): - hp/dl145_g3 - hp/dl165_g6_fam10 - ICH7: Move unrelated code out of set_debug_port(). All ICH southbridges with Debug Port hardcode the physical USB port used as Debug Port to 1. In other words, this port is not user-configurable (as seems to be the case on NVIDIA MCP55). For now we keep the 'port' parameter in order to not change the API, this might be fixed differently later. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of amd:serengeti_cheetah_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5842&device=serengeti_chee… Compilation of hp:dl165_g6_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5842&device=dl165_g6_fam10… Compilation of supermicro:h8dmr_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5842&device=h8dmr_fam10&ve… Compilation of supermicro:h8qme_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5842&device=h8qme_fam10&ve… Compilation of tyan:s2912_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5842&device=s2912_fam10&ve… If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

[commit] r5843 - in trunk/src: mainboard/getac/p470 mainboard/intel/d945gclf mainboard/roda/rk886ex northbridge/intel/i440lx northbridge/via/vt8601
by repository service 25 Sep '10

25 Sep '10

Author: uwe Date: Sat Sep 25 16:58:28 2010 New Revision: 5843 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5843 Log: Various CONFIG_DEBUG_RAM_SETUP related fixes (trivial). Some boards still used the old DEBUG_RAM_SETUP (without _CONFIG prefix). Also, consistently use "#if CONFIG_DEBUG_RAM_SETUP" (not #ifdef) as we do elsewhere. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/src/mainboard/getac/p470/romstage.c trunk/src/mainboard/intel/d945gclf/romstage.c trunk/src/mainboard/roda/rk886ex/romstage.c trunk/src/northbridge/intel/i440lx/Kconfig trunk/src/northbridge/intel/i440lx/raminit.c trunk/src/northbridge/via/vt8601/Kconfig trunk/src/northbridge/via/vt8601/raminit.c Modified: trunk/src/mainboard/getac/p470/romstage.c ============================================================================== --- trunk/src/mainboard/getac/p470/romstage.c Sat Sep 25 16:23:31 2010 (r5842) +++ trunk/src/mainboard/getac/p470/romstage.c Sat Sep 25 16:58:28 2010 (r5843) @@ -379,7 +379,7 @@ #if CONFIG_HAVE_ACPI_RESUME == 0 /* When doing resume, we must not overwrite RAM */ -#if defined(DEBUG_RAM_SETUP) +#if CONFIG_DEBUG_RAM_SETUP sdram_dump_mchbar_registers(); { Modified: trunk/src/mainboard/intel/d945gclf/romstage.c ============================================================================== --- trunk/src/mainboard/intel/d945gclf/romstage.c Sat Sep 25 16:23:31 2010 (r5842) +++ trunk/src/mainboard/intel/d945gclf/romstage.c Sat Sep 25 16:58:28 2010 (r5843) @@ -295,7 +295,7 @@ #if !CONFIG_HAVE_ACPI_RESUME #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8 -#if defined(DEBUG_RAM_SETUP) +#if CONFIG_DEBUG_RAM_SETUP sdram_dump_mchbar_registers(); #endif Modified: trunk/src/mainboard/roda/rk886ex/romstage.c ============================================================================== --- trunk/src/mainboard/roda/rk886ex/romstage.c Sat Sep 25 16:23:31 2010 (r5842) +++ trunk/src/mainboard/roda/rk886ex/romstage.c Sat Sep 25 16:58:28 2010 (r5843) @@ -355,7 +355,7 @@ #if !CONFIG_HAVE_ACPI_RESUME #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8 -#if defined(DEBUG_RAM_SETUP) +#if CONFIG_DEBUG_RAM_SETUP sdram_dump_mchbar_registers(); { Modified: trunk/src/northbridge/intel/i440lx/Kconfig ============================================================================== --- trunk/src/northbridge/intel/i440lx/Kconfig Sat Sep 25 16:23:31 2010 (r5842) +++ trunk/src/northbridge/intel/i440lx/Kconfig Sat Sep 25 16:58:28 2010 (r5843) @@ -19,4 +19,5 @@ config NORTHBRIDGE_INTEL_I440LX bool + select HAVE_DEBUG_RAM_SETUP Modified: trunk/src/northbridge/intel/i440lx/raminit.c ============================================================================== --- trunk/src/northbridge/intel/i440lx/raminit.c Sat Sep 25 16:23:31 2010 (r5842) +++ trunk/src/northbridge/intel/i440lx/raminit.c Sat Sep 25 16:58:28 2010 (r5843) @@ -31,7 +31,7 @@ /* Uncomment this to enable debugging output. */ /* Debugging macros. */ -#if defined(DEBUG_RAM_SETUP) +#if CONFIG_DEBUG_RAM_SETUP #define PRINT_DEBUG(x) print_debug(x) #define PRINT_DEBUG_HEX8(x) print_debug_hex8(x) #define PRINT_DEBUG_HEX16(x) print_debug_hex16(x) @@ -215,7 +215,7 @@ reg32 &= 0xe8000000U; pci_write_config32(NB, APBASE, reg32); - #ifdef DEBUG_RAM_SETUP +#if CONFIG_DEBUG_RAM_SETUP /* * apbase dont get set still, no idea what i have doing wrong yet, * i am almost sure that somehow i set it by mistake once, but can't @@ -225,7 +225,7 @@ PRINT_DEBUG("APBASE "); PRINT_DEBUG_HEX32(reg32); PRINT_DEBUG("\n"); - #endif +#endif } @@ -265,7 +265,7 @@ * i am not sure if that is needed, but was usefull * for me to confirm what got written */ -#ifdef DEBUG_RAM_SETUP +#if CONFIG_DEBUG_RAM_SETUP PRINT_DEBUG(" Set register 0x"); PRINT_DEBUG_HEX8(register_values[i]); PRINT_DEBUG(" to 0x"); Modified: trunk/src/northbridge/via/vt8601/Kconfig ============================================================================== --- trunk/src/northbridge/via/vt8601/Kconfig Sat Sep 25 16:23:31 2010 (r5842) +++ trunk/src/northbridge/via/vt8601/Kconfig Sat Sep 25 16:58:28 2010 (r5843) @@ -1,3 +1,4 @@ config NORTHBRIDGE_VIA_VT8601 bool + select HAVE_DEBUG_RAM_SETUP Modified: trunk/src/northbridge/via/vt8601/raminit.c ============================================================================== --- trunk/src/northbridge/via/vt8601/raminit.c Sat Sep 25 16:23:31 2010 (r5842) +++ trunk/src/northbridge/via/vt8601/raminit.c Sat Sep 25 16:58:28 2010 (r5843) @@ -69,7 +69,7 @@ } } -#ifdef CONFIG_DEBUG_RAM_SETUP +#if CONFIG_DEBUG_RAM_SETUP static void dumpnorth(device_t north) { unsigned int r, c;

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coreboot September 2010