coreboot September 2010

coreboot@coreboot.org

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324 discussions

Advice on how to approach porting old hardware?
by Shane Norris 27 Sep '10

27 Sep '10

Hello all, I would like to re-task a bunch of Hyundai w152 thin clients with on board XGA screens (circa 2003) running on Geode SCx200 (SC2200 specifically) SOC which according to the supported chip-sets page hasn't been tested since back in coreboot v1. My questions: Would I be better off starting with the old v1 code base and back porting the PC87360 Super IO code (which is in the v4 code base) or start from v4 code base and bring the scx200 code forward? and Given that the scx200 product lines have been retired would working on v4 support for them benefit anyone else besides myself? I have 12 of these (plus a 13th I sacrificed so I can trace the motherboard connections to the CPU) so am willing to put a bit of work into doing the board support for my own purposes but I can't really see anyone else using the port in the future considering the hardware is all but extinct. >From the hind site of of somebody who is all ready familiar with the coreboot code what would be the shortest route for me to get these things booting under my control? The important parts of the system are: NSC Geode sc2200 cpu/SoC, NSC PC87360 SuperIO, SST 39SF020A 2 Mbit flash (with XpressROM installed) M-Systems MD-2811-032-v3 DiskOnChip (with Windows CE.Net 4.1 installed), 64MB ram module Thanks in advance for your input -regards Shane Norris

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[patch] ck804 ehci debug enable
by Jonathan A. Kollasch 26 Sep '10

26 Sep '10

Duplicate the MCP55 EHCI Debug Port enable code for use with CK804. Signed-off-by: Jonathan Kollasch <jakllsch(a)kollasch.net> --- svn cp src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c src/southbridge/nvidia/ck804/ck804_enable_usbdebug.c should be executed before applying this patch.

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[commit] r5857 - trunk/src/southbridge/nvidia/ck804
by repository service 26 Sep '10

26 Sep '10

Author: uwe Date: Sun Sep 26 18:01:08 2010 New Revision: 5857 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5857 Log: Duplicate the MCP55 EHCI Debug Port enable code for use with CK804. Signed-off-by: Jonathan Kollasch <jakllsch(a)kollasch.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Added: trunk/src/southbridge/nvidia/ck804/ck804_enable_usbdebug.c - copied, changed from r5856, trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c Modified: trunk/src/southbridge/nvidia/ck804/Kconfig Modified: trunk/src/southbridge/nvidia/ck804/Kconfig ============================================================================== --- trunk/src/southbridge/nvidia/ck804/Kconfig Sun Sep 26 17:23:28 2010 (r5856) +++ trunk/src/southbridge/nvidia/ck804/Kconfig Sun Sep 26 18:01:08 2010 (r5857) @@ -1,6 +1,7 @@ config SOUTHBRIDGE_NVIDIA_CK804 bool select HAVE_HARD_RESET + select HAVE_USBDEBUG select IOAPIC config ID_SECTION_OFFSET Copied and modified: trunk/src/southbridge/nvidia/ck804/ck804_enable_usbdebug.c (from r5856, trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c) ============================================================================== --- trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c Sun Sep 26 17:23:28 2010 (r5856, copy source) +++ trunk/src/southbridge/nvidia/ck804/ck804_enable_usbdebug.c Sun Sep 26 18:01:08 2010 (r5857) @@ -26,9 +26,9 @@ #include <device/pci_def.h> #if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20 -#define MCP55_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE +#define CK804_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE #else -#define MCP55_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE +#define CK804_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE #endif #define EHCI_BAR 0xFEF00000 /* EHCI BAR address */ @@ -38,7 +38,7 @@ void set_debug_port(unsigned int port) { u32 dword; - device_t dev = PCI_DEV(0, MCP55_DEVN_BASE + 2, 1); /* USB EHCI */ + device_t dev = PCI_DEV(0, CK804_DEVN_BASE + 2, 1); /* USB EHCI */ /* Write the port number to 0x74[15:12]. */ dword = pci_read_config32(dev, 0x74); @@ -47,9 +47,9 @@ pci_write_config32(dev, 0x74, dword); } -static void mcp55_enable_usbdebug(unsigned int port) +static void ck804_enable_usbdebug(unsigned int port) { - device_t dev = PCI_DEV(0, MCP55_DEVN_BASE + 2, 1); /* USB EHCI */ + device_t dev = PCI_DEV(0, CK804_DEVN_BASE + 2, 1); /* USB EHCI */ /* Mark the requested physical USB port (1-15) as the Debug Port. */ set_debug_port(port);

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[commit] r5856 - in trunk/src: mainboard/intel/d810e2cb southbridge/intel/i82801bx
by repository service 26 Sep '10

26 Sep '10

Author: stepan Date: Sun Sep 26 17:23:28 2010 New Revision: 5856 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5856 Log: i82801bx defines the hard reset function, so move the "select" statement to that component rather than the mainboard. The intel/d810e2cb is the only board using the i82801bx southbridge. Signed-off-by: Warren Turkal <wt(a)penguintechs.org> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/mainboard/intel/d810e2cb/Kconfig trunk/src/southbridge/intel/i82801bx/Kconfig Modified: trunk/src/mainboard/intel/d810e2cb/Kconfig ============================================================================== --- trunk/src/mainboard/intel/d810e2cb/Kconfig Sun Sep 26 17:20:56 2010 (r5855) +++ trunk/src/mainboard/intel/d810e2cb/Kconfig Sun Sep 26 17:23:28 2010 (r5856) @@ -26,7 +26,6 @@ select SOUTHBRIDGE_INTEL_I82801BX select SUPERIO_SMSC_SMSCSUPERIO select HAVE_PIRQ_TABLE - select HAVE_HARD_RESET select USE_WATCHDOG_ON_BOOT select UDELAY_TSC select BOARD_ROMSIZE_KB_512 Modified: trunk/src/southbridge/intel/i82801bx/Kconfig ============================================================================== --- trunk/src/southbridge/intel/i82801bx/Kconfig Sun Sep 26 17:20:56 2010 (r5855) +++ trunk/src/southbridge/intel/i82801bx/Kconfig Sun Sep 26 17:23:28 2010 (r5856) @@ -19,4 +19,5 @@ config SOUTHBRIDGE_INTEL_I82801BX bool + select HAVE_HARD_RESET

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[commit] r5855 - in trunk/src/mainboard: getac/p470 ibase/mb899 intel/d945gclf kontron/986lcd-m
by repository service 26 Sep '10

26 Sep '10

Author: stepan Date: Sun Sep 26 17:20:56 2010 New Revision: 5855 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5855 Log: Remove hard reset config from some mainboard configs Most of the mainboards with i82801gx SBs seem to use the HAVE_HARD_RESET, which is already selected in the i82801gx SB config. Removing it from some of those boards should be a functional no-op. Signed-off-by: Warren Turkal <wt(a)penguintechs.org> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/mainboard/getac/p470/Kconfig trunk/src/mainboard/ibase/mb899/Kconfig trunk/src/mainboard/intel/d945gclf/Kconfig trunk/src/mainboard/kontron/986lcd-m/Kconfig Modified: trunk/src/mainboard/getac/p470/Kconfig ============================================================================== --- trunk/src/mainboard/getac/p470/Kconfig Sun Sep 26 17:19:44 2010 (r5854) +++ trunk/src/mainboard/getac/p470/Kconfig Sun Sep 26 17:20:56 2010 (r5855) @@ -33,7 +33,6 @@ select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE select HAVE_OPTION_TABLE - select HAVE_HARD_RESET select HAVE_ACPI_RESUME select HAVE_ACPI_SLIC select MMCONF_SUPPORT Modified: trunk/src/mainboard/ibase/mb899/Kconfig ============================================================================== --- trunk/src/mainboard/ibase/mb899/Kconfig Sun Sep 26 17:19:44 2010 (r5854) +++ trunk/src/mainboard/ibase/mb899/Kconfig Sun Sep 26 17:20:56 2010 (r5855) @@ -12,7 +12,6 @@ select GENERATE_ACPI_TABLES select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE - select HAVE_HARD_RESET select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME select MMCONF_SUPPORT Modified: trunk/src/mainboard/intel/d945gclf/Kconfig ============================================================================== --- trunk/src/mainboard/intel/d945gclf/Kconfig Sun Sep 26 17:19:44 2010 (r5854) +++ trunk/src/mainboard/intel/d945gclf/Kconfig Sun Sep 26 17:20:56 2010 (r5855) @@ -30,7 +30,6 @@ select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE select HAVE_OPTION_TABLE - select HAVE_HARD_RESET select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select HAVE_ACPI_TABLES Modified: trunk/src/mainboard/kontron/986lcd-m/Kconfig ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/Kconfig Sun Sep 26 17:19:44 2010 (r5854) +++ trunk/src/mainboard/kontron/986lcd-m/Kconfig Sun Sep 26 17:20:56 2010 (r5855) @@ -13,7 +13,6 @@ select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE select HAVE_OPTION_TABLE - select HAVE_HARD_RESET select HAVE_ACPI_RESUME select MMCONF_SUPPORT select HAVE_SMI_HANDLER

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[commit] r5854 - in trunk/src/cpu/amd: model_10xxx model_fxx
by repository service 26 Sep '10

26 Sep '10

Author: stepan Date: Sun Sep 26 17:19:44 2010 New Revision: 5854 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5854 Log: drop some more unneeded ../../.. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/cpu/amd/model_10xxx/model_10xxx_init.c trunk/src/cpu/amd/model_fxx/model_fxx_init.c Modified: trunk/src/cpu/amd/model_10xxx/model_10xxx_init.c ============================================================================== --- trunk/src/cpu/amd/model_10xxx/model_10xxx_init.c Sun Sep 26 17:18:21 2010 (r5853) +++ trunk/src/cpu/amd/model_10xxx/model_10xxx_init.c Sun Sep 26 17:19:44 2010 (r5854) @@ -28,7 +28,7 @@ #include <pc80/mc146818rtc.h> #include <cpu/x86/lapic.h> -#include "../../../northbridge/amd/amdfam10/amdfam10.h" +#include "northbridge/amd/amdfam10/amdfam10.h" #include <cpu/amd/model_10xxx_rev.h> #include <cpu/cpu.h> Modified: trunk/src/cpu/amd/model_fxx/model_fxx_init.c ============================================================================== --- trunk/src/cpu/amd/model_fxx/model_fxx_init.c Sun Sep 26 17:18:21 2010 (r5853) +++ trunk/src/cpu/amd/model_fxx/model_fxx_init.c Sun Sep 26 17:19:44 2010 (r5854) @@ -6,7 +6,7 @@ * Copyright 2005 AMD * 2005.08 yhlu add microcode support -*/ + */ #include <console/console.h> #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> @@ -18,7 +18,7 @@ #include <pc80/mc146818rtc.h> #include <cpu/x86/lapic.h> -#include "../../../northbridge/amd/amdk8/amdk8.h" +#include "northbridge/amd/amdk8/amdk8.h" #include <cpu/amd/model_fxx_rev.h> #include <cpu/amd/microcode.h>

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[commit] r5853 - in trunk/src: cpu/intel/model_106cx mainboard/intel/d945gclf
by repository service 26 Sep '10

26 Sep '10

Author: stepan Date: Sun Sep 26 17:18:21 2010 New Revision: 5853 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5853 Log: Normalize the config option for the Intel Atom CPU. All Intel CPU models appear to be identified with the form INTEL_CPU_MODEL_xxxxx. I haved changed the Atom to fit this normal form. A side effect is that the CPU doesn't need to be listed on the boards that support it since the socket identifies the CPUs it supports. Signed-off-by: Warren Turkal <wt(a)penguintechs.org> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/cpu/intel/model_106cx/Kconfig trunk/src/mainboard/intel/d945gclf/Kconfig Modified: trunk/src/cpu/intel/model_106cx/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_106cx/Kconfig Sun Sep 26 17:15:48 2010 (r5852) +++ trunk/src/cpu/intel/model_106cx/Kconfig Sun Sep 26 17:18:21 2010 (r5853) @@ -1,4 +1,4 @@ -config CPU_INTEL_ATOM_230 +config CPU_INTEL_MODEL_106CX bool select SMP select SSE2 Modified: trunk/src/mainboard/intel/d945gclf/Kconfig ============================================================================== --- trunk/src/mainboard/intel/d945gclf/Kconfig Sun Sep 26 17:15:48 2010 (r5852) +++ trunk/src/mainboard/intel/d945gclf/Kconfig Sun Sep 26 17:18:21 2010 (r5853) @@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 - select CPU_INTEL_ATOM_230 select CPU_INTEL_SOCKET_441 select NORTHBRIDGE_INTEL_I945 select SOUTHBRIDGE_INTEL_I82801GX

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[commit] r5852 - in trunk/util: dump_mmcr dumpmmcr
by repository service 26 Sep '10

26 Sep '10

Author: stepan Date: Sun Sep 26 17:15:48 2010 New Revision: 5852 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5852 Log: the utility is called dumpmmcr, not dump_mmcr Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Added: trunk/util/dumpmmcr/ - copied from r5851, trunk/util/dump_mmcr/ Deleted: trunk/util/dump_mmcr/

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[PATCH] Kconfig dependencies for USBDEBUG
by Uwe Hermann 26 Sep '10

26 Sep '10

See patch. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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[commit] r5851 - trunk/src/cpu/amd/sc520
by repository service 26 Sep '10

26 Sep '10

Author: stepan Date: Sun Sep 26 17:04:46 2010 New Revision: 5851 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5851 Log: dumpmmcr utility is available under util and shares most of the code. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Deleted: trunk/src/cpu/amd/sc520/mmcrtest.c trunk/src/cpu/amd/sc520/mmcrval.c

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coreboot September 2010