coreboot November 2010

coreboot@coreboot.org

48 participants
285 discussions

Start a nNew thread

SMM on K8
by Stefan Reinauer 19 Nov '10

19 Nov '10

First shot, untested

3 2

[commit] r6098 - trunk/src/arch/i386/boot
by repository service 19 Nov '10

19 Nov '10

Author: uwe Date: Fri Nov 19 16:14:42 2010 New Revision: 6098 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6098 Log: Cosmetic fixes and comment additions in acpi.c. - Fix whitespace, coding style, and indentation in some places. - Add comments for less obvious entries and hardcoded numbers (e.g. 'type'). - Add comments for all/most 'revision' fields, mention in which version of the ACPI spec which revision number is to be used. - Add URLs to a few external documents which describe tables that are not mentioned in the ACPI spec (or where the external document may provide further info), e.g. SRAT, SLIT, HPET, MCFG, etc. - Use the ASLC #define instead of hardcoding "CORE" in one instance (ASLC is already used everywhere else). - Add some TODOs for additional stuff which is in the spec but not yet handled by our code / #defines. Abuild-tested. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/src/arch/i386/boot/acpi.c Modified: trunk/src/arch/i386/boot/acpi.c ============================================================================== --- trunk/src/arch/i386/boot/acpi.c Fri Nov 19 11:16:43 2010 (r6097) +++ trunk/src/arch/i386/boot/acpi.c Fri Nov 19 16:14:42 2010 (r6098) @@ -34,7 +34,7 @@ u8 acpi_checksum(u8 *table, u32 length) { - u8 ret=0; + u8 ret = 0; while (length--) { ret += *table; table++; @@ -43,88 +43,89 @@ } /** - * Add an ACPI table to the RSDT (and XSDT) structure, recalculate length and checksum + * Add an ACPI table to the RSDT (and XSDT) structure, recalculate length + * and checksum. */ - void acpi_add_table(acpi_rsdp_t *rsdp, void *table) { int i, entries_num; acpi_rsdt_t *rsdt; acpi_xsdt_t *xsdt = NULL; - /* The RSDT is mandatory ... */ + /* The RSDT is mandatory... */ rsdt = (acpi_rsdt_t *)rsdp->rsdt_address; - /* ... while the XSDT is not */ - if (rsdp->xsdt_address) { + /* ...while the XSDT is not. */ + if (rsdp->xsdt_address) xsdt = (acpi_xsdt_t *)((u32)rsdp->xsdt_address); - } - /* This should always be MAX_ACPI_TABLES */ + /* This should always be MAX_ACPI_TABLES. */ entries_num = ARRAY_SIZE(rsdt->entry); for (i = 0; i < entries_num; i++) { - if(rsdt->entry[i] == 0) + if (rsdt->entry[i] == 0) break; } if (i >= entries_num) { - printk(BIOS_ERR, "ACPI: Error: Could not add ACPI table, too many tables.\n"); + printk(BIOS_ERR, "ACPI: Error: Could not add ACPI table, " + "too many tables.\n"); return; } - /* Add table to the RSDT */ + /* Add table to the RSDT. */ rsdt->entry[i] = (u32)table; - /* Fix RSDT length or the kernel will assume invalid entries */ - rsdt->header.length = sizeof(acpi_header_t) + (sizeof(u32) * (i+1)); + /* Fix RSDT length or the kernel will assume invalid entries. */ + rsdt->header.length = sizeof(acpi_header_t) + (sizeof(u32) * (i + 1)); - /* Re-calculate checksum */ + /* Re-calculate checksum. */ rsdt->header.checksum = 0; /* Hope this won't get optimized away */ - rsdt->header.checksum = acpi_checksum((u8 *)rsdt, - rsdt->header.length); + rsdt->header.checksum = acpi_checksum((u8 *)rsdt, rsdt->header.length); - /* And now the same thing for the XSDT. We use the same index as for + /* + * And now the same thing for the XSDT. We use the same index as for * now we want the XSDT and RSDT to always be in sync in coreboot. */ if (xsdt) { - /* Add table to the XSDT */ - xsdt->entry[i]=(u64)(u32)table; + /* Add table to the XSDT. */ + xsdt->entry[i] = (u64)(u32)table; - /* Fix XSDT length */ + /* Fix XSDT length. */ xsdt->header.length = sizeof(acpi_header_t) + - (sizeof(u64) * (i+1)); + (sizeof(u64) * (i + 1)); - /* Re-calculate checksum */ - xsdt->header.checksum=0; - xsdt->header.checksum=acpi_checksum((u8 *)xsdt, - xsdt->header.length); + /* Re-calculate checksum. */ + xsdt->header.checksum = 0; + xsdt->header.checksum = acpi_checksum((u8 *)xsdt, + xsdt->header.length); } - printk(BIOS_DEBUG, "ACPI: added table %d/%d Length now %d\n", - i+1, entries_num, rsdt->header.length); + printk(BIOS_DEBUG, "ACPI: added table %d/%d, length now %d\n", + i + 1, entries_num, rsdt->header.length); } -int acpi_create_mcfg_mmconfig(acpi_mcfg_mmconfig_t *mmconfig, u32 base, u16 seg_nr, u8 start, u8 end) +int acpi_create_mcfg_mmconfig(acpi_mcfg_mmconfig_t *mmconfig, u32 base, + u16 seg_nr, u8 start, u8 end) { mmconfig->base_address = base; mmconfig->base_reserved = 0; mmconfig->pci_segment_group_number = seg_nr; mmconfig->start_bus_number = start; mmconfig->end_bus_number = end; - return (sizeof(acpi_mcfg_mmconfig_t)); + + return sizeof(acpi_mcfg_mmconfig_t); } int acpi_create_madt_lapic(acpi_madt_lapic_t *lapic, u8 cpu, u8 apic) { - lapic->type=0; - lapic->length=sizeof(acpi_madt_lapic_t); - lapic->flags=1; - - lapic->processor_id=cpu; - lapic->apic_id=apic; + lapic->type = 0; /* Local APIC structure */ + lapic->length = sizeof(acpi_madt_lapic_t); + lapic->flags = (1 << 0); /* Processor/LAPIC enabled */ + lapic->processor_id = cpu; + lapic->apic_id = apic; - return(lapic->length); + return lapic->length; } unsigned long acpi_create_madt_lapics(unsigned long current) @@ -132,97 +133,97 @@ device_t cpu; int cpu_index = 0; - for(cpu = all_devices; cpu; cpu = cpu->next) { + for (cpu = all_devices; cpu; cpu = cpu->next) { if ((cpu->path.type != DEVICE_PATH_APIC) || (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER)) { continue; } - if (!cpu->enabled) { + if (!cpu->enabled) continue; - } - current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, cpu_index, cpu->path.apic.apic_id); + current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, + cpu_index, cpu->path.apic.apic_id); cpu_index++; } + return current; } -int acpi_create_madt_ioapic(acpi_madt_ioapic_t *ioapic, u8 id, u32 addr,u32 gsi_base) +int acpi_create_madt_ioapic(acpi_madt_ioapic_t *ioapic, u8 id, u32 addr, + u32 gsi_base) { - ioapic->type=1; - ioapic->length=sizeof(acpi_madt_ioapic_t); - ioapic->reserved=0x00; - ioapic->gsi_base=gsi_base; - - ioapic->ioapic_id=id; - ioapic->ioapic_addr=addr; + ioapic->type = 1; /* I/O APIC structure */ + ioapic->length = sizeof(acpi_madt_ioapic_t); + ioapic->reserved = 0x00; + ioapic->gsi_base = gsi_base; + ioapic->ioapic_id = id; + ioapic->ioapic_addr = addr; - return(ioapic->length); + return ioapic->length; } int acpi_create_madt_irqoverride(acpi_madt_irqoverride_t *irqoverride, u8 bus, u8 source, u32 gsirq, u16 flags) { - irqoverride->type=2; - irqoverride->length=sizeof(acpi_madt_irqoverride_t); - irqoverride->bus=bus; - irqoverride->source=source; - irqoverride->gsirq=gsirq; - irqoverride->flags=flags; + irqoverride->type = 2; /* Interrupt source override */ + irqoverride->length = sizeof(acpi_madt_irqoverride_t); + irqoverride->bus = bus; + irqoverride->source = source; + irqoverride->gsirq = gsirq; + irqoverride->flags = flags; - return(irqoverride->length); + return irqoverride->length; } int acpi_create_madt_lapic_nmi(acpi_madt_lapic_nmi_t *lapic_nmi, u8 cpu, - u16 flags, u8 lint) + u16 flags, u8 lint) { - lapic_nmi->type=4; - lapic_nmi->length=sizeof(acpi_madt_lapic_nmi_t); + lapic_nmi->type = 4; /* Local APIC NMI structure */ + lapic_nmi->length = sizeof(acpi_madt_lapic_nmi_t); + lapic_nmi->flags = flags; + lapic_nmi->processor_id = cpu; + lapic_nmi->lint = lint; - lapic_nmi->flags=flags; - lapic_nmi->processor_id=cpu; - lapic_nmi->lint=lint; - - return(lapic_nmi->length); + return lapic_nmi->length; } void acpi_create_madt(acpi_madt_t *madt) { #define LOCAL_APIC_ADDR 0xfee00000ULL - acpi_header_t *header=&(madt->header); - unsigned long current=(unsigned long)madt+sizeof(acpi_madt_t); + acpi_header_t *header = &(madt->header); + unsigned long current = (unsigned long)madt + sizeof(acpi_madt_t); memset((void *)madt, 0, sizeof(acpi_madt_t)); - /* fill out header fields */ + /* Fill out header fields. */ memcpy(header->signature, "APIC", 4); memcpy(header->oem_id, OEM_ID, 6); memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); memcpy(header->asl_compiler_id, ASLC, 4); header->length = sizeof(acpi_madt_t); - header->revision = 1; + header->revision = 1; /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */ - madt->lapic_addr= LOCAL_APIC_ADDR; - madt->flags = 0x1; /* PCAT_COMPAT */ + madt->lapic_addr = LOCAL_APIC_ADDR; + madt->flags = 0x1; /* PCAT_COMPAT */ current = acpi_fill_madt(current); - /* recalculate length */ - header->length= current - (unsigned long)madt; + /* (Re)calculate length and checksum. */ + header->length = current - (unsigned long)madt; - header->checksum = acpi_checksum((void *)madt, header->length); + header->checksum = acpi_checksum((void *)madt, header->length); } +/* MCFG is defined in the PCI Firmware Specification 3.0. */ void acpi_create_mcfg(acpi_mcfg_t *mcfg) { - - acpi_header_t *header=&(mcfg->header); - unsigned long current=(unsigned long)mcfg+sizeof(acpi_mcfg_t); + acpi_header_t *header = &(mcfg->header); + unsigned long current = (unsigned long)mcfg + sizeof(acpi_mcfg_t); memset((void *)mcfg, 0, sizeof(acpi_mcfg_t)); - /* fill out header fields */ + /* Fill out header fields. */ memcpy(header->signature, "MCFG", 4); memcpy(header->oem_id, OEM_ID, 6); memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); @@ -233,37 +234,40 @@ current = acpi_fill_mcfg(current); - /* recalculate length */ - header->length= current - (unsigned long)mcfg; - - header->checksum = acpi_checksum((void *)mcfg, header->length); + /* (Re)calculate length and checksum. */ + header->length = current - (unsigned long)mcfg; + header->checksum = acpi_checksum((void *)mcfg, header->length); } -/* this can be overriden by platform ACPI setup code, - * if it calls acpi_create_ssdt_generator +/* + * This can be overriden by platform ACPI setup code, if it calls + * acpi_create_ssdt_generator(). */ -unsigned long __attribute__((weak)) acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) { +unsigned long __attribute__((weak)) acpi_fill_ssdt_generator( + unsigned long current, const char *oem_table_id) +{ return current; } void acpi_create_ssdt_generator(acpi_header_t *ssdt, const char *oem_table_id) { - unsigned long current=(unsigned long)ssdt+sizeof(acpi_header_t); + unsigned long current = (unsigned long)ssdt + sizeof(acpi_header_t); + memset((void *)ssdt, 0, sizeof(acpi_header_t)); + memcpy(&ssdt->signature, "SSDT", 4); - ssdt->revision = 2; + ssdt->revision = 2; /* ACPI 1.0/2.0: ?, ACPI 3.0/4.0: 2 */ memcpy(&ssdt->oem_id, OEM_ID, 6); memcpy(&ssdt->oem_table_id, oem_table_id, 8); ssdt->oem_revision = 42; - memcpy(&ssdt->asl_compiler_id, "CORE", 4); + memcpy(&ssdt->asl_compiler_id, ASLC, 4); ssdt->asl_compiler_revision = 42; ssdt->length = sizeof(acpi_header_t); acpigen_set_current((char *) current); current = acpi_fill_ssdt_generator(current, oem_table_id); - /* recalculate length */ + /* (Re)calculate length and checksum. */ ssdt->length = current - (unsigned long)ssdt; ssdt->checksum = acpi_checksum((void *)ssdt, ssdt->length); } @@ -271,120 +275,117 @@ int acpi_create_srat_lapic(acpi_srat_lapic_t *lapic, u8 node, u8 apic) { memset((void *)lapic, 0, sizeof(acpi_srat_lapic_t)); - lapic->type=0; - lapic->length=sizeof(acpi_srat_lapic_t); - lapic->flags=1; - - lapic->proximity_domain_7_0 = node; - lapic->apic_id=apic; - - return(lapic->length); -} - -int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek,u32 sizek, u32 flags) -{ - mem->type=1; - mem->length=sizeof(acpi_srat_mem_t); - - mem->base_address_low = (basek<<10); - mem->base_address_high = (basek>>(32-10)); - - mem->length_low = (sizek<<10); - mem->length_high = (sizek>>(32-10)); - - mem->proximity_domain = node; + lapic->type = 0; /* Processor local APIC/SAPIC affinity structure */ + lapic->length = sizeof(acpi_srat_lapic_t); + lapic->flags = (1 << 0); /* Enabled (the use of this structure). */ + lapic->proximity_domain_7_0 = node; + /* TODO: proximity_domain_31_8, local SAPIC EID, clock domain. */ + lapic->apic_id = apic; + + return lapic->length; +} + +int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek, u32 sizek, + u32 flags) +{ + mem->type = 1; /* Memory affinity structure */ + mem->length = sizeof(acpi_srat_mem_t); + mem->base_address_low = (basek << 10); + mem->base_address_high = (basek >> (32 - 10)); + mem->length_low = (sizek << 10); + mem->length_high = (sizek >> (32 - 10)); + mem->proximity_domain = node; mem->flags = flags; - return(mem->length); + return mem->length; } +/* http://www.microsoft.com/whdc/system/sysinternals/sratdwn.mspx */ void acpi_create_srat(acpi_srat_t *srat) { + acpi_header_t *header = &(srat->header); + unsigned long current = (unsigned long)srat + sizeof(acpi_srat_t); - acpi_header_t *header=&(srat->header); - unsigned long current=(unsigned long)srat+sizeof(acpi_srat_t); + memset((void *)srat, 0, sizeof(acpi_srat_t)); - memset((void *)srat, 0, sizeof(acpi_srat_t)); - - /* fill out header fields */ - memcpy(header->signature, "SRAT", 4); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - - header->length = sizeof(acpi_srat_t); - header->revision = 1; + /* Fill out header fields. */ + memcpy(header->signature, "SRAT", 4); + memcpy(header->oem_id, OEM_ID, 6); + memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); + memcpy(header->asl_compiler_id, ASLC, 4); - srat->resv = 0x1; /* BACK COMP */ + header->length = sizeof(acpi_srat_t); + header->revision = 1; /* ACPI 1.0: N/A, 2.0: 1, 3.0: 2, 4.0: 3 */ - current = acpi_fill_srat(current); + srat->resv = 1; /* Spec: Reserved to 1 for backwards compatibility. */ - /* recalculate length */ - header->length= current - (unsigned long)srat; + current = acpi_fill_srat(current); - header->checksum = acpi_checksum((void *)srat, header->length); + /* (Re)calculate length and checksum. */ + header->length = current - (unsigned long)srat; + header->checksum = acpi_checksum((void *)srat, header->length); } +/* http://h21007.www2.hp.com/portal/download/files/unprot/Itanium/slit.pdf */ void acpi_create_slit(acpi_slit_t *slit) { + acpi_header_t *header = &(slit->header); + unsigned long current = (unsigned long)slit + sizeof(acpi_slit_t); - acpi_header_t *header=&(slit->header); - unsigned long current=(unsigned long)slit+sizeof(acpi_slit_t); - - memset((void *)slit, 0, sizeof(acpi_slit_t)); - - /* fill out header fields */ - memcpy(header->signature, "SLIT", 4); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); + memset((void *)slit, 0, sizeof(acpi_slit_t)); - header->length = sizeof(acpi_slit_t); - header->revision = 1; + /* Fill out header fields. */ + memcpy(header->signature, "SLIT", 4); + memcpy(header->oem_id, OEM_ID, 6); + memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); + memcpy(header->asl_compiler_id, ASLC, 4); - current = acpi_fill_slit(current); + header->length = sizeof(acpi_slit_t); + header->revision = 1; /* ACPI 1.0: N/A, ACPI 2.0/3.0/4.0: 1 */ - /* recalculate length */ - header->length= current - (unsigned long)slit; + current = acpi_fill_slit(current); - header->checksum = acpi_checksum((void *)slit, header->length); + /* (Re)calculate length and checksum. */ + header->length = current - (unsigned long)slit; + header->checksum = acpi_checksum((void *)slit, header->length); } +/* http://www.intel.com/hardwaredesign/hpetspec_1.pdf */ void acpi_create_hpet(acpi_hpet_t *hpet) { -#define HPET_ADDR 0xfed00000ULL - acpi_header_t *header=&(hpet->header); - acpi_addr_t *addr=&(hpet->addr); +#define HPET_ADDR 0xfed00000ULL + acpi_header_t *header = &(hpet->header); + acpi_addr_t *addr = &(hpet->addr); memset((void *)hpet, 0, sizeof(acpi_hpet_t)); - /* fill out header fields */ + /* Fill out header fields. */ memcpy(header->signature, "HPET", 4); memcpy(header->oem_id, OEM_ID, 6); memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); memcpy(header->asl_compiler_id, ASLC, 4); header->length = sizeof(acpi_hpet_t); - header->revision = 1; + header->revision = 1; /* Currently 1. Table added in ACPI 2.0. */ - /* fill out HPET address */ - addr->space_id = 0; /* Memory */ - addr->bit_width = 64; - addr->bit_offset = 0; - addr->addrl = HPET_ADDR & 0xffffffff; - addr->addrh = HPET_ADDR >> 32; - - hpet->id = 0x102282a0; /* AMD ? */ - hpet->number = 0; - hpet->min_tick = 4096; + /* Fill out HPET address. */ + addr->space_id = 0; /* Memory */ + addr->bit_width = 64; + addr->bit_offset = 0; + addr->addrl = HPET_ADDR & 0xffffffff; + addr->addrh = HPET_ADDR >> 32; + + hpet->id = 0x102282a0; /* AMD! FIXME */ + hpet->number = 0; + hpet->min_tick = 4096; - header->checksum = acpi_checksum((void *)hpet, sizeof(acpi_hpet_t)); + header->checksum = acpi_checksum((void *)hpet, sizeof(acpi_hpet_t)); } + void acpi_create_facs(acpi_facs_t *facs) { - - memset( (void *)facs,0, sizeof(acpi_facs_t)); + memset((void *)facs, 0, sizeof(acpi_facs_t)); memcpy(facs->signature, "FACS", 4); facs->length = sizeof(acpi_facs_t); @@ -394,72 +395,74 @@ facs->flags = 0; facs->x_firmware_waking_vector_l = 0; facs->x_firmware_waking_vector_h = 0; - facs->version = 1; + facs->version = 1; /* ACPI 1.0: 0, ACPI 2.0/3.0: 1, ACPI 4.0: 2 */ } void acpi_write_rsdt(acpi_rsdt_t *rsdt) { - acpi_header_t *header=&(rsdt->header); + acpi_header_t *header = &(rsdt->header); - /* fill out header fields */ + /* Fill out header fields. */ memcpy(header->signature, "RSDT", 4); memcpy(header->oem_id, OEM_ID, 6); memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); memcpy(header->asl_compiler_id, ASLC, 4); header->length = sizeof(acpi_rsdt_t); - header->revision = 1; - - /* fill out entries */ - - // entries are filled in later, we come with an empty set. + header->revision = 1; /* ACPI 1.0/2.0/3.0/4.0: 1 */ - /* fix checksum */ + /* Entries are filled in later, we come with an empty set. */ + /* Fix checksum. */ header->checksum = acpi_checksum((void *)rsdt, sizeof(acpi_rsdt_t)); } void acpi_write_xsdt(acpi_xsdt_t *xsdt) { - acpi_header_t *header=&(xsdt->header); + acpi_header_t *header = &(xsdt->header); - /* fill out header fields */ + /* Fill out header fields. */ memcpy(header->signature, "XSDT", 4); memcpy(header->oem_id, OEM_ID, 6); memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); memcpy(header->asl_compiler_id, ASLC, 4); header->length = sizeof(acpi_xsdt_t); - header->revision = 1; - - /* fill out entries */ - - // entries are filled in later, we come with an empty set. + header->revision = 1; /* ACPI 1.0: N/A, 2.0/3.0/4.0: 1 */ - /* fix checksum */ + /* Entries are filled in later, we come with an empty set. */ + /* Fix checksum. */ header->checksum = acpi_checksum((void *)xsdt, sizeof(acpi_xsdt_t)); } void acpi_write_rsdp(acpi_rsdp_t *rsdp, acpi_rsdt_t *rsdt, acpi_xsdt_t *xsdt) { memset(rsdp, 0, sizeof(acpi_rsdp_t)); + memcpy(rsdp->signature, RSDP_SIG, 8); memcpy(rsdp->oem_id, OEM_ID, 6); - rsdp->length = sizeof(acpi_rsdp_t); - rsdp->rsdt_address = (u32)rsdt; - /* Some OSes expect an XSDT to be present for RSD PTR - * revisions >= 2. If we don't have an ACPI XSDT, force - * ACPI 1.0 (and thus RSD PTR revision 0) + + rsdp->length = sizeof(acpi_rsdp_t); + rsdp->rsdt_address = (u32)rsdt; + + /* + * Revision: ACPI 1.0: 0, ACPI 2.0/3.0/4.0: 2. + * + * Some OSes expect an XSDT to be present for RSD PTR revisions >= 2. + * If we don't have an ACPI XSDT, force ACPI 1.0 (and thus RSD PTR + * revision 0). */ if (xsdt == NULL) { - rsdp->revision = 0; + rsdp->revision = 0; } else { - rsdp->xsdt_address = (u64)(u32)xsdt; - rsdp->revision = 2; + rsdp->xsdt_address = (u64)(u32)xsdt; + rsdp->revision = 2; } - rsdp->checksum = acpi_checksum((void *)rsdp, 20); - rsdp->ext_checksum = acpi_checksum((void *)rsdp, sizeof(acpi_rsdp_t)); + + /* Calculate checksums. */ + rsdp->checksum = acpi_checksum((void *)rsdp, 20); + rsdp->ext_checksum = acpi_checksum((void *)rsdp, sizeof(acpi_rsdp_t)); } #if CONFIG_HAVE_ACPI_RESUME == 1 @@ -478,13 +481,13 @@ #error "And coreboot memory reserved in mainboard.c" #endif #endif - /* if we happen to be resuming find wakeup vector and jump to OS */ + /* If we happen to be resuming find wakeup vector and jump to OS. */ wake_vec = acpi_find_wakeup_vector(); if (wake_vec) acpi_jump_to_wakeup(wake_vec); } -/* this is to be filled by SB code - startup value what was found */ +/* This is to be filled by SB code - startup value what was found. */ u8 acpi_slp_type = 0; static int acpi_is_wakeup(void) @@ -506,7 +509,6 @@ if ((rsdp->revision > 1) && (acpi_checksum((void *)rsdp, rsdp->length) != 0)) return NULL; - printk(BIOS_DEBUG, "Checksum 2 passed all OK\n"); return rsdp; @@ -522,11 +524,10 @@ void *acpi_find_wakeup_vector(void) { char *p, *end; - acpi_rsdt_t *rsdt; acpi_facs_t *facs; acpi_fadt_t *fadt; - void *wake_vec; + void *wake_vec; int i; rsdp = NULL; @@ -534,11 +535,11 @@ if (!acpi_is_wakeup()) return NULL; - printk(BIOS_DEBUG, "Trying to find the wakeup vector ...\n"); + printk(BIOS_DEBUG, "Trying to find the wakeup vector...\n"); - /* find RSDP */ - for (p = (char *) 0xe0000; p < (char *) 0xfffff; p+=16) { - if ((rsdp = valid_rsdp((acpi_rsdp_t *) p))) + /* Find RSDP. */ + for (p = (char *)0xe0000; p < (char *)0xfffff; p += 16) { + if ((rsdp = valid_rsdp((acpi_rsdp_t *)p))) break; } @@ -548,11 +549,11 @@ printk(BIOS_DEBUG, "RSDP found at %p\n", rsdp); rsdt = (acpi_rsdt_t *) rsdp->rsdt_address; - end = (char *) rsdt + rsdt->header.length; + end = (char *)rsdt + rsdt->header.length; printk(BIOS_DEBUG, "RSDT found at %p ends at %p\n", rsdt, end); - for (i = 0; ((char *) &rsdt->entry[i]) < end; i++) { - fadt = (acpi_fadt_t *) rsdt->entry[i]; + for (i = 0; ((char *)&rsdt->entry[i]) < end; i++) { + fadt = (acpi_fadt_t *)rsdt->entry[i]; if (strncmp((char *)fadt, "FACP", 4) == 0) break; fadt = NULL; @@ -565,13 +566,15 @@ facs = (acpi_facs_t *)fadt->firmware_ctrl; if (facs == NULL) { - printk(BIOS_DEBUG, "No FACS found, wake up from S3 not possible.\n"); + printk(BIOS_DEBUG, "No FACS found, wake up from S3 not " + "possible.\n"); return NULL; } printk(BIOS_DEBUG, "FACS found at %p\n", facs); - wake_vec = (void *) facs->firmware_waking_vector; + wake_vec = (void *)facs->firmware_waking_vector; printk(BIOS_DEBUG, "OS waking vector is %p\n", wake_vec); + return wake_vec; } @@ -579,29 +582,34 @@ extern char *lowmem_backup_ptr; extern int lowmem_backup_size; -#define WAKEUP_BASE 0x600 +#define WAKEUP_BASE 0x600 -void (*acpi_do_wakeup)(u32 vector, u32 backup_source, u32 backup_target, u32 - backup_size) __attribute__((regparm(0))) = (void *)WAKEUP_BASE; +void (*acpi_do_wakeup)(u32 vector, u32 backup_source, u32 backup_target, + u32 backup_size) __attribute__((regparm(0))) = (void *)WAKEUP_BASE; extern unsigned char __wakeup, __wakeup_size; void acpi_jump_to_wakeup(void *vector) { - u32 acpi_backup_memory = (u32) cbmem_find(CBMEM_ID_RESUME); + u32 acpi_backup_memory = (u32)cbmem_find(CBMEM_ID_RESUME); if (!acpi_backup_memory) { - printk(BIOS_WARNING, "ACPI: Backup memory missing. No S3 Resume.\n"); + printk(BIOS_WARNING, "ACPI: Backup memory missing. " + "No S3 resume.\n"); return; } - // FIXME this should go into the ACPI backup memory, too. No pork saussages. - /* just restore the SMP trampoline and continue with wakeup on assembly level */ + // FIXME: This should go into the ACPI backup memory, too. No pork saussages. + /* + * Just restore the SMP trampoline and continue with wakeup on + * assembly level. + */ memcpy(lowmem_backup_ptr, lowmem_backup, lowmem_backup_size); - /* copy wakeup trampoline in place */ + /* Copy wakeup trampoline in place. */ memcpy((void *)WAKEUP_BASE, &__wakeup, (size_t)&__wakeup_size); - acpi_do_wakeup((u32)vector, acpi_backup_memory, CONFIG_RAMBASE, HIGH_MEMORY_SAVE); + acpi_do_wakeup((u32)vector, acpi_backup_memory, CONFIG_RAMBASE, + HIGH_MEMORY_SAVE); } #endif

1 0

[commit] r6097 - in trunk: . util/lint
by repository service 19 Nov '10

19 Nov '10

Author: oxygene Date: Fri Nov 19 11:16:43 2010 New Revision: 6097 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6097 Log: Add test to check for up-to-date GPL license headers to lint. "make lint" should not stop after first failed test. Improve "make lint" output. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Added: trunk/util/lint/lint-000-license-headers (contents, props changed) Modified: trunk/Makefile trunk/util/lint/lint-001-no-global-config-in-romstage Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Fri Nov 19 01:29:32 2010 (r6096) +++ trunk/Makefile Fri Nov 19 11:16:43 2010 (r6097) @@ -367,9 +367,9 @@ dongle.py -c /dev/term/1 $(obj)/coreboot.rom EOF lint: - LINTLOG=`mktemp`; \ + FAILED=0; LINTLOG=`mktemp`; \ for script in util/lint/lint-*; do \ - echo `basename $$script`; \ + echo; echo `basename $$script`; \ grep "^# DESCR:" $$script | sed "s,.*DESCR: *,," ; \ echo ========; \ $$script > $$LINTLOG; \ @@ -379,9 +379,11 @@ echo test failed: ; \ cat $$LINTLOG; \ rm -f $$LINTLOG; \ - exit 1; \ - fi \ + FAILED=$$(( $$FAILED + 1 )); \ + fi; \ + echo ========; \ done; \ + test $$FAILED -eq 0 || { echo "ERROR: $$FAILED test(s) failed." && exit 1; }; \ rm -f $$LINTLOG # This include must come _before_ the pattern rules below! Added: trunk/util/lint/lint-000-license-headers ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/util/lint/lint-000-license-headers Fri Nov 19 11:16:43 2010 (r6097) @@ -0,0 +1,34 @@ +#!/bin/sh +# This file is part of the coreboot project. +# +# Copyright (C) 2010 coresystems GmbH +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# +# DESCR: Check that all files in src/ and util/ have valid license headers + +LC_ALL=C export LC_ALL +find src util -name .svn -type d -prune -o \ + -name README -prune -o \ + -name LICENSE -prune -o \ + -name TODO -prune -o \ + -name COPYING -prune -o \ + -name microcode-\*.h -prune -o \ + -name \*.[18] -prune -o \ + -name romcc -type d -prune -o \ + -name crossgcc -type d -prune -o \ + -type f -exec \ + grep -L "51 Franklin St, Fifth Floor, Boston" {} + | \ + sed -e "s,^.*$,File & has no valid GPL header.," Modified: trunk/util/lint/lint-001-no-global-config-in-romstage ============================================================================== --- trunk/util/lint/lint-001-no-global-config-in-romstage Fri Nov 19 01:29:32 2010 (r6096) +++ trunk/util/lint/lint-001-no-global-config-in-romstage Fri Nov 19 11:16:43 2010 (r6097) @@ -1,5 +1,23 @@ #!/bin/sh -# DESCR: Check that no symbols #defined in any romstage.c is used elsewhere +# This file is part of the coreboot project. +# +# Copyright (C) 2010 coresystems GmbH +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# DESCR: Check that no symbol #defined in any romstage.c is used elsewhere + DEFINES=`grep "#define" src/mainboard/*/*/romstage.c |sed 's,.*#define[\t ]$[^\t ]*$[\t ].*,\1,' | grep -v "(" | sort -u` SCANBUCKET=`mktemp` LC_ALL=C export LC_ALL

1 0

[commit] r6095 - in trunk/src: mainboard/amd/mahogany_fam10 mainboard/amd/norwich mainboard/amd/tilapia_fam10 mainboard/asus/m4a785-m mainboard/iei/kino-780am2-fam10 mainboard/intel/xe7501devkit ma...
by repository service 18 Nov '10

18 Nov '10

Author: uwe Date: Thu Nov 18 21:12:13 2010 New Revision: 6095 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6095 Log: Fix/drop some obsolete comments, - s/Options.lb/devicetree.cb/ - s/Config.lb/devicetree.cb/ - s/cache_as_ram_auto.c/romstage.c/ - h8dmr_fam10/README: Drop obsolete comment, we have mc_patch_01000086.h in the tree now. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/src/mainboard/amd/mahogany_fam10/spd_addr.h trunk/src/mainboard/amd/norwich/romstage.c trunk/src/mainboard/amd/tilapia_fam10/spd_addr.h trunk/src/mainboard/asus/m4a785-m/spd_addr.h trunk/src/mainboard/iei/kino-780am2-fam10/spd_addr.h trunk/src/mainboard/intel/xe7501devkit/acpi_tables.c trunk/src/mainboard/intel/xe7501devkit/mptable.c trunk/src/mainboard/supermicro/h8dmr_fam10/README trunk/src/mainboard/traverse/geos/romstage.c trunk/src/mainboard/via/epia-m700/acpi_tables.c trunk/src/mainboard/via/epia-n/acpi_tables.c trunk/src/northbridge/amd/amdk8/northbridge.c trunk/src/northbridge/amd/lx/grphinit.c trunk/src/northbridge/intel/i945/early_init.c trunk/src/southbridge/intel/i82801ax/i82801ax_lpc.c trunk/src/southbridge/intel/i82801bx/i82801bx_lpc.c trunk/src/southbridge/intel/i82801gx/i82801gx_ide.c trunk/src/southbridge/intel/i82801gx/i82801gx_sata.c trunk/src/southbridge/intel/i82870/p64h2_ioapic.c Modified: trunk/src/mainboard/amd/mahogany_fam10/spd_addr.h ============================================================================== --- trunk/src/mainboard/amd/mahogany_fam10/spd_addr.h Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/mainboard/amd/mahogany_fam10/spd_addr.h Thu Nov 18 21:12:13 2010 (r6095) @@ -19,7 +19,7 @@ /** * This file defines the SPD addresses for the mainboard. Must be included in - * cache_as_ram_auto.c + * romstage.c */ #define RC00 0 Modified: trunk/src/mainboard/amd/norwich/romstage.c ============================================================================== --- trunk/src/mainboard/amd/norwich/romstage.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/mainboard/amd/norwich/romstage.c Thu Nov 18 21:12:13 2010 (r6095) @@ -77,7 +77,7 @@ /* cs5536_disable_internal_uart: disable them for now, set them * up later... */ - /* If debug. real setup done in chipset init via Config.lb. */ + /* If debug. real setup done in chipset init via devicetree.cb. */ cs5536_setup_onchipuart(1); mb_gpio_init(); uart_init(); Modified: trunk/src/mainboard/amd/tilapia_fam10/spd_addr.h ============================================================================== --- trunk/src/mainboard/amd/tilapia_fam10/spd_addr.h Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/mainboard/amd/tilapia_fam10/spd_addr.h Thu Nov 18 21:12:13 2010 (r6095) @@ -19,7 +19,7 @@ /** * This file defines the SPD addresses for the mainboard. Must be included in - * cache_as_ram_auto.c + * romstage.c */ #define RC00 0 Modified: trunk/src/mainboard/asus/m4a785-m/spd_addr.h ============================================================================== --- trunk/src/mainboard/asus/m4a785-m/spd_addr.h Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/mainboard/asus/m4a785-m/spd_addr.h Thu Nov 18 21:12:13 2010 (r6095) @@ -19,7 +19,7 @@ /** * This file defines the SPD addresses for the mainboard. Must be included in - * cache_as_ram_auto.c + * romstage.c */ #define RC00 0 Modified: trunk/src/mainboard/iei/kino-780am2-fam10/spd_addr.h ============================================================================== --- trunk/src/mainboard/iei/kino-780am2-fam10/spd_addr.h Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/mainboard/iei/kino-780am2-fam10/spd_addr.h Thu Nov 18 21:12:13 2010 (r6095) @@ -19,7 +19,7 @@ /** * This file defines the SPD addresses for the mainboard. Must be included in - * cache_as_ram_auto.c + * romstage.c */ #define RC00 0 Modified: trunk/src/mainboard/intel/xe7501devkit/acpi_tables.c ============================================================================== --- trunk/src/mainboard/intel/xe7501devkit/acpi_tables.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/mainboard/intel/xe7501devkit/acpi_tables.c Thu Nov 18 21:12:13 2010 (r6095) @@ -55,7 +55,7 @@ // P64H2#2 Bus A IOAPIC dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0)); if (!dev) - BUG(); // Config.lb error? + BUG(); res = find_resource(dev, PCI_BASE_ADDRESS_0); current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_P64H2_2_BUS_A, res->base, irq_start); irq_start += INTEL_IOAPIC_NUM_INTERRUPTS; @@ -63,7 +63,7 @@ // P64H2#2 Bus B IOAPIC dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0)); if (!dev) - BUG(); // Config.lb error? + BUG(); res = find_resource(dev, PCI_BASE_ADDRESS_0); current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_P64H2_2_BUS_B, res->base, irq_start); irq_start += INTEL_IOAPIC_NUM_INTERRUPTS; @@ -72,7 +72,7 @@ // P64H2#1 Bus A IOAPIC dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0)); if (!dev) - BUG(); // Config.lb error? + BUG(); res = find_resource(dev, PCI_BASE_ADDRESS_0); current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_P64H2_1_BUS_A, res->base, irq_start); irq_start += INTEL_IOAPIC_NUM_INTERRUPTS; @@ -80,7 +80,7 @@ // P64H2#1 Bus B IOAPIC dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0)); if (!dev) - BUG(); // Config.lb error? + BUG(); res = find_resource(dev, PCI_BASE_ADDRESS_0); current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_P64H2_1_BUS_B, res->base, irq_start); irq_start += INTEL_IOAPIC_NUM_INTERRUPTS; Modified: trunk/src/mainboard/intel/xe7501devkit/mptable.c ============================================================================== --- trunk/src/mainboard/intel/xe7501devkit/mptable.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/mainboard/intel/xe7501devkit/mptable.c Thu Nov 18 21:12:13 2010 (r6095) @@ -42,14 +42,14 @@ // P64H2#2 Bus A IOAPIC dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0)); if (!dev) - BUG(); // Config.lb error? + BUG(); res = find_resource(dev, PCI_BASE_ADDRESS_0); smp_write_ioapic(mc, IOAPIC_P64H2_2_BUS_A, P64H2_IOAPIC_VERSION, res->base); // P64H2#2 Bus B IOAPIC dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0)); if (!dev) - BUG(); // Config.lb error? + BUG(); res = find_resource(dev, PCI_BASE_ADDRESS_0); smp_write_ioapic(mc, IOAPIC_P64H2_2_BUS_B, P64H2_IOAPIC_VERSION, res->base); @@ -57,14 +57,14 @@ // P64H2#1 Bus A IOAPIC dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0)); if (!dev) - BUG(); // Config.lb error? + BUG(); res = find_resource(dev, PCI_BASE_ADDRESS_0); smp_write_ioapic(mc, IOAPIC_P64H2_1_BUS_A, P64H2_IOAPIC_VERSION, res->base); // P64H2#1 Bus B IOAPIC dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0)); if (!dev) - BUG(); // Config.lb error? + BUG(); res = find_resource(dev, PCI_BASE_ADDRESS_0); smp_write_ioapic(mc, IOAPIC_P64H2_1_BUS_B, P64H2_IOAPIC_VERSION, res->base); } Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/README ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr_fam10/README Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/mainboard/supermicro/h8dmr_fam10/README Thu Nov 18 21:12:13 2010 (r6095) @@ -2,10 +2,6 @@ There are a number of outstanding issues: -* we don't have the mc_patch_01000086.h CPU ucode file yet which is -referenced in a comment in src/mainboard/supermicro/h8dmr_fam10/Options.lb. -AMD has not released it yet. This is not a problem specific to this port. - * I'm seeing toolchain issues. I can't get this tree to compile correctly with gcc 4.3 (32 bit) - there is an optimization issue where certain parts of the CBFS code execute very slowly. With gcc 3.4 (32 bit) that slowness Modified: trunk/src/mainboard/traverse/geos/romstage.c ============================================================================== --- trunk/src/mainboard/traverse/geos/romstage.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/mainboard/traverse/geos/romstage.c Thu Nov 18 21:12:13 2010 (r6095) @@ -78,7 +78,7 @@ /* cs5536_disable_internal_uart: disable them for now, set them * up later... */ - /* If debug. real setup done in chipset init via Config.lb. */ + /* If debug. real setup done in chipset init via devicetree.cb. */ cs5536_setup_onchipuart(1); mb_gpio_init(); uart_init(); Modified: trunk/src/mainboard/via/epia-m700/acpi_tables.c ============================================================================== --- trunk/src/mainboard/via/epia-m700/acpi_tables.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/mainboard/via/epia-m700/acpi_tables.c Thu Nov 18 21:12:13 2010 (r6095) @@ -42,9 +42,9 @@ /* * These four macros are copied from <arch/smp/mpspec.h>, I have to do this - * since the "default CONFIG_GENERATE_MP_TABLE = 0" in Options.lb, and also since + * since the "CONFIG_GENERATE_MP_TABLE = 0", and also since * mainboard/via/... have no mptable.c (so that I can not set - * CONFIG_GENERATE_MP_TABLE = 1) as many other mainboards. + * "CONFIG_GENERATE_MP_TABLE = 1" as many other mainboards. * So I have to copy these four to here. acpi_fill_madt() needs this. */ #define MP_IRQ_POLARITY_HIGH 0x1 Modified: trunk/src/mainboard/via/epia-n/acpi_tables.c ============================================================================== --- trunk/src/mainboard/via/epia-n/acpi_tables.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/mainboard/via/epia-n/acpi_tables.c Thu Nov 18 21:12:13 2010 (r6095) @@ -39,10 +39,10 @@ extern const unsigned char AmlCode[]; /* - * These four macros are copied from <arch/smp/mpspec.h>, I have to do this - * since the "default CONFIG_GENERATE_MP_TABLE = 0" in Options.lb, and also since + * These 8 macros are copied from <arch/smp/mpspec.h>, I have to do this + * since the "CONFIG_GENERATE_MP_TABLE = 0", and also since * mainboard/via/... have no mptable.c (so that I can not set - * CONFIG_GENERATE_MP_TABLE = 1) as many other mainboards. + * "CONFIG_GENERATE_MP_TABLE = 1" as many other mainboards. * So I have to copy these four to here. acpi_fill_madt() needs this. */ #define MP_IRQ_POLARITY_DEFAULT 0x0 Modified: trunk/src/northbridge/amd/amdk8/northbridge.c ============================================================================== --- trunk/src/northbridge/amd/amdk8/northbridge.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/northbridge/amd/amdk8/northbridge.c Thu Nov 18 21:12:13 2010 (r6095) @@ -1,6 +1,6 @@ /* This should be done by Eric 2004.12 yhlu add dual core support - 2005.01 yhlu add support move apic before pci_domain in MB Config.lb + 2005.01 yhlu add support move apic before pci_domain in MB devicetree.cb 2005.02 yhlu add e0 memory hole support 2005.11 yhlu add put sb ht chain on bus 0 */ Modified: trunk/src/northbridge/amd/lx/grphinit.c ============================================================================== --- trunk/src/northbridge/amd/lx/grphinit.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/northbridge/amd/lx/grphinit.c Thu Nov 18 21:12:13 2010 (r6095) @@ -85,7 +85,7 @@ * Controller Priority Select(11) 1, Primary * Display Select(10:8) 0x0, CRT * Graphics Memory Size(7:1) CONFIG_VIDEO_MB >> 1, - * defined in mainboard/../Options.lb + * defined in devicetree.cb * PLL Reference Clock Bypass(0) 0, Default */ Modified: trunk/src/northbridge/intel/i945/early_init.c ============================================================================== --- trunk/src/northbridge/intel/i945/early_init.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/northbridge/intel/i945/early_init.c Thu Nov 18 21:12:13 2010 (r6095) @@ -570,7 +570,7 @@ /* Setup SLOTCAP */ /* TODO: These values are mainboard dependent and should - * be set from Config.lb or Options.lb. + * be set from devicetree.cb. */ /* NOTE: SLOTCAP becomes RO after the first write! */ reg32 = pcie_read_config32(PCI_DEV(0, 0x01, 0), 0xb4); Modified: trunk/src/southbridge/intel/i82801ax/i82801ax_lpc.c ============================================================================== --- trunk/src/southbridge/intel/i82801ax/i82801ax_lpc.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/southbridge/intel/i82801ax/i82801ax_lpc.c Thu Nov 18 21:12:13 2010 (r6095) @@ -68,7 +68,7 @@ /* * Use 0x0ef8 for a bitmap to cover all these IRQ's. * Use the defined IRQ values above or set mainboard - * specific IRQ values in your mainboards Config.lb. + * specific IRQ values in your devicetree.cb. */ static void i82801ax_enable_apic(struct device *dev) { Modified: trunk/src/southbridge/intel/i82801bx/i82801bx_lpc.c ============================================================================== --- trunk/src/southbridge/intel/i82801bx/i82801bx_lpc.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/southbridge/intel/i82801bx/i82801bx_lpc.c Thu Nov 18 21:12:13 2010 (r6095) @@ -70,7 +70,7 @@ /* * Use 0x0ef8 for a bitmap to cover all these IRQ's. * Use the defined IRQ values above or set mainboard - * specific IRQ values in your mainboards Config.lb. + * specific IRQ values in your devicetree.cb. */ static void i82801bx_enable_apic(struct device *dev) { Modified: trunk/src/southbridge/intel/i82801gx/i82801gx_ide.c ============================================================================== --- trunk/src/southbridge/intel/i82801gx/i82801gx_ide.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/southbridge/intel/i82801gx/i82801gx_ide.c Thu Nov 18 21:12:13 2010 (r6095) @@ -37,7 +37,7 @@ printk(BIOS_DEBUG, "i82801gx_ide: initializing... "); if (config == NULL) { - printk(BIOS_ERR, "\ni82801gx_ide: Not mentioned in mainboard's Config.lb!\n"); + printk(BIOS_ERR, "\ni82801gx_ide: Not mentioned in devicetree.cb!\n"); // Trying to set somewhat safe defaults instead of bailing out. enable_primary = enable_secondary = 1; } else { Modified: trunk/src/southbridge/intel/i82801gx/i82801gx_sata.c ============================================================================== --- trunk/src/southbridge/intel/i82801gx/i82801gx_sata.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/southbridge/intel/i82801gx/i82801gx_sata.c Thu Nov 18 21:12:13 2010 (r6095) @@ -36,7 +36,7 @@ printk(BIOS_DEBUG, "i82801gx_sata: initializing...\n"); if (config == NULL) { - printk(BIOS_ERR, "i82801gx_sata: error: device not in Config.lb!\n"); + printk(BIOS_ERR, "i82801gx_sata: error: device not in devicetree.cb!\n"); return; } Modified: trunk/src/southbridge/intel/i82870/p64h2_ioapic.c ============================================================================== --- trunk/src/southbridge/intel/i82870/p64h2_ioapic.c Thu Nov 18 20:40:33 2010 (r6094) +++ trunk/src/southbridge/intel/i82870/p64h2_ioapic.c Thu Nov 18 21:12:13 2010 (r6095) @@ -40,10 +40,10 @@ // A note on IOAPIC addresses: // 0 and 1 are used for the local APICs of the dual virtual - // (hyper-threaded) CPUs of physical CPU 0 (mainboard/Config.lb). + // (hyper-threaded) CPUs of physical CPU 0 (devicetree.cb). // 6 and 7 are used for the local APICs of the dual virtual - // (hyper-threaded) CPUs of physical CPU 1 (mainboard/Config.lb). - // 2 is used for the IOAPIC in the 82801 Southbridge (hard-coded in i82801xx_lpc.c) + // (hyper-threaded) CPUs of physical CPU 1 (devicetree.cb). + // 2 is used for the IOAPIC in the 82801 southbridge (hard-coded in i82801xx_lpc.c) // Map APIC index into APIC ID // IDs 3, 4, 5, and 8+ are available (see above note)

3 2

[commit] r6096 - trunk/util/k8resdump
by repository service 18 Nov '10

18 Nov '10

Author: stepan Date: Fri Nov 19 01:29:32 2010 New Revision: 6096 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6096 Log: drop temp file from coreboot tree Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Deleted: trunk/util/k8resdump/.dependencies

1 0

[commit] r6094 - in trunk/src/mainboard: asus/a8v-e_deluxe asus/a8v-e_se msi/ms9282 msi/ms9652_fam10
by repository service 18 Nov '10

18 Nov '10

Author: uwe Date: Thu Nov 18 20:40:33 2010 New Revision: 6094 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6094 Log: Drop unused and incorrect RTC_DEV for Winbond W83627EHG. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/src/mainboard/asus/a8v-e_deluxe/romstage.c trunk/src/mainboard/asus/a8v-e_se/romstage.c trunk/src/mainboard/msi/ms9282/romstage.c trunk/src/mainboard/msi/ms9652_fam10/romstage.c Modified: trunk/src/mainboard/asus/a8v-e_deluxe/romstage.c ============================================================================== --- trunk/src/mainboard/asus/a8v-e_deluxe/romstage.c Thu Nov 18 19:12:09 2010 (r6093) +++ trunk/src/mainboard/asus/a8v-e_deluxe/romstage.c Thu Nov 18 20:40:33 2010 (r6094) @@ -50,7 +50,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1) #define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED) #define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI) -#define RTC_DEV PNP_DEV(0x2e, W83627EHG_RTC) static void memreset(int controllers, const struct mem_controller *ctrl) { Modified: trunk/src/mainboard/asus/a8v-e_se/romstage.c ============================================================================== --- trunk/src/mainboard/asus/a8v-e_se/romstage.c Thu Nov 18 19:12:09 2010 (r6093) +++ trunk/src/mainboard/asus/a8v-e_se/romstage.c Thu Nov 18 20:40:33 2010 (r6094) @@ -50,7 +50,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1) #define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED) #define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI) -#define RTC_DEV PNP_DEV(0x2e, W83627EHG_RTC) static void memreset(int controllers, const struct mem_controller *ctrl) { Modified: trunk/src/mainboard/msi/ms9282/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9282/romstage.c Thu Nov 18 19:12:09 2010 (r6093) +++ trunk/src/mainboard/msi/ms9282/romstage.c Thu Nov 18 20:40:33 2010 (r6094) @@ -49,7 +49,6 @@ #include "northbridge/amd/amdk8/setup_resource_map.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1) -#define RTC_DEV PNP_DEV(0x2e, W83627EHG_RTC) #include <device/pci_ids.h> #include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c" Modified: trunk/src/mainboard/msi/ms9652_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9652_fam10/romstage.c Thu Nov 18 19:12:09 2010 (r6093) +++ trunk/src/mainboard/msi/ms9652_fam10/romstage.c Thu Nov 18 20:40:33 2010 (r6094) @@ -55,7 +55,6 @@ #include "northbridge/amd/amdfam10/setup_resource_map.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1) -#define RTC_DEV PNP_DEV(0x2e, W83627EHG_RTC) #include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"

1 0

[commit] r6093 - trunk/util/lint
by repository service 18 Nov '10

18 Nov '10

Author: uwe Date: Thu Nov 18 19:12:09 2010 New Revision: 6093 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6093 Log: Make lint script executable, otherwise invocation fails. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/util/lint/lint-001-no-global-config-in-romstage (props changed)

1 0

[commit] r6092 - trunk/util/lint
by repository service 18 Nov '10

18 Nov '10

Author: oxygene Date: Thu Nov 18 16:07:06 2010 New Revision: 6092 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6092 Log: lint tests can now describe what they do (for the benefit of make lint users) Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Acked-by: Patrick Georgi <patrick(a)georgi-clan.de> Modified: trunk/util/lint/lint-001-no-global-config-in-romstage Modified: trunk/util/lint/lint-001-no-global-config-in-romstage ============================================================================== --- trunk/util/lint/lint-001-no-global-config-in-romstage Thu Nov 18 16:05:06 2010 (r6091) +++ trunk/util/lint/lint-001-no-global-config-in-romstage Thu Nov 18 16:07:06 2010 (r6092) @@ -1,4 +1,5 @@ #!/bin/sh +# DESCR: Check that no symbols #defined in any romstage.c is used elsewhere DEFINES=`grep "#define" src/mainboard/*/*/romstage.c |sed 's,.*#define[\t ]$[^\t ]*$[\t ].*,\1,' | grep -v "(" | sort -u` SCANBUCKET=`mktemp` LC_ALL=C export LC_ALL

1 0

[commit] r6091 - trunk
by repository service 18 Nov '10

18 Nov '10

Author: oxygene Date: Thu Nov 18 16:05:06 2010 New Revision: 6091 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6091 Log: Add "make lint" target that calls all util/lint/lint-* scripts and fails if any of these output text to stdout. Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Acked-by: Patrick Georgi <patrick(a)georgi-clan.de> Modified: trunk/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Thu Nov 18 15:33:02 2010 (r6090) +++ trunk/Makefile Thu Nov 18 16:05:06 2010 (r6091) @@ -366,6 +366,24 @@ update: dongle.py -c /dev/term/1 $(obj)/coreboot.rom EOF +lint: + LINTLOG=`mktemp`; \ + for script in util/lint/lint-*; do \ + echo `basename $$script`; \ + grep "^# DESCR:" $$script | sed "s,.*DESCR: *,," ; \ + echo ========; \ + $$script > $$LINTLOG; \ + if [ `wc -l $$LINTLOG | cut -d' ' -f1` -eq 0 ]; then \ + printf "success\n\n"; \ + else \ + echo test failed: ; \ + cat $$LINTLOG; \ + rm -f $$LINTLOG; \ + exit 1; \ + fi \ + done; \ + rm -f $$LINTLOG + # This include must come _before_ the pattern rules below! # Order _does_ matter for pattern rules. include util/kconfig/Makefile

1 0

[commit] r6090 - trunk/util/lint
by repository service 18 Nov '10

18 Nov '10

Author: oxygene Date: Thu Nov 18 15:33:02 2010 New Revision: 6090 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6090 Log: Set locale to POSIX to avoid problems with invalid 8bit character sequences. Increase scanning speed. Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Acked-by: Patrick Georgi <patrick(a)georgi-clan.de> Modified: trunk/util/lint/lint-001-no-global-config-in-romstage Modified: trunk/util/lint/lint-001-no-global-config-in-romstage ============================================================================== --- trunk/util/lint/lint-001-no-global-config-in-romstage Thu Nov 18 12:36:16 2010 (r6089) +++ trunk/util/lint/lint-001-no-global-config-in-romstage Thu Nov 18 15:33:02 2010 (r6090) @@ -1,7 +1,8 @@ #!/bin/sh DEFINES=`grep "#define" src/mainboard/*/*/romstage.c |sed 's,.*#define[\t ]$[^\t ]*$[\t ].*,\1,' | grep -v "(" | sort -u` SCANBUCKET=`mktemp` -find src -name .svn -type d -prune -o -name mainboard -type d -prune -o -name examples -type d -prune -o -type f -exec sed -f `dirname $0`/remccoms3.sed {} + > $SCANBUCKET +LC_ALL=C export LC_ALL +find src -name .svn -type d -prune -o -name mainboard -type d -prune -o -name examples -type d -prune -o -type f -exec sed -nf `dirname $0`/remccoms3.sed {} + > $SCANBUCKET for define in $DEFINES; do if [ `egrep -c "([^_A-Za-z0-9]$define[^_A-Za-z0-9]|^$define[^_A-Za-z0-9]|[^_A-Za-z0-9]$define\$)" $SCANBUCKET` -gt 0 ]; then

1 0

← Newer
1
...
8
9
10
11
12
13
14
...
29
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot November 2010