coreboot May 2009

coreboot@coreboot.org

92 participants
571 discussions

[flashrom] r509 - trunk
by svn＠coreboot.org 14 May '09

14 May '09

Author: uwe Date: 2009-05-14 16:51:14 +0200 (Thu, 14 May 2009) New Revision: 509 Modified: trunk/Makefile Log: Cosmetics and eliminate unneeded vars as per IRC discussion (trivial). Build-tested and 'make PREFIX=/tmp/foo install' tested by me. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-05-14 14:17:07 UTC (rev 508) +++ trunk/Makefile 2009-05-14 14:51:14 UTC (rev 509) @@ -6,16 +6,12 @@ PROGRAM = flashrom -CC ?= gcc -STRIP = strip +CC ?= gcc +STRIP = strip INSTALL = install PREFIX ?= /usr/local CFLAGS ?= -Os -Wall -Werror -prefix = $(DESTDIR)$(PREFIX) -man8dir = $(prefix)/share/man/man8 -sbindir = $(prefix)/sbin - OS_ARCH = $(shell uname) ifneq ($(OS_ARCH), SunOS) STRIP_ARGS = -s @@ -78,9 +74,10 @@ @rm -f .test.c .test install: $(PROGRAM) - mkdir -p $(sbindir) $(man8dir) - $(INSTALL) -m 0755 $(PROGRAM) $(sbindir) - $(INSTALL) -m 0644 $(PROGRAM).8 $(man8dir) + mkdir -p $(DESTDIR)$(PREFIX)/sbin + mkdir -p $(DESTDIR)$(PREFIX)/share/man/man8 + $(INSTALL) -m 0755 $(PROGRAM) $(DESTDIR)$(PREFIX)/sbin + $(INSTALL) -m 0644 $(PROGRAM).8 $(DESTDIR)$(PREFIX)/share/man/man8 .PHONY: all clean distclean dep pciutils

1 0

flashrom Makefile improvements
by Christian Ruppert 14 May '09

14 May '09

Hey guys, I wrote a patch which includes some Makefile improvements so please review. Signed-off-by: Christian Ruppert <spooky85(a)gmail.com> Regards, Christian

4 6

[flashrom] r508 - trunk
by svn＠coreboot.org 14 May '09

14 May '09

Author: hailfinger Date: 2009-05-14 16:17:07 +0200 (Thu, 14 May 2009) New Revision: 508 Modified: trunk/Makefile Log: Improve makefile structure a bit. Signed-off-by: Christian Ruppert <spooky85(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-05-14 12:59:36 UTC (rev 507) +++ trunk/Makefile 2009-05-14 14:17:07 UTC (rev 508) @@ -8,12 +8,14 @@ CC ?= gcc STRIP = strip -INSTALL = /usr/bin/install -PREFIX = /usr/local -#CFLAGS = -O2 -g -Wall -Werror -CFLAGS = -Os -Wall -Werror -LDFLAGS = +INSTALL = install +PREFIX ?= /usr/local +CFLAGS ?= -Os -Wall -Werror +prefix = $(DESTDIR)$(PREFIX) +man8dir = $(prefix)/share/man/man8 +sbindir = $(prefix)/sbin + OS_ARCH = $(shell uname) ifneq ($(OS_ARCH), SunOS) STRIP_ARGS = -s @@ -27,7 +29,7 @@ LDFLAGS += -L/usr/local/lib endif -LDFLAGS += -lpci -lz +LIBS += -lpci -lz OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.o \ sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o \ @@ -45,8 +47,7 @@ | sed -e "s/.*://" -e "s/$[0-9]*$.*/\1/")"' $(PROGRAM): $(OBJS) - $(CC) -o $(PROGRAM) $(OBJS) $(LDFLAGS) - $(STRIP) $(STRIP_ARGS) $(PROGRAM) + $(CC) $(LDFLAGS) -o $(PROGRAM) $(OBJS) $(LIBS) flashrom.o: flashrom.c $(CC) -c $(CFLAGS) $(SVNDEF) $(CPPFLAGS) $< -o $@ @@ -58,15 +59,18 @@ rm -f .dependencies dep: - @$(CC) $(SVNDEF) -MM *.c > .dependencies + @$(CC) $(CPPFLAGS) $(SVNDEF) -MM *.c > .dependencies +strip: $(PROGRAM) + $(STRIP) $(STRIP_ARGS) $(PROGRAM) + pciutils: @echo; printf "Checking for pciutils and zlib... " @$(shell ( echo "#include <pci/pci.h>"; \ echo "struct pci_access *pacc;"; \ echo "int main(int argc, char **argv)"; \ echo "{ pacc = pci_alloc(); return 0; }"; ) > .test.c ) - @$(CC) $(CFLAGS) .test.c -o .test $(LDFLAGS) >/dev/null 2>&1 && \ + @$(CC) $(CFLAGS) $(LDFLAGS) .test.c -o .test $(LIBS) >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; echo; \ echo "Please install pciutils-devel and zlib-devel."; \ echo "See README for more information."; echo; \ @@ -74,9 +78,9 @@ @rm -f .test.c .test install: $(PROGRAM) - $(INSTALL) $(PROGRAM) $(PREFIX)/sbin - mkdir -p $(PREFIX)/share/man/man8 - $(INSTALL) $(PROGRAM).8 $(PREFIX)/share/man/man8 + mkdir -p $(sbindir) $(man8dir) + $(INSTALL) -m 0755 $(PROGRAM) $(sbindir) + $(INSTALL) -m 0644 $(PROGRAM).8 $(man8dir) .PHONY: all clean distclean dep pciutils

1 0

PCIe config and MMCONF
by Carl-Daniel Hailfinger 14 May '09

14 May '09

MMCONF and PCIe BAR is a concept which has many different names in our tree. It's almost impossible to find all code concerning MMCONFIG when there are some hardcoded values and three different names for it. MMCONF_BASE_ADDRESS, EXT_CONF_BASE_ADDRESS and DEFAULT_PCIEXBAR have the same purpose. There are various places in the tree where that stuff is hardcoded as 0xe0000000 or 0xf0000000 or 0xf4000000. Try grepping for them. Bring antacid for your stomach. Of course, that leads to bugs which are difficult to track down. We need exactly one variable for the base address and another one for the size of that area. Ideas about the name? Regards, Carl-Daniel -- http://www.hailfinger.org/

3 6

[PATCH] flashrom: Add dummy SPI controller support
by Carl-Daniel Hailfinger 14 May '09

14 May '09

Add a dummy SPI controller driver, similar to the dummy LPC/FWH/Parallel flasher driver. Does not support reading or writing the fake chip yet. flashrom --programmer dummy also enables the dummy SPI controller driver. Testing the dummy SPI driver revealed a RDID debug printing bug in the SPI core. Fix that as well. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-dummy_spi/flash.h =================================================================== --- flashrom-dummy_spi/flash.h (Revision 495) +++ flashrom-dummy_spi/flash.h (Arbeitskopie) @@ -569,7 +569,8 @@ BUS_TYPE_IT87XX_SPI, BUS_TYPE_SB600_SPI, BUS_TYPE_VIA_SPI, - BUS_TYPE_WBSIO_SPI + BUS_TYPE_WBSIO_SPI, + BUS_TYPE_DUMMY_SPI } flashbus_t; extern flashbus_t flashbus; @@ -600,6 +601,8 @@ uint8_t dummy_chip_readb(const volatile void *addr); uint16_t dummy_chip_readw(const volatile void *addr); uint32_t dummy_chip_readl(const volatile void *addr); +int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); /* flashrom.c */ extern int verbose; Index: flashrom-dummy_spi/spi.c =================================================================== --- flashrom-dummy_spi/spi.c (Revision 495) +++ flashrom-dummy_spi/spi.c (Arbeitskopie) @@ -46,6 +46,8 @@ return sb600_spi_command(writecnt, readcnt, writearr, readarr); case BUS_TYPE_WBSIO_SPI: return wbsio_spi_command(writecnt, readcnt, writearr, readarr); + case BUS_TYPE_DUMMY_SPI: + return dummy_spi_command(writecnt, readcnt, writearr, readarr); default: printf_debug ("%s called, but no SPI chipset/strapping detected\n", @@ -57,11 +59,14 @@ static int spi_rdid(unsigned char *readarr, int bytes) { const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID }; + int i; if (spi_command(sizeof(cmd), bytes, cmd, readarr)) return 1; - printf_debug("RDID returned %02x %02x %02x.\n", readarr[0], readarr[1], - readarr[2]); + printf_debug("RDID returned"); + for (i = 0; i < bytes; i++) + printf_debug(" 0x%02x", readarr[i]); + printf_debug("\n"); return 0; } @@ -178,6 +183,7 @@ case BUS_TYPE_VIA_SPI: case BUS_TYPE_SB600_SPI: case BUS_TYPE_WBSIO_SPI: + case BUS_TYPE_DUMMY_SPI: return probe_spi_rdid_generic(flash, 4); default: printf_debug("4b ID not supported on this SPI controller\n"); Index: flashrom-dummy_spi/dummyflasher.c =================================================================== --- flashrom-dummy_spi/dummyflasher.c (Revision 495) +++ flashrom-dummy_spi/dummyflasher.c (Arbeitskopie) @@ -31,6 +31,7 @@ int dummy_init(void) { printf_debug("%s\n", __func__); + flashbus = BUS_TYPE_DUMMY_SPI; return 0; } @@ -86,3 +87,23 @@ return 0xffffffff; } +int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + int i; + + printf_debug("%s:", __func__); + + printf_debug(" writing %u bytes:", writecnt); + for (i = 0; i < writecnt; i++) + printf_debug(" 0x%02x", writearr[i]); + + printf_debug(" reading %u bytes:", readcnt); + for (i = 0; i < readcnt; i++) { + printf_debug(" 0xff"); + readarr[i] = 0xff; + } + + printf_debug("\n"); + return 0; +} -- http://www.hailfinger.org/ Index: flashrom-dummy_spi/flash.h =================================================================== --- flashrom-dummy_spi/flash.h (Revision 495) +++ flashrom-dummy_spi/flash.h (Arbeitskopie) @@ -569,7 +569,8 @@ BUS_TYPE_IT87XX_SPI, BUS_TYPE_SB600_SPI, BUS_TYPE_VIA_SPI, - BUS_TYPE_WBSIO_SPI + BUS_TYPE_WBSIO_SPI, + BUS_TYPE_DUMMY_SPI } flashbus_t; extern flashbus_t flashbus; @@ -600,6 +601,8 @@ uint8_t dummy_chip_readb(const volatile void *addr); uint16_t dummy_chip_readw(const volatile void *addr); uint32_t dummy_chip_readl(const volatile void *addr); +int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); /* flashrom.c */ extern int verbose; Index: flashrom-dummy_spi/spi.c =================================================================== --- flashrom-dummy_spi/spi.c (Revision 495) +++ flashrom-dummy_spi/spi.c (Arbeitskopie) @@ -46,6 +46,8 @@ return sb600_spi_command(writecnt, readcnt, writearr, readarr); case BUS_TYPE_WBSIO_SPI: return wbsio_spi_command(writecnt, readcnt, writearr, readarr); + case BUS_TYPE_DUMMY_SPI: + return dummy_spi_command(writecnt, readcnt, writearr, readarr); default: printf_debug ("%s called, but no SPI chipset/strapping detected\n", @@ -57,11 +59,14 @@ static int spi_rdid(unsigned char *readarr, int bytes) { const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID }; + int i; if (spi_command(sizeof(cmd), bytes, cmd, readarr)) return 1; - printf_debug("RDID returned %02x %02x %02x.\n", readarr[0], readarr[1], - readarr[2]); + printf_debug("RDID returned"); + for (i = 0; i < bytes; i++) + printf_debug(" 0x%02x", readarr[i]); + printf_debug("\n"); return 0; } @@ -178,6 +183,7 @@ case BUS_TYPE_VIA_SPI: case BUS_TYPE_SB600_SPI: case BUS_TYPE_WBSIO_SPI: + case BUS_TYPE_DUMMY_SPI: return probe_spi_rdid_generic(flash, 4); default: printf_debug("4b ID not supported on this SPI controller\n"); Index: flashrom-dummy_spi/dummyflasher.c =================================================================== --- flashrom-dummy_spi/dummyflasher.c (Revision 495) +++ flashrom-dummy_spi/dummyflasher.c (Arbeitskopie) @@ -31,6 +31,7 @@ int dummy_init(void) { printf_debug("%s\n", __func__); + flashbus = BUS_TYPE_DUMMY_SPI; return 0; } @@ -86,3 +87,23 @@ return 0xffffffff; } +int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + int i; + + printf_debug("%s:", __func__); + + printf_debug(" writing %u bytes:", writecnt); + for (i = 0; i < writecnt; i++) + printf_debug(" 0x%02x", writearr[i]); + + printf_debug(" reading %u bytes:", readcnt); + for (i = 0; i < readcnt; i++) { + printf_debug(" 0xff"); + readarr[i] = 0xff; + } + + printf_debug("\n"); + return 0; +}

2 2

[flashrom] r507 - trunk
by svn＠coreboot.org 14 May '09

14 May '09

Author: hailfinger Date: 2009-05-14 14:59:36 +0200 (Thu, 14 May 2009) New Revision: 507 Modified: trunk/dummyflasher.c trunk/flash.h trunk/spi.c Log: Add a dummy SPI controller driver, similar to the dummy LPC/FWH/Parallel flasher driver. Does not support reading or writing the fake chip yet. flashrom --programmer dummy also enables the dummy SPI controller driver. Testing the dummy SPI driver revealed a RDID debug printing bug in the SPI core. Fix that as well. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/dummyflasher.c =================================================================== --- trunk/dummyflasher.c 2009-05-14 12:41:00 UTC (rev 506) +++ trunk/dummyflasher.c 2009-05-14 12:59:36 UTC (rev 507) @@ -31,6 +31,7 @@ int dummy_init(void) { printf_debug("%s\n", __func__); + flashbus = BUS_TYPE_DUMMY_SPI; return 0; } @@ -86,3 +87,23 @@ return 0xffffffff; } +int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + int i; + + printf_debug("%s:", __func__); + + printf_debug(" writing %u bytes:", writecnt); + for (i = 0; i < writecnt; i++) + printf_debug(" 0x%02x", writearr[i]); + + printf_debug(" reading %u bytes:", readcnt); + for (i = 0; i < readcnt; i++) { + printf_debug(" 0xff"); + readarr[i] = 0xff; + } + + printf_debug("\n"); + return 0; +} Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-05-14 12:41:00 UTC (rev 506) +++ trunk/flash.h 2009-05-14 12:59:36 UTC (rev 507) @@ -571,7 +571,8 @@ BUS_TYPE_IT87XX_SPI, BUS_TYPE_SB600_SPI, BUS_TYPE_VIA_SPI, - BUS_TYPE_WBSIO_SPI + BUS_TYPE_WBSIO_SPI, + BUS_TYPE_DUMMY_SPI } flashbus_t; extern flashbus_t flashbus; @@ -602,6 +603,8 @@ uint8_t dummy_chip_readb(const volatile void *addr); uint16_t dummy_chip_readw(const volatile void *addr); uint32_t dummy_chip_readl(const volatile void *addr); +int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); /* nic3com.c */ int nic3com_init(void); Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-05-14 12:41:00 UTC (rev 506) +++ trunk/spi.c 2009-05-14 12:59:36 UTC (rev 507) @@ -46,6 +46,8 @@ return sb600_spi_command(writecnt, readcnt, writearr, readarr); case BUS_TYPE_WBSIO_SPI: return wbsio_spi_command(writecnt, readcnt, writearr, readarr); + case BUS_TYPE_DUMMY_SPI: + return dummy_spi_command(writecnt, readcnt, writearr, readarr); default: printf_debug ("%s called, but no SPI chipset/strapping detected\n", @@ -58,12 +60,15 @@ { const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID }; int ret; + int i; ret = spi_command(sizeof(cmd), bytes, cmd, readarr); if (ret) return ret; - printf_debug("RDID returned %02x %02x %02x.\n", readarr[0], readarr[1], - readarr[2]); + printf_debug("RDID returned"); + for (i = 0; i < bytes; i++) + printf_debug(" 0x%02x", readarr[i]); + printf_debug("\n"); return 0; } @@ -202,6 +207,7 @@ case BUS_TYPE_VIA_SPI: case BUS_TYPE_SB600_SPI: case BUS_TYPE_WBSIO_SPI: + case BUS_TYPE_DUMMY_SPI: return probe_spi_rdid_generic(flash, 4); default: printf_debug("4b ID not supported on this SPI controller\n");

1 0

spelling correction in cbtables.c
by psibyrion 14 May '09

14 May '09

Author: raijin Date: Thu May 14 08:11:23 EDT 2009 Modified: trunk/flashrom/cbtables.c Log: Spelling Error in comment Signed-off-by: Daniel McLellan <daniel.mclellan(a)gmail.com> --- cbtable.c~ 2009-05-13 12:38:10.093503294 -0400 +++ cbtable.c 2009-05-13 12:38:10.216503075 -0400 @@ -101,9 +101,9 @@ struct lb_record *recs = (struct lb_record *)(((char *)base) + addr + sizeof(*head)); if (memcmp(head->signature, "LBIO", 4) != 0) continue; - printf_debug("Found canidate at: %08lx-%08lx\n", + printf_debug("Found candidate at: %08lx-%08lx\n", addr, addr + head->table_bytes); if (head->header_bytes != sizeof(*head)) { fprintf(stderr, "Header bytes of %d are incorrect.\n", head->header_bytes);

2 1

[flashrom] r506 - trunk
by svn＠coreboot.org 14 May '09

14 May '09

Author: stuge Date: 2009-05-14 14:41:00 +0200 (Thu, 14 May 2009) New Revision: 506 Modified: trunk/cbtable.c Log: Fix spelling error in comment Author: raijin Signed-off-by: Daniel McLellan <daniel.mclellan(a)gmail.com> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/cbtable.c =================================================================== --- trunk/cbtable.c 2009-05-13 22:51:27 UTC (rev 505) +++ trunk/cbtable.c 2009-05-14 12:41:00 UTC (rev 506) @@ -102,7 +102,7 @@ (struct lb_record *)(((char *)base) + addr + sizeof(*head)); if (memcmp(head->signature, "LBIO", 4) != 0) continue; - printf_debug("Found canidate at: %08lx-%08lx\n", + printf_debug("Found candidate at: %08lx-%08lx\n", addr, addr + head->table_bytes); if (head->header_bytes != sizeof(*head)) { fprintf(stderr, "Header bytes of %d are incorrect.\n",

1 0

RFC: reliable XEN-Server project with Core-Boot. Which Mainboard to use
by Ludwig Jaffe 14 May '09

14 May '09

Hi there, as coreboot gives us the possibility to fully control a board's boot process, I would like to suggest to make a small end-user project. As I do want to build some web and application servers using xen. I think about joining forces and build a reference-implementation for that. So anyone then can buy a quite cheap an available mainboard, that supports coreboot and a XEN-Kernel with some small userland (sshd, mgetty (modem-access), busybox, xen-tools). The reason for this is that people can build cheap servers to put them into colocation without the need of expensive remote-console-interfaces or remote-hands service and the like. The Server just boots coreboot and then the xen-kernel with the essential tools. So if anything goes wrong (Misconfigured Xen-clients, hdd-failures, Network, other pain which does not affect cpu+chipset) the box will be able to be put to life again from remote. Within coreboot, using a 8MByte Bios we should have enough space for the userland. Now the question is, which board/chipset would you choose? There some serverboards supported in coreboot which are now end-of life, and there are consumerboards which may be good for the task. As I think, that this xen-server sould be a 1u (max 2u) server, a small board with low peripheral count (4x sata for kernel-raid5), 2 PCI-express-slots for extensions, chipset-graphics, internal serial port for modem etc. should suffice. Any suggestions/ideas? Thanks for reading all the best LuJa

3 2

Re: [coreboot] [v2] r4280 - trunk/coreboot-v2/src/arch/i386/boot
by Bao, Zheng 14 May '09

14 May '09

I have to say it still reports AE_NO_ACPI_TABLES when Linux boots. My platform is dbm690t +　filo + ubuntu7(with kernel 2.6.24) Zheng -----Original Message----- From: coreboot-bounces+zheng.bao=amd.com(a)coreboot.org [mailto:coreboot-bounces+zheng.bao=amd.com@coreboot.org] On Behalf Of svn(a)coreboot.org Sent: Wednesday, May 13, 2009 10:40 PM To: coreboot(a)coreboot.org Subject: [coreboot] [v2] r4280 - trunk/coreboot-v2/src/arch/i386/boot Author: oxygene Date: 2009-05-13 16:39:59 +0200 (Wed, 13 May 2009) New Revision: 4280 Modified: trunk/coreboot-v2/src/arch/i386/boot/tables.c Log: Make ACPI with low and high tables work again. The RSDP contained a bogus RSDT pointer due to a wrong order of commands. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: trunk/coreboot-v2/src/arch/i386/boot/tables.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/tables.c 2009-05-13 02:48:58 UTC (rev 4279) +++ trunk/coreboot-v2/src/arch/i386/boot/tables.c 2009-05-13 14:39:59 UTC (rev 4280) @@ -116,14 +116,16 @@ #if HAVE_HIGH_TABLES == 1 #if HAVE_LOW_TABLES == 1 unsigned long high_rsdp=ALIGN(high_table_end, 16); - unsigned long rsdt_location=(unsigned long*)(((acpi_rsdp_t*)high_rsdp)->rsdt_address); - acpi_write_rsdp(rom_table_end, rsdt_location); - rom_table_end = ALIGN(ALIGN(rom_table_end, 16) + sizeof(acpi_rsdp_t), 16); #endif if (high_tables_base) { high_table_end = write_acpi_tables(high_table_end); high_table_end = (high_table_end+1023) & ~1023; } +#if HAVE_LOW_TABLES == 1 + unsigned long rsdt_location=(unsigned long*)(((acpi_rsdp_t*)high_rsdp)->rsdt_address); + acpi_write_rsdp(rom_table_end, rsdt_location); + rom_table_end = ALIGN(ALIGN(rom_table_end, 16) + sizeof(acpi_rsdp_t), 16); +#endif #else #if HAVE_LOW_TABLES == 1 rom_table_end = write_acpi_tables(rom_table_end); -- coreboot mailing list: coreboot(a)coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

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coreboot May 2009