coreboot May 2009

coreboot@coreboot.org

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571 discussions

Re: [coreboot] [v2] r4271 - in trunk/coreboot-v2/src: devices include/device
by Peter Stuge 14 May '09

14 May '09

svn(a)coreboot.org wrote: > + show_all_devs(BIOS_DEBUG, "Before Phase 3."); Maybe go easy with phases and numbers in v2 until there's a formal specification? //Peter

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build service results for r4284
by coreboot information 14 May '09

14 May '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "ward" checked in revision 4284 to the coreboot repository. This caused the following changes: Change Log: The cbfstool print command should pretty-print the type of components that are type 'deleted'. Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Peter Stuge <peter(a)stuge.se> Build Log: Compilation of asus:mew-am is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4284&device=mew-am&vendor=… If something broke during this checkin please be a pain in ward's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[cbfstool] [PATCH] pretty-print type of deleted components
by Ward Vandewege 14 May '09

14 May '09

See attached. Thanks, Ward. -- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior Systems Administrator

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[v2] r4284 - trunk/coreboot-v2/util/cbfstool
by svn＠coreboot.org 14 May '09

14 May '09

Author: ward Date: 2009-05-14 05:00:15 +0200 (Thu, 14 May 2009) New Revision: 4284 Modified: trunk/coreboot-v2/util/cbfstool/print.c Log: The cbfstool print command should pretty-print the type of components that are type 'deleted'. Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/coreboot-v2/util/cbfstool/print.c =================================================================== --- trunk/coreboot-v2/util/cbfstool/print.c 2009-05-13 20:11:04 UTC (rev 4283) +++ trunk/coreboot-v2/util/cbfstool/print.c 2009-05-14 03:00:15 UTC (rev 4284) @@ -57,6 +57,9 @@ case CBFS_COMPONENT_NULL: strcpy(type, "free"); break; + case CBFS_COMPONENT_DELETED: + strcpy(type, "deleted"); + break; default: sprintf(type, "0x%8.8x", htonl(c->type)); break;

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fix for cbfs error for longer file names
by ron minnich 14 May '09

14 May '09

attached. This came up when cbfs (correctly) diagnosed a rom as corrupt ... it was a bug in cbfs, but that's how it's supposed to work -- catch a bad rom at build time, not boot time. ron

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SB600 SPI hangs explained
by Carl-Daniel Hailfinger 14 May '09

14 May '09

It took me a while, but now I understand why SB600 SPI accesses hang on some boards. The problem is not related to the presence or absence of a SPI chip. It is also not related to usage of GPIO lines for SPI or GPIO. On some boards (with LPC flash) the SPI_BaseAddr is 0. The code did not check for that condition and assumed the BAR was really at address zero. Of course, every machine has RAM there and all writes to the SB600 SPI controller ended up scribbling over the zero page in RAM. That also means the SB600 SPI driver never got the expected response from the SPI controller because the controller never saw the writes. Fortunately, the bug is fixed in r491 in the new flashrom repository. If anyone still wondered why we were seeing these hangs, the above explanation should hopefully be sufficient. Regards, Carl-Daniel -- http://www.hailfinger.org/

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SeaBIOS not running vga rom
by Joseph Smith 14 May '09

14 May '09

Hello, This may be a dumb question, but I was wondering, can I use SeaBIOS as a payload without loading assembly blob roms? I ask this because I am going to be running custom VGA code after VM86 excicutes the vga rom and returns back to coreboot. I don't think this would be possible for SeaBIOS, because at that point it has already left coreboot. So I would like to just use SeaBIOS as my payload to boot disks only. Is this possible? If so what options do I need to define in SeaBIOS? -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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[PATCH] flashrom: Generic status register prettyprinting for SST25*
by Carl-Daniel Hailfinger 14 May '09

14 May '09

Generic status register prettyprinting for SST25*. Even if we don't tell the user about the areas the block locking bits correspond to, printing a detailed list of which lock bits are set is a definite improvement. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-sst25_blocklocking_print/spi.c =================================================================== --- flashrom-sst25_blocklocking_print/spi.c (Revision 501) +++ flashrom-sst25_blocklocking_print/spi.c (Arbeitskopie) @@ -384,7 +384,7 @@ case 0x258d: spi_prettyprint_status_register_sst25vf040b(status); break; - case 0x258e: + default: spi_prettyprint_status_register_sst25(status); break; } -- http://www.hailfinger.org/ Index: flashrom-sst25_blocklocking_print/spi.c =================================================================== --- flashrom-sst25_blocklocking_print/spi.c (Revision 501) +++ flashrom-sst25_blocklocking_print/spi.c (Arbeitskopie) @@ -384,7 +384,7 @@ case 0x258d: spi_prettyprint_status_register_sst25vf040b(status); break; - case 0x258e: + default: spi_prettyprint_status_register_sst25(status); break; }

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[flashrom] r505 - trunk
by svn＠coreboot.org 14 May '09

14 May '09

Author: hailfinger Date: 2009-05-14 00:51:27 +0200 (Thu, 14 May 2009) New Revision: 505 Modified: trunk/spi.c Log: Generic status register prettyprinting for SST25*. Even if we don't tell the user about the areas the block locking bits correspond to, printing a detailed list of which lock bits are set is a definite improvement. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Sample output: [...] Probing for SST SST25VF032B, 4096 KB: RDID returned bf 25 4a. probe_spi_rdid_generic: id1 0xbf, id2 0x254a Chip status register is 1c Chip status register: Block Protect Write Disable (BPL) is not set Chip status register: Auto Address Increment Programming (AAI) is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is set Chip status register: Bit 3 / Block Protect 1 (BP1) is set Chip status register: Bit 2 / Block Protect 0 (BP0) is set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "SST SST25VF032B" (4096 KB) at physical address 0xffc00000. Acked-by: Cristi Magherusan <cristi.magherusan(a)net.utcluj.ro> Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-05-13 22:19:12 UTC (rev 504) +++ trunk/spi.c 2009-05-13 22:51:27 UTC (rev 505) @@ -384,7 +384,7 @@ case 0x258d: spi_prettyprint_status_register_sst25vf040b(status); break; - case 0x258e: + default: spi_prettyprint_status_register_sst25(status); break; }

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flasrom: SST39VF512 tested
by Mateusz Murawski 14 May '09

14 May '09

Hi Tested with 3COM 3C905C: EtherLink 10/100 PCI (TX) http://www.coreboot.org/pipermail/coreboot/2009-May/048163.html --- flashchips.c.old 2009-05-13 15:53:07.000000000 +0200 +++ flashchips.c 2009-05-13 15:53:56.000000000 +0200 @@ -1375,7 +1375,7 @@ .model_id = SST_39VF512, .total_size = 64, .page_size = 4096, - .tested = TEST_UNTESTED, + .tested = TEST_PREW, .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002,

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coreboot May 2009