coreboot February 2013

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New patch to review for coreboot: 7bbe683 Inagua+children: use board name only where code is actually board specific
by Jens Rottmann 20 Feb '13

20 Feb '13

Jens Rottmann (JRottmann(a)LiPPERTembedded.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2464 -gerrit commit 7bbe6834d958cfbc5a2272187bca77dc4e6485bf Author: Jens Rottmann <JRottmann(a)LiPPERTembedded.de> Date: Wed Feb 20 21:24:20 2013 +0100 Inagua+children: use board name only where code is actually board specific Inagua & co. mention the board name in several places which are really not that board specific. For example dsdt.asl for Persimmon and South Station would be identical - apart from the board name at the top. Changed that to "COREBOOT" like many other boards do it. Sometimes people even forget to change it: Union Station's platform_cfg.h starts with "#ifndef _PERSIMMON_CFG_H_". Funny. Changed that to "_PLATFORM_CFG_H_" everywhere. This patch reduces unnecessary differences between AMD Inagua, Persimmon, Union Station, South Station and Asrock E350M1, making them a little bit easier to compare. Change-Id: Ida15fa6a7adfc770240ac30e795946000dae3f16 Signed-off-by: Jens Rottmann <JRottmann(a)LiPPERTembedded.de> --- src/mainboard/amd/inagua/dsdt.asl | 2 +- src/mainboard/amd/inagua/mainboard.c | 10 +++++----- src/mainboard/amd/inagua/platform_cfg.h | 4 ++-- src/mainboard/amd/persimmon/dsdt.asl | 2 +- src/mainboard/amd/persimmon/mainboard.c | 10 +++++----- src/mainboard/amd/persimmon/platform_cfg.h | 10 +++++----- src/mainboard/amd/south_station/dsdt.asl | 2 +- src/mainboard/amd/south_station/mainboard.c | 10 +++++----- src/mainboard/amd/south_station/platform_cfg.h | 4 ++-- src/mainboard/amd/union_station/dsdt.asl | 2 +- src/mainboard/amd/union_station/mainboard.c | 10 +++++----- src/mainboard/amd/union_station/platform_cfg.h | 4 ++-- src/mainboard/asrock/e350m1/mainboard.c | 10 +++++----- src/mainboard/asrock/e350m1/platform_cfg.h | 4 ++-- 14 files changed, 42 insertions(+), 42 deletions(-) diff --git a/src/mainboard/amd/inagua/dsdt.asl b/src/mainboard/amd/inagua/dsdt.asl index 46b92f1..c7b44d0 100644 --- a/src/mainboard/amd/inagua/dsdt.asl +++ b/src/mainboard/amd/inagua/dsdt.asl @@ -23,7 +23,7 @@ DefinitionBlock ( "DSDT", /* Signature */ 0x02, /* DSDT Revision, needs to be 2 for 64bit */ "AMD ", /* OEMID */ - "INAGUA ", /* TABLE ID */ + "COREBOOT", /* TABLE ID */ 0x00010001 /* OEM Revision */ ) { /* Start of ASL file */ diff --git a/src/mainboard/amd/inagua/mainboard.c b/src/mainboard/amd/inagua/mainboard.c index 9a5e00c..9952051 100644 --- a/src/mainboard/amd/inagua/mainboard.c +++ b/src/mainboard/amd/inagua/mainboard.c @@ -70,10 +70,10 @@ void set_pcie_dereset(void) } -/************************************************* - * enable the dedicated function in INAGUA board. - *************************************************/ -static void inagua_enable(device_t dev) +/********************************************** + * Enable the dedicated functions of the board. + **********************************************/ +static void enable_dev(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); @@ -82,5 +82,5 @@ static void inagua_enable(device_t dev) } struct chip_operations mainboard_ops = { - .enable_dev = inagua_enable, + .enable_dev = enable_dev, }; diff --git a/src/mainboard/amd/inagua/platform_cfg.h b/src/mainboard/amd/inagua/platform_cfg.h index dd0251f..ded42df 100644 --- a/src/mainboard/amd/inagua/platform_cfg.h +++ b/src/mainboard/amd/inagua/platform_cfg.h @@ -18,8 +18,8 @@ */ -#ifndef _INAGUA_CFG_H_ -#define _INAGUA_CFG_H_ +#ifndef _PLATFORM_CFG_H_ +#define _PLATFORM_CFG_H_ /** * @def BIOS_SIZE_1M diff --git a/src/mainboard/amd/persimmon/dsdt.asl b/src/mainboard/amd/persimmon/dsdt.asl index dd7b4b1..c7b44d0 100644 --- a/src/mainboard/amd/persimmon/dsdt.asl +++ b/src/mainboard/amd/persimmon/dsdt.asl @@ -23,7 +23,7 @@ DefinitionBlock ( "DSDT", /* Signature */ 0x02, /* DSDT Revision, needs to be 2 for 64bit */ "AMD ", /* OEMID */ - "PERSIMMO", /* TABLE ID */ + "COREBOOT", /* TABLE ID */ 0x00010001 /* OEM Revision */ ) { /* Start of ASL file */ diff --git a/src/mainboard/amd/persimmon/mainboard.c b/src/mainboard/amd/persimmon/mainboard.c index 5edacd3..9f1435d 100644 --- a/src/mainboard/amd/persimmon/mainboard.c +++ b/src/mainboard/amd/persimmon/mainboard.c @@ -50,10 +50,10 @@ void set_pcie_dereset(void) } -/************************************************* -* enable the dedicated function in persimmon board. -*************************************************/ -static void persimmon_enable(device_t dev) +/********************************************** + * Enable the dedicated functions of the board. + **********************************************/ +static void enable_dev(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); @@ -76,5 +76,5 @@ static void persimmon_enable(device_t dev) } struct chip_operations mainboard_ops = { - .enable_dev = persimmon_enable, + .enable_dev = enable_dev, }; diff --git a/src/mainboard/amd/persimmon/platform_cfg.h b/src/mainboard/amd/persimmon/platform_cfg.h index 7051e7d..1c0a7e4 100644 --- a/src/mainboard/amd/persimmon/platform_cfg.h +++ b/src/mainboard/amd/persimmon/platform_cfg.h @@ -18,8 +18,8 @@ */ -#ifndef _PERSIMMON_CFG_H_ -#define _PERSIMMON_CFG_H_ +#ifndef _PLATFORM_CFG_H_ +#define _PLATFORM_CFG_H_ /** * @def BIOS_SIZE_1M @@ -227,7 +227,7 @@ */ #define GEC_CONFIG 0 -const static CODECENTRY persimmon_codec_alc269[] = +static const CODECENTRY persimmon_codec_alc269[] = { /* NID, PinConfig */ {0x12, 0x411111F0}, @@ -244,7 +244,7 @@ const static CODECENTRY persimmon_codec_alc269[] = {0xff, 0xffffffff} /* end of table */ }; -const static CODECTBLLIST persimmon_codec_tablelist[] = +static const CODECTBLLIST codec_tablelist[] = { {0x010ec0269, (CODECENTRY*)&persimmon_codec_alc269[0]}, {0x0FFFFFFFFUL, (CODECENTRY*)0x0FFFFFFFFUL} @@ -254,7 +254,7 @@ const static CODECTBLLIST persimmon_codec_tablelist[] = * @def AZALIA_OEM_VERB_TABLE * Mainboard specific cocec verb table list */ -#define AZALIA_OEM_VERB_TABLE (&persimmon_codec_tablelist[0]) +#define AZALIA_OEM_VERB_TABLE (&codec_tablelist[0]) /* set up an ACPI prefered power management profile */ /* from acpi.h diff --git a/src/mainboard/amd/south_station/dsdt.asl b/src/mainboard/amd/south_station/dsdt.asl index 958295b..c7b44d0 100644 --- a/src/mainboard/amd/south_station/dsdt.asl +++ b/src/mainboard/amd/south_station/dsdt.asl @@ -23,7 +23,7 @@ DefinitionBlock ( "DSDT", /* Signature */ 0x02, /* DSDT Revision, needs to be 2 for 64bit */ "AMD ", /* OEMID */ - "SOUTHSTN", /* TABLE ID */ + "COREBOOT", /* TABLE ID */ 0x00010001 /* OEM Revision */ ) { /* Start of ASL file */ diff --git a/src/mainboard/amd/south_station/mainboard.c b/src/mainboard/amd/south_station/mainboard.c index 5f31e03..a896129 100644 --- a/src/mainboard/amd/south_station/mainboard.c +++ b/src/mainboard/amd/south_station/mainboard.c @@ -72,15 +72,15 @@ static void southstation_led_init(void) } -/************************************************* -* enable the dedicated function in southstation board. -*************************************************/ -static void southstation_enable(device_t dev) +/********************************************** + * Enable the dedicated functions of the board. + **********************************************/ +static void enable_dev(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); southstation_led_init(); } struct chip_operations mainboard_ops = { - .enable_dev = southstation_enable, + .enable_dev = enable_dev, }; diff --git a/src/mainboard/amd/south_station/platform_cfg.h b/src/mainboard/amd/south_station/platform_cfg.h index 1c8506b..3be7b19 100644 --- a/src/mainboard/amd/south_station/platform_cfg.h +++ b/src/mainboard/amd/south_station/platform_cfg.h @@ -18,8 +18,8 @@ */ -#ifndef _PERSIMMON_CFG_H_ -#define _PERSIMMON_CFG_H_ +#ifndef _PLATFORM_CFG_H_ +#define _PLATFORM_CFG_H_ /** * @def BIOS_SIZE_1M diff --git a/src/mainboard/amd/union_station/dsdt.asl b/src/mainboard/amd/union_station/dsdt.asl index 0752640..f56020a 100644 --- a/src/mainboard/amd/union_station/dsdt.asl +++ b/src/mainboard/amd/union_station/dsdt.asl @@ -23,7 +23,7 @@ DefinitionBlock ( "DSDT", /* Signature */ 0x02, /* DSDT Revision, needs to be 2 for 64bit */ "AMD ", /* OEMID */ - "UNIONSTN", /* TABLE ID */ + "COREBOOT", /* TABLE ID */ 0x00010001 /* OEM Revision */ ) { /* Start of ASL file */ diff --git a/src/mainboard/amd/union_station/mainboard.c b/src/mainboard/amd/union_station/mainboard.c index 063f9b4..a980d6b 100644 --- a/src/mainboard/amd/union_station/mainboard.c +++ b/src/mainboard/amd/union_station/mainboard.c @@ -46,14 +46,14 @@ void set_pcie_dereset(void) } -/************************************************* -* enable the dedicated function in unionstation board. -*************************************************/ -static void unionstation_enable(device_t dev) +/********************************************** + * Enable the dedicated functions of the board. + **********************************************/ +static void enable_dev(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); } struct chip_operations mainboard_ops = { - .enable_dev = unionstation_enable, + .enable_dev = enable_dev, }; diff --git a/src/mainboard/amd/union_station/platform_cfg.h b/src/mainboard/amd/union_station/platform_cfg.h index 1c8506b..3be7b19 100644 --- a/src/mainboard/amd/union_station/platform_cfg.h +++ b/src/mainboard/amd/union_station/platform_cfg.h @@ -18,8 +18,8 @@ */ -#ifndef _PERSIMMON_CFG_H_ -#define _PERSIMMON_CFG_H_ +#ifndef _PLATFORM_CFG_H_ +#define _PLATFORM_CFG_H_ /** * @def BIOS_SIZE_1M diff --git a/src/mainboard/asrock/e350m1/mainboard.c b/src/mainboard/asrock/e350m1/mainboard.c index a17778a..53645c2 100644 --- a/src/mainboard/asrock/e350m1/mainboard.c +++ b/src/mainboard/asrock/e350m1/mainboard.c @@ -45,14 +45,14 @@ void set_pcie_dereset(void) } -/************************************************* -* enable the dedicated function in e350m1 board. -*************************************************/ -static void e350m1_enable(device_t dev) +/********************************************** + * Enable the dedicated functions of the board. + **********************************************/ +static void enable_dev(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); } struct chip_operations mainboard_ops = { - .enable_dev = e350m1_enable, + .enable_dev = enable_dev, }; diff --git a/src/mainboard/asrock/e350m1/platform_cfg.h b/src/mainboard/asrock/e350m1/platform_cfg.h index 7fa9c23..1b09590 100644 --- a/src/mainboard/asrock/e350m1/platform_cfg.h +++ b/src/mainboard/asrock/e350m1/platform_cfg.h @@ -18,8 +18,8 @@ */ -#ifndef _E350M1_CFG_H_ -#define _E350M1_CFG_H_ +#ifndef _PLATFORM_CFG_H_ +#define _PLATFORM_CFG_H_ /** * @def BIOS_SIZE_1M

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New patch to review for coreboot: 0b36cc0 Persimmon, Inagua: PCI devs 12.1, 13.1 (USB) don't exist, but 14.6 (GEC) does
by Jens Rottmann 20 Feb '13

20 Feb '13

Jens Rottmann (JRottmann(a)LiPPERTembedded.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2463 -gerrit commit 0b36cc0ce3b68b71efd26e7033678b1bba742985 Author: Jens Rottmann <JRottmann(a)LiPPERTembedded.de> Date: Wed Feb 20 21:12:37 2013 +0100 Persimmon, Inagua: PCI devs 12.1, 13.1 (USB) don't exist, but 14.6 (GEC) does USB ports 0-4 are handled by PCI devices 12.0 (OHCI) and 12.2 (EHCI). 12.1 simply does not exist, removed it from devicetree.cb. While at it made the comment more detailled. Likewise for all USB ports. USB device 14.6 is the Broadcom GbE MAC integrated in the Hudson-E1. Added it to devicetree.cb. It's used on Inagua (on), but not on Persimmon (off). Change-Id: Idea27b3390fa4470f2592e79fdd633d5a218b97b Signed-off-by: Jens Rottmann <JRottmann(a)LiPPERTembedded.de> --- src/mainboard/amd/inagua/devicetree.cb | 17 ++++++++--------- src/mainboard/amd/persimmon/devicetree.cb | 17 ++++++++--------- 2 files changed, 16 insertions(+), 18 deletions(-) diff --git a/src/mainboard/amd/inagua/devicetree.cb b/src/mainboard/amd/inagua/devicetree.cb index f003704..6ce73bb 100644 --- a/src/mainboard/amd/inagua/devicetree.cb +++ b/src/mainboard/amd/inagua/devicetree.cb @@ -39,12 +39,10 @@ chip northbridge/amd/agesa/family14/root_complex chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus device pci 11.0 on end # SATA - device pci 12.0 on end # USB - device pci 12.1 on end # USB - device pci 12.2 on end # USB - device pci 13.0 on end # USB - device pci 13.1 on end # USB - device pci 13.2 on end # USB + device pci 12.0 on end # OHCI USB 0-4 + device pci 12.2 on end # EHCI USB 0-4 + device pci 13.0 on end # OHCI USB 5-9 + device pci 13.2 on end # EHCI USB 5-9 device pci 14.0 on # SM chip drivers/generic/generic #dimm 0-0-0 device i2c 50 on end @@ -66,13 +64,14 @@ chip northbridge/amd/agesa/family14/root_complex end # kbc1100 end #LPC device pci 14.4 off end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0} - device pci 14.5 on end # USB 2 + device pci 14.5 on end # OHCI FS/LS USB + device pci 14.6 on end # Hudson-E1 GbE MAC: Broadcom BCM5785 (14E4:1699) device pci 15.0 on end # PCIe PortA Express Card device pci 15.1 on end # PCIe PortB NEC USB3.0 device pci 15.2 on end # PCIe PortC MINIPCIE SLOT2 device pci 15.3 on end # PCIe PortD PCIE X1 SLOT - device pci 16.0 on end # OHCI USB3 - device pci 16.2 on end # EHCI USB3 + device pci 16.0 on end # OHCI USB 10-13 + device pci 16.2 on end # EHCI USB 10-13 register "gpp_configuration" = "4" #1:1:1:1 register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE end #southbridge/amd/cimx/sb800 diff --git a/src/mainboard/amd/persimmon/devicetree.cb b/src/mainboard/amd/persimmon/devicetree.cb index fce7d10..196327c 100644 --- a/src/mainboard/amd/persimmon/devicetree.cb +++ b/src/mainboard/amd/persimmon/devicetree.cb @@ -39,12 +39,10 @@ chip northbridge/amd/agesa/family14/root_complex chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus device pci 11.0 on end # SATA - device pci 12.0 on end # USB - device pci 12.1 on end # USB - device pci 12.2 on end # USB - device pci 13.0 on end # USB - device pci 13.1 on end # USB - device pci 13.2 on end # USB + device pci 12.0 on end # OHCI USB 0-4 + device pci 12.2 on end # EHCI USB 0-4 + device pci 13.0 on end # OHCI USB 5-9 + device pci 13.2 on end # EHCI USB 5-9 device pci 14.0 on # SM chip drivers/generic/generic #dimm 0-0-0 device i2c 50 on end @@ -82,13 +80,14 @@ chip northbridge/amd/agesa/family14/root_complex end # f81865f end #LPC device pci 14.4 on end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0} - device pci 14.5 off end # USB 2 + device pci 14.5 off end # OHCI FS/LS USB + device pci 14.6 off end # Hudson-E1 GbE MAC: Broadcom BCM5785 (14E4:1699) device pci 15.0 off end # PCIe PortA device pci 15.1 off end # PCIe PortB device pci 15.2 off end # PCIe PortC device pci 15.3 off end # PCIe PortD - device pci 16.0 off end # OHCI USB3 - device pci 16.2 off end # EHCI USB3 + device pci 16.0 off end # OHCI USB 10-13 + device pci 16.2 off end # EHCI USB 10-13 register "gpp_configuration" = "0" #4:0:0:0 (really need to disable all 4 somehow) register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE

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Patch merged into coreboot/master: 601b275 ARMV7: minor tweaks to inter-stage calling and payload handling.
by gerrit＠coreboot.org 20 Feb '13

20 Feb '13

the following patch was just integrated into master: commit 601b27596ffdf526adf5b41c1f8366a5fdddc554 Author: Ronald G. Minnich <rminnich(a)google.com> Date: Wed Feb 20 09:24:29 2013 -0800 ARMV7: minor tweaks to inter-stage calling and payload handling. Payloads, by design, can return. There's lots of mechanism in the payload code to support it, and the chooser payload relies on it. Hence, we should not mark the function call in exit_stage as noreturn. Not all ARM have unified caches, and it's not always easy to tell what to do. So we are very paranoid. Before we call between stages, we should carefully flush the dcache to memory and invalidate the icache. This may be more than is necessary on all architectures but it doesn't really hurt for the most part. So compile cache management code into all stages, and call the flush dcache/invalidate icache from all stages. Change-Id: Ib9cc625c4dfd2d7d4b3c69a74686cc655a9d6484 Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-on: http://review.coreboot.org/2462 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Wed Feb 20 19:08:39 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Wed Feb 20 20:33:25 2013, giving +2 See http://review.coreboot.org/2462 for details. -gerrit

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Patch set updated for coreboot: 884a82a ARMV7: minor tweaks to inter-stage calling and payload handling.
by Ronald G. Minnich 20 Feb '13

20 Feb '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2462 -gerrit commit 884a82a685d65ee016dd73fa9e9e5e3488a79c4a Author: Ronald G. Minnich <rminnich(a)google.com> Date: Wed Feb 20 09:24:29 2013 -0800 ARMV7: minor tweaks to inter-stage calling and payload handling. Payloads, by design, can return. There's lots of mechanism in the payload code to support it, and the chooser payload relies on it. Hence, we should not mark the function call in exit_stage as noreturn. Not all ARM have unified caches, and it's not always easy to tell what to do. So we are very paranoid. Before we call between stages, we should carefully flush the dcache to memory and invalidate the icache. This may be more than is necessary on all architectures but it doesn't really hurt for the most part. So compile cache management code into all stages, and call the flush dcache/invalidate icache from all stages. Change-Id: Ib9cc625c4dfd2d7d4b3c69a74686cc655a9d6484 Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/arch/armv7/lib/Makefile.inc | 3 +++ src/arch/armv7/lib/cache-cp15.c | 6 +++++- src/arch/armv7/stages.c | 16 +++++++++++++++- src/cpu/armltd/cortex-a9/Makefile.inc | 1 + src/cpu/samsung/exynos5250/Makefile.inc | 2 ++ 5 files changed, 26 insertions(+), 2 deletions(-) diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc index 391b6a5..388864a 100644 --- a/src/arch/armv7/lib/Makefile.inc +++ b/src/arch/armv7/lib/Makefile.inc @@ -1,5 +1,7 @@ bootblock-y += syslib.c bootblock-$(CONFIG_EARLY_CONSOLE) += early_console.c +bootblock-y += cache_v7.c +bootblock-y += cache-cp15.c romstage-y += cache_v7.c romstage-y += cache-cp15.c @@ -14,6 +16,7 @@ ramstage-y += div64.S #ramstage-y += memcpy.S #ramstage-y += memset.S ramstage-y += syslib.c +ramstage-y += cache_v7.c #FIXME(dhendrix): should this be a config option? romstage-y += eabi_compat.c diff --git a/src/arch/armv7/lib/cache-cp15.c b/src/arch/armv7/lib/cache-cp15.c index cfbdb94..e08ea57 100644 --- a/src/arch/armv7/lib/cache-cp15.c +++ b/src/arch/armv7/lib/cache-cp15.c @@ -46,8 +46,12 @@ static void set_section_dcache(int section, enum dcache_option option) /* * FIXME(dhendrix): This calculation is from arch/arm/lib/board.c * in u-boot. We may need to subtract more due to logging. + * FIXME(rminnich) + * The cast avoids an incorrect overflow diagnostic. + * We really need to start adding ULL to constants that are + * intrinsically unsigned. */ - tlb_addr = (CONFIG_SYS_SDRAM_BASE + (CONFIG_DRAM_SIZE_MB << 20UL)); + tlb_addr = ((u32)CONFIG_SYS_SDRAM_BASE + (CONFIG_DRAM_SIZE_MB << 20UL)); tlb_addr -= tlb_size; /* round down to next 64KB limit */ tlb_addr &= ~(0x10000 - 1); diff --git a/src/arch/armv7/stages.c b/src/arch/armv7/stages.c index 05b3e1d..c37c1dd 100644 --- a/src/arch/armv7/stages.c +++ b/src/arch/armv7/stages.c @@ -32,14 +32,28 @@ */ #include <arch/stages.h> +#include <arch/armv7/include/common.h> void stage_entry(void) { main(); } +/* we had marked 'doit' as 'noreturn'. + * There is no apparent harm in leaving it as something we can return from, and in the one + * case where we call a payload, the payload is allowed to return. + * Hence, leave it as something we can return from. + */ void stage_exit(void *addr) { - __attribute__((noreturn)) void (*doit)(void) = addr; + void (*doit)(void) = addr; + /* make sure any code we installed is written to memory. Not all ARM have + * unified caches. + */ + flush_dcache_all(); + /* Because most stages copy code to memory, it's a safe and hygienic thing + * to flush the icache here. + */ + invalidate_icache_all(); doit(); } diff --git a/src/cpu/armltd/cortex-a9/Makefile.inc b/src/cpu/armltd/cortex-a9/Makefile.inc index d1e7edf..f1a3689 100644 --- a/src/cpu/armltd/cortex-a9/Makefile.inc +++ b/src/cpu/armltd/cortex-a9/Makefile.inc @@ -1,2 +1,3 @@ ramstage-y += cache.c romstage-y += cache.c +bootblock-y += cache.c diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index c9a9341..33fcedc 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -9,6 +9,7 @@ bootblock-$(CONFIG_EARLY_CONSOLE) += clock_init.c bootblock-$(CONFIG_EARLY_CONSOLE) += clock.c bootblock-$(CONFIG_EARLY_CONSOLE) += soc.c bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c +bootblock-y += exynos_cache.c romstage-y += clock.c romstage-y += clock_init.c @@ -28,6 +29,7 @@ ramstage-y += power.c ramstage-y += soc.c ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c ramstage-y += cpu.c +ramstage-y += exynos_cache.c #ramstage-$(CONFIG_SATA_AHCI) += sata.c

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Patch set updated for coreboot: 1561ecb ARMV7: minor tweaks to inter-stage calling and payload handling.
by Ronald G. Minnich 20 Feb '13

20 Feb '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2462 -gerrit commit 1561ecb4291385934d32ebabeda8ad0f5d06c7a4 Author: Ronald G. Minnich <rminnich(a)google.com> Date: Wed Feb 20 09:24:29 2013 -0800 ARMV7: minor tweaks to inter-stage calling and payload handling. Payloads, by design, can return. There's lots of mechanism in the payload code to support it, and the chooser payload relies on it. Hence, we should not mark the function call in exit_stage as noreturn. Not all ARM have unified caches, and it's not always easy to tell what to do. So we are very paranoid. Before we call between stages, we should carefully flush the dcache to memory and invalidate the icache. This may be more than is necessary on all architectures but it doesn't really hurt for the most part. So compile cache management code into all stages, and call the flush dcache/invalidate icache from all stages. Change-Id: Ib9cc625c4dfd2d7d4b3c69a74686cc655a9d6484 Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/arch/armv7/lib/Makefile.inc | 3 +++ src/arch/armv7/stages.c | 16 +++++++++++++++- src/cpu/samsung/exynos5250/Makefile.inc | 2 ++ 3 files changed, 20 insertions(+), 1 deletion(-) diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc index 391b6a5..388864a 100644 --- a/src/arch/armv7/lib/Makefile.inc +++ b/src/arch/armv7/lib/Makefile.inc @@ -1,5 +1,7 @@ bootblock-y += syslib.c bootblock-$(CONFIG_EARLY_CONSOLE) += early_console.c +bootblock-y += cache_v7.c +bootblock-y += cache-cp15.c romstage-y += cache_v7.c romstage-y += cache-cp15.c @@ -14,6 +16,7 @@ ramstage-y += div64.S #ramstage-y += memcpy.S #ramstage-y += memset.S ramstage-y += syslib.c +ramstage-y += cache_v7.c #FIXME(dhendrix): should this be a config option? romstage-y += eabi_compat.c diff --git a/src/arch/armv7/stages.c b/src/arch/armv7/stages.c index 05b3e1d..c37c1dd 100644 --- a/src/arch/armv7/stages.c +++ b/src/arch/armv7/stages.c @@ -32,14 +32,28 @@ */ #include <arch/stages.h> +#include <arch/armv7/include/common.h> void stage_entry(void) { main(); } +/* we had marked 'doit' as 'noreturn'. + * There is no apparent harm in leaving it as something we can return from, and in the one + * case where we call a payload, the payload is allowed to return. + * Hence, leave it as something we can return from. + */ void stage_exit(void *addr) { - __attribute__((noreturn)) void (*doit)(void) = addr; + void (*doit)(void) = addr; + /* make sure any code we installed is written to memory. Not all ARM have + * unified caches. + */ + flush_dcache_all(); + /* Because most stages copy code to memory, it's a safe and hygienic thing + * to flush the icache here. + */ + invalidate_icache_all(); doit(); } diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index c9a9341..33fcedc 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -9,6 +9,7 @@ bootblock-$(CONFIG_EARLY_CONSOLE) += clock_init.c bootblock-$(CONFIG_EARLY_CONSOLE) += clock.c bootblock-$(CONFIG_EARLY_CONSOLE) += soc.c bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c +bootblock-y += exynos_cache.c romstage-y += clock.c romstage-y += clock_init.c @@ -28,6 +29,7 @@ ramstage-y += power.c ramstage-y += soc.c ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c ramstage-y += cpu.c +ramstage-y += exynos_cache.c #ramstage-$(CONFIG_SATA_AHCI) += sata.c

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New patch to review for coreboot: 85ac65c ARMV7: minor tweaks to inter-stage calling and payload handling.
by Ronald G. Minnich 20 Feb '13

20 Feb '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2462 -gerrit commit 85ac65c1237e75331b30c03e82d21129fe398ed2 Author: Ronald G. Minnich <rminnich(a)google.com> Date: Wed Feb 20 09:24:29 2013 -0800 ARMV7: minor tweaks to inter-stage calling and payload handling. Payloads, by design, can return. There's lots of mechanism in the payload code to support it, and the chooser payload relies on it. Hence, we should not mark the function call in exit_stage as noreturn. Not all ARM have unified caches, and it's not always easy to tell what to do. So we are very paranoid. Before we call between stages, we should carefully flush the dcache to memory and invalidate the icache. This may be more than is necessary on all architectures but it doesn't really hurt for the most part. So compile cache management code into all stages, and call the flush dcache/invalidate icache from all stages. Change-Id: Ib9cc625c4dfd2d7d4b3c69a74686cc655a9d6484 Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/arch/armv7/lib/Makefile.inc | 3 +++ src/arch/armv7/stages.c | 16 +++++++++++++++- src/cpu/samsung/exynos5250/Makefile.inc | 2 ++ 3 files changed, 20 insertions(+), 1 deletion(-) diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc index 391b6a5..388864a 100644 --- a/src/arch/armv7/lib/Makefile.inc +++ b/src/arch/armv7/lib/Makefile.inc @@ -1,5 +1,7 @@ bootblock-y += syslib.c bootblock-$(CONFIG_EARLY_CONSOLE) += early_console.c +bootblock-y += cache_v7.c +bootblock-y += cache-cp15.c romstage-y += cache_v7.c romstage-y += cache-cp15.c @@ -14,6 +16,7 @@ ramstage-y += div64.S #ramstage-y += memcpy.S #ramstage-y += memset.S ramstage-y += syslib.c +ramstage-y += cache_v7.c #FIXME(dhendrix): should this be a config option? romstage-y += eabi_compat.c diff --git a/src/arch/armv7/stages.c b/src/arch/armv7/stages.c index 05b3e1d..4bca58e 100644 --- a/src/arch/armv7/stages.c +++ b/src/arch/armv7/stages.c @@ -32,14 +32,28 @@ */ #include <arch/stages.h> +#include <arch/armv7/include/common.h> void stage_entry(void) { main(); } +/* we had marked 'doit' as 'noreturn'. + * There is no apparent harm in leaving it as something we can return from, and in the one + * case where we call a payload, the payload is allowed to return. + * Hence, leave it as something we can return from. + */ void stage_exit(void *addr) { - __attribute__((noreturn)) void (*doit)(void) = addr; + void (*doit)(void) = addr; + /* make sure any code we installed is written to memory. Not all ARM have + * unified caches. + */ + flush_dcache_all(); + /* Because most stages copy code to memory, it's a safe and hygienic thing + * to flush the icache here. + */ + invalidate_icache_all(); doit(); } diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index c9a9341..33fcedc 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -9,6 +9,7 @@ bootblock-$(CONFIG_EARLY_CONSOLE) += clock_init.c bootblock-$(CONFIG_EARLY_CONSOLE) += clock.c bootblock-$(CONFIG_EARLY_CONSOLE) += soc.c bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c +bootblock-y += exynos_cache.c romstage-y += clock.c romstage-y += clock_init.c @@ -28,6 +29,7 @@ ramstage-y += power.c ramstage-y += soc.c ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c ramstage-y += cpu.c +ramstage-y += exynos_cache.c #ramstage-$(CONFIG_SATA_AHCI) += sata.c

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Patch set updated for coreboot: 60d6f65 AMD SB800: don't switch clock from 14 to 48 MHz for smscsuperio
by Jens Rottmann 20 Feb '13

20 Feb '13

Jens Rottmann (JRottmann(a)LiPPERTembedded.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2454 -gerrit commit 60d6f657bcb628194902a4d31472172a84e6fbba Author: Jens Rottmann <JRottmann(a)LiPPERTembedded.de> Date: Tue Feb 19 15:01:06 2013 +0100 AMD SB800: don't switch clock from 14 to 48 MHz for smscsuperio The power up default for the 14M_25M_48M_OSC switchable clock output ball of the SB800 chipset is 14 MHz. sb800/bootblock.c changes this to 48 MHz, which is the correct value for almost all SIOs. However, not for 'smscsuperio' (SMSC SCH311x), which needs the original 14 MHz and is not configurable for other clock speeds. A wrong SIO clock supply results in funny RS232 output (wrong bit speed) and non-working PS/2. We could switch back to 14 MHz in the mainboard's romstage.c, but then the clock frequency would change twice. The resulting short 48 MHz burst causes a handful of rubbish characters on RS232 on every boot until the SIO clock has stabilized again. This patch skips the SB800 clock switch if the SIO Kconfig requests 14 MHz. This does not affect any boards currently in the repository (yet). Change-Id: Icff41fd88dc41c08f3700ab4f786852f04eff2a4 Signed-off-by: Jens Rottmann <JRottmann(a)LiPPERTembedded.de> --- src/southbridge/amd/cimx/sb800/bootblock.c | 13 ++++++++++--- src/superio/Kconfig | 3 +++ src/superio/smsc/Kconfig | 1 + 3 files changed, 14 insertions(+), 3 deletions(-) diff --git a/src/southbridge/amd/cimx/sb800/bootblock.c b/src/southbridge/amd/cimx/sb800/bootblock.c index 0a339b0..d9a04f0 100644 --- a/src/southbridge/amd/cimx/sb800/bootblock.c +++ b/src/southbridge/amd/cimx/sb800/bootblock.c @@ -97,10 +97,17 @@ static void enable_clocks(void) reg8 &= ~(1 << 1); outb(reg8, 0xCD7); - // Program SB800 MiscCntrl Device_CLK1_sel for 48 MHz (default is 14 MHz) + // Program SB800 MiscClkCntrl register to configure clock output on the + // 14M_25M_48M_OSC ball usually used for the Super-I/O. + // Almost all SIOs need 48 MHz, only the SMSC SCH311x wants 14 MHz, + // which is the SB800's power up default. We could switch back to 14 + // in the mainboard's romstage.c, but then the clock frequency would + // change twice. reg32 = *acpi_mmio; - reg32 &= ~((1 << 0) | (1 << 2)); - reg32 |= 1 << 1; + reg32 &= ~((1 << 2) | (3 << 0)); // enable, 14 MHz (power up default) +#ifndef CONFIG_SUPERIO_WANTS_14MHZ_CLOCK + reg32 |= 2 << 0; // Device_CLK1_sel = 48 MHz +#endif *acpi_mmio = reg32; } diff --git a/src/superio/Kconfig b/src/superio/Kconfig index 00fee97..d0ca249 100644 --- a/src/superio/Kconfig +++ b/src/superio/Kconfig @@ -17,6 +17,9 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +config SUPERIO_WANTS_14MHZ_CLOCK + bool + source src/superio/fintek/Kconfig source src/superio/intel/Kconfig source src/superio/ite/Kconfig diff --git a/src/superio/smsc/Kconfig b/src/superio/smsc/Kconfig index 8d66fc5..1a3b709 100644 --- a/src/superio/smsc/Kconfig +++ b/src/superio/smsc/Kconfig @@ -44,6 +44,7 @@ config SUPERIO_SMSC_MEC1308 bool config SUPERIO_SMSC_SMSCSUPERIO bool + select SUPERIO_WANTS_14MHZ_CLOCK config SUPERIO_SMSC_SIO1036 bool config SUPERIO_SMSC_SCH4037

1 0

New patch to review for coreboot: 8bc75eb Persimmon: Replace tab with space in address in license header
by Paul Menzel 20 Feb '13

20 Feb '13

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2461 -gerrit commit 8bc75ebc4bdb07b132d27929005d8f5bbdce6bda Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Wed Feb 20 13:40:14 2013 +0100 Persimmon: Replace tab with space in address in license header The following commit was too eager replacing spaces with tabs. commit 36abff1dc8e74beafa47ad83de17416681970916 Author: Marc Jones <marcj303(a)gmail.com> Date: Mon Nov 7 23:26:14 2011 -0700 Cleanup Persimmon mainboard whitespace. Reviewed-on: http://review.coreboot.org/427 Fix that with the following command. $ git grep -l 'Floor, Boston, MA'$'\t''02110-1301 USA' | xargs sed -i 's/Boston, MA[ ]*02110-1301 USA/Boston, MA 02110-1301 USA/' Change-Id: Ia118a8c19d94ce1f1048280a0f1d49d447cfa2a7 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/mainboard/amd/persimmon/Kconfig | 2 +- src/mainboard/amd/persimmon/PlatformGnbPcie.c | 2 +- src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h | 2 +- src/mainboard/amd/persimmon/dimmSpd.c | 2 +- src/mainboard/amd/persimmon/get_bus_conf.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mainboard/amd/persimmon/Kconfig b/src/mainboard/amd/persimmon/Kconfig index fd420cb..55d6b0c 100644 --- a/src/mainboard/amd/persimmon/Kconfig +++ b/src/mainboard/amd/persimmon/Kconfig @@ -14,7 +14,7 @@ # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software -# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # if BOARD_AMD_PERSIMMON diff --git a/src/mainboard/amd/persimmon/PlatformGnbPcie.c b/src/mainboard/amd/persimmon/PlatformGnbPcie.c index 42be212..14839c7 100644 --- a/src/mainboard/amd/persimmon/PlatformGnbPcie.c +++ b/src/mainboard/amd/persimmon/PlatformGnbPcie.c @@ -14,7 +14,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #include "AGESA.h" diff --git a/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h b/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h index d88ce92..ec8a6e3 100644 --- a/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h +++ b/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h @@ -14,7 +14,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/amd/persimmon/dimmSpd.c b/src/mainboard/amd/persimmon/dimmSpd.c index d766dbe..fb85d39 100644 --- a/src/mainboard/amd/persimmon/dimmSpd.c +++ b/src/mainboard/amd/persimmon/dimmSpd.c @@ -14,7 +14,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #include "Porting.h" diff --git a/src/mainboard/amd/persimmon/get_bus_conf.c b/src/mainboard/amd/persimmon/get_bus_conf.c index 05f726d..11ec26e 100644 --- a/src/mainboard/amd/persimmon/get_bus_conf.c +++ b/src/mainboard/amd/persimmon/get_bus_conf.c @@ -14,7 +14,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #include <console/console.h>

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New patch to review for coreboot: 31b022f Whitespace: Replace tab character in license text with two spaces
by Paul Menzel 20 Feb '13

20 Feb '13

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2460 -gerrit commit 31b022ff5932281dd8b03d719572690d62518cab Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Wed Feb 20 13:21:20 2013 +0100 Whitespace: Replace tab character in license text with two spaces For whatever reason tabs got inserted in the license header text. Remove one occurrence of that with the following command [1]. $ git grep -l 'MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.'$'\t' | xargs sed -i 's,MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.[ ]*,MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.\ \ ,' [1] http://sed.sourceforge.net/grabbag/tutorials/sedfaq.txt Change-Id: Iaf4ed32c32600c3b23c08f8754815b959b304882 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/arch/armv7/bootblock.inc | 2 +- src/arch/armv7/include/common.h | 2 +- src/arch/armv7/lib/interrupts.c | 2 +- src/cpu/samsung/exynos5-common/pwm.c | 2 +- src/cpu/samsung/exynos5-common/timer.c | 2 +- src/cpu/samsung/exynos5-common/wdt.c | 2 +- src/cpu/samsung/exynos5250/sata.c | 2 +- src/drivers/spi/macronix.c | 2 +- src/drivers/spi/spansion.c | 2 +- src/drivers/spi/stmicro.c | 2 +- src/include/spi_flash.h | 2 +- src/mainboard/aaeon/pfm-540i_revb/irq_tables.c | 2 +- src/mainboard/amd/db800/irq_tables.c | 2 +- src/mainboard/amd/norwich/irq_tables.c | 2 +- src/mainboard/amd/norwich/mainboard.c | 2 +- src/mainboard/amd/persimmon/BiosCallOuts.c | 2 +- src/mainboard/amd/persimmon/BiosCallOuts.h | 2 +- src/mainboard/amd/persimmon/Kconfig | 2 +- src/mainboard/amd/persimmon/PlatformGnbPcie.c | 2 +- src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h | 2 +- src/mainboard/amd/persimmon/agesawrapper.h | 2 +- src/mainboard/amd/persimmon/buildOpts.c | 2 +- src/mainboard/amd/persimmon/dimmSpd.c | 2 +- src/mainboard/amd/persimmon/get_bus_conf.c | 2 +- src/mainboard/amd/persimmon/mptable.c | 2 +- src/mainboard/artecgroup/dbe61/irq_tables.c | 2 +- src/mainboard/artecgroup/dbe61/mainboard.c | 2 +- src/mainboard/artecgroup/dbe61/romstage.c | 2 +- src/mainboard/artecgroup/dbe61/spd_table.h | 2 +- src/mainboard/bachmann/ot200/mainboard.c | 2 +- src/mainboard/traverse/geos/irq_tables.c | 2 +- src/mainboard/traverse/geos/mainboard.c | 2 +- src/northbridge/amd/gx2/grphinit.c | 2 +- src/northbridge/amd/gx2/northbridge.c | 2 +- src/northbridge/amd/gx2/northbridgeinit.c | 2 +- src/northbridge/amd/lx/northbridge.h | 2 +- src/northbridge/amd/lx/raminit.c | 2 +- src/southbridge/amd/cs5536/cs5536.c | 2 +- src/southbridge/amd/cs5536/cs5536.h | 2 +- src/southbridge/amd/cs5536/ide.c | 2 +- src/southbridge/amd/cs5536/smbus.h | 2 +- 41 files changed, 41 insertions(+), 41 deletions(-) diff --git a/src/arch/armv7/bootblock.inc b/src/arch/armv7/bootblock.inc index da063a6..c647834 100644 --- a/src/arch/armv7/bootblock.inc +++ b/src/arch/armv7/bootblock.inc @@ -20,7 +20,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/arch/armv7/include/common.h b/src/arch/armv7/include/common.h index 87ae8cf..c025813 100644 --- a/src/arch/armv7/include/common.h +++ b/src/arch/armv7/include/common.h @@ -12,7 +12,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/arch/armv7/lib/interrupts.c b/src/arch/armv7/lib/interrupts.c index d07442a..4ac599d 100644 --- a/src/arch/armv7/lib/interrupts.c +++ b/src/arch/armv7/lib/interrupts.c @@ -26,7 +26,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/cpu/samsung/exynos5-common/pwm.c b/src/cpu/samsung/exynos5-common/pwm.c index f7c1fb1..da465d9 100644 --- a/src/cpu/samsung/exynos5-common/pwm.c +++ b/src/cpu/samsung/exynos5-common/pwm.c @@ -13,7 +13,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/cpu/samsung/exynos5-common/timer.c b/src/cpu/samsung/exynos5-common/timer.c index b47da55..6436da2 100644 --- a/src/cpu/samsung/exynos5-common/timer.c +++ b/src/cpu/samsung/exynos5-common/timer.c @@ -14,7 +14,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/cpu/samsung/exynos5-common/wdt.c b/src/cpu/samsung/exynos5-common/wdt.c index 94acc1e..6f435e5 100644 --- a/src/cpu/samsung/exynos5-common/wdt.c +++ b/src/cpu/samsung/exynos5-common/wdt.c @@ -12,7 +12,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/cpu/samsung/exynos5250/sata.c b/src/cpu/samsung/exynos5250/sata.c index b3e464e..d32c612 100644 --- a/src/cpu/samsung/exynos5250/sata.c +++ b/src/cpu/samsung/exynos5250/sata.c @@ -11,7 +11,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/drivers/spi/macronix.c b/src/drivers/spi/macronix.c index 910b874..bbc3704 100644 --- a/src/drivers/spi/macronix.c +++ b/src/drivers/spi/macronix.c @@ -20,7 +20,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/drivers/spi/spansion.c b/src/drivers/spi/spansion.c index 37bf5a8..6dd6df9 100644 --- a/src/drivers/spi/spansion.c +++ b/src/drivers/spi/spansion.c @@ -16,7 +16,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/drivers/spi/stmicro.c b/src/drivers/spi/stmicro.c index b741d30..9aa31cf 100644 --- a/src/drivers/spi/stmicro.c +++ b/src/drivers/spi/stmicro.c @@ -18,7 +18,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h index 6fd9f13..fe48d3b 100644 --- a/src/include/spi_flash.h +++ b/src/include/spi_flash.h @@ -12,7 +12,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/aaeon/pfm-540i_revb/irq_tables.c b/src/mainboard/aaeon/pfm-540i_revb/irq_tables.c index e8a8686..e4cf8ac 100644 --- a/src/mainboard/aaeon/pfm-540i_revb/irq_tables.c +++ b/src/mainboard/aaeon/pfm-540i_revb/irq_tables.c @@ -10,7 +10,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/amd/db800/irq_tables.c b/src/mainboard/amd/db800/irq_tables.c index fb50b57..984fe0e 100644 --- a/src/mainboard/amd/db800/irq_tables.c +++ b/src/mainboard/amd/db800/irq_tables.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/amd/norwich/irq_tables.c b/src/mainboard/amd/norwich/irq_tables.c index 3f7804d..04baccf 100644 --- a/src/mainboard/amd/norwich/irq_tables.c +++ b/src/mainboard/amd/norwich/irq_tables.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/amd/norwich/mainboard.c b/src/mainboard/amd/norwich/mainboard.c index e3bea15..9002a57 100644 --- a/src/mainboard/amd/norwich/mainboard.c +++ b/src/mainboard/amd/norwich/mainboard.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/amd/persimmon/BiosCallOuts.c b/src/mainboard/amd/persimmon/BiosCallOuts.c index 4db6e75..9bad4f4 100644 --- a/src/mainboard/amd/persimmon/BiosCallOuts.c +++ b/src/mainboard/amd/persimmon/BiosCallOuts.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/amd/persimmon/BiosCallOuts.h b/src/mainboard/amd/persimmon/BiosCallOuts.h index 09dc436..25e5656 100644 --- a/src/mainboard/amd/persimmon/BiosCallOuts.h +++ b/src/mainboard/amd/persimmon/BiosCallOuts.h @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/amd/persimmon/Kconfig b/src/mainboard/amd/persimmon/Kconfig index 7939d8d..fd420cb 100644 --- a/src/mainboard/amd/persimmon/Kconfig +++ b/src/mainboard/amd/persimmon/Kconfig @@ -9,7 +9,7 @@ # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License diff --git a/src/mainboard/amd/persimmon/PlatformGnbPcie.c b/src/mainboard/amd/persimmon/PlatformGnbPcie.c index f75d258..42be212 100644 --- a/src/mainboard/amd/persimmon/PlatformGnbPcie.c +++ b/src/mainboard/amd/persimmon/PlatformGnbPcie.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h b/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h index 89334d9..d88ce92 100644 --- a/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h +++ b/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/amd/persimmon/agesawrapper.h b/src/mainboard/amd/persimmon/agesawrapper.h index 7babd58..ba47c53 100644 --- a/src/mainboard/amd/persimmon/agesawrapper.h +++ b/src/mainboard/amd/persimmon/agesawrapper.h @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/amd/persimmon/buildOpts.c b/src/mainboard/amd/persimmon/buildOpts.c index 389e1d4..c6383a2 100644 --- a/src/mainboard/amd/persimmon/buildOpts.c +++ b/src/mainboard/amd/persimmon/buildOpts.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/amd/persimmon/dimmSpd.c b/src/mainboard/amd/persimmon/dimmSpd.c index 1343ae9..d766dbe 100644 --- a/src/mainboard/amd/persimmon/dimmSpd.c +++ b/src/mainboard/amd/persimmon/dimmSpd.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/amd/persimmon/get_bus_conf.c b/src/mainboard/amd/persimmon/get_bus_conf.c index 1d5842a..05f726d 100644 --- a/src/mainboard/amd/persimmon/get_bus_conf.c +++ b/src/mainboard/amd/persimmon/get_bus_conf.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/amd/persimmon/mptable.c b/src/mainboard/amd/persimmon/mptable.c index d0c31f0..fd03058 100644 --- a/src/mainboard/amd/persimmon/mptable.c +++ b/src/mainboard/amd/persimmon/mptable.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/artecgroup/dbe61/irq_tables.c b/src/mainboard/artecgroup/dbe61/irq_tables.c index f37ed18..4481619 100644 --- a/src/mainboard/artecgroup/dbe61/irq_tables.c +++ b/src/mainboard/artecgroup/dbe61/irq_tables.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/artecgroup/dbe61/mainboard.c b/src/mainboard/artecgroup/dbe61/mainboard.c index 07fd58c..804b918 100644 --- a/src/mainboard/artecgroup/dbe61/mainboard.c +++ b/src/mainboard/artecgroup/dbe61/mainboard.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of -* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c index 61bd03e..4961fe8 100644 --- a/src/mainboard/artecgroup/dbe61/romstage.c +++ b/src/mainboard/artecgroup/dbe61/romstage.c @@ -10,7 +10,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/artecgroup/dbe61/spd_table.h b/src/mainboard/artecgroup/dbe61/spd_table.h index 73c777c..110e5f9 100644 --- a/src/mainboard/artecgroup/dbe61/spd_table.h +++ b/src/mainboard/artecgroup/dbe61/spd_table.h @@ -10,7 +10,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/bachmann/ot200/mainboard.c b/src/mainboard/bachmann/ot200/mainboard.c index d846ffb..2b1fe83 100644 --- a/src/mainboard/bachmann/ot200/mainboard.c +++ b/src/mainboard/bachmann/ot200/mainboard.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/traverse/geos/irq_tables.c b/src/mainboard/traverse/geos/irq_tables.c index fb86543..3541cac 100644 --- a/src/mainboard/traverse/geos/irq_tables.c +++ b/src/mainboard/traverse/geos/irq_tables.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/mainboard/traverse/geos/mainboard.c b/src/mainboard/traverse/geos/mainboard.c index 96f6f08..7bcc396 100644 --- a/src/mainboard/traverse/geos/mainboard.c +++ b/src/mainboard/traverse/geos/mainboard.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/northbridge/amd/gx2/grphinit.c b/src/northbridge/amd/gx2/grphinit.c index b333c22..38b8645 100644 --- a/src/northbridge/amd/gx2/grphinit.c +++ b/src/northbridge/amd/gx2/grphinit.c @@ -10,7 +10,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c index ee285f1..9952374 100644 --- a/src/northbridge/amd/gx2/northbridge.c +++ b/src/northbridge/amd/gx2/northbridge.c @@ -10,7 +10,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c index 09f8b00..3e6cb29 100644 --- a/src/northbridge/amd/gx2/northbridgeinit.c +++ b/src/northbridge/amd/gx2/northbridgeinit.c @@ -10,7 +10,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/northbridge/amd/lx/northbridge.h b/src/northbridge/amd/lx/northbridge.h index 99ea284..d9bb566 100644 --- a/src/northbridge/amd/lx/northbridge.h +++ b/src/northbridge/amd/lx/northbridge.h @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/northbridge/amd/lx/raminit.c b/src/northbridge/amd/lx/raminit.c index f5e2c69..8a7187c 100644 --- a/src/northbridge/amd/lx/raminit.c +++ b/src/northbridge/amd/lx/raminit.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c index 0c0368f..643e9ba 100644 --- a/src/southbridge/amd/cs5536/cs5536.c +++ b/src/southbridge/amd/cs5536/cs5536.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/southbridge/amd/cs5536/cs5536.h b/src/southbridge/amd/cs5536/cs5536.h index 8fa24da..aa354e3 100644 --- a/src/southbridge/amd/cs5536/cs5536.h +++ b/src/southbridge/amd/cs5536/cs5536.h @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/southbridge/amd/cs5536/ide.c b/src/southbridge/amd/cs5536/ide.c index c4cc652..906bba8 100644 --- a/src/southbridge/amd/cs5536/ide.c +++ b/src/southbridge/amd/cs5536/ide.c @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License diff --git a/src/southbridge/amd/cs5536/smbus.h b/src/southbridge/amd/cs5536/smbus.h index 318a727..874966d 100644 --- a/src/southbridge/amd/cs5536/smbus.h +++ b/src/southbridge/amd/cs5536/smbus.h @@ -9,7 +9,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License

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Patch set updated for coreboot: d1adeaa AMD Fam15tn: dimmSpd.c: Introduce Kconfig variable `SMBUS0_BASE_ADDRESS`
by Paul Menzel 20 Feb '13

20 Feb '13

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2459 -gerrit commit d1adeaa338ff55999d09bab19c7292b9c764de3b Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Tue Feb 19 14:46:31 2013 +0100 AMD Fam15tn: dimmSpd.c: Introduce Kconfig variable `SMBUS0_BASE_ADDRESS` For AMD Inagua, the following two commits commit 01f7ab93359ae0fee5784d35effbcbe0b596df18 Author: Kerry Sheh <shekairui(a)gmail.com> Date: Thu Jan 19 13:18:36 2012 +0800 Inagua: Synchronize AMD/inagua mainboard. Reviewed-on: http://review.coreboot.org/542 and commit d91c9b7e3cb9fdaeb9399a21907996130f3120bb Author: efdesign98 <efdesign98(a)gmail.com> Date: Thu Sep 15 10:59:55 2011 -0600 AMD Inagua platform updates Reviewed-on: http://review.coreboot.org/136 replaced the constant, `iobase` is set to, by the define `SMBUS0_BASE_ADDRESS` from `OEM.h`. Do the something similar for AMD Fam15tn used by AMD Parmer and Thatcher. Though SB900 CIMX does not ship this header file. Therefore set it in Kconfig. Change-Id: I70dbf5b398e8abae1c20dc401f547abfe5b37a69 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/northbridge/amd/agesa/family15tn/Kconfig | 4 ++++ src/northbridge/amd/agesa/family15tn/dimmSpd.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/src/northbridge/amd/agesa/family15tn/Kconfig b/src/northbridge/amd/agesa/family15tn/Kconfig index 5f08593..3b67ada 100644 --- a/src/northbridge/amd/agesa/family15tn/Kconfig +++ b/src/northbridge/amd/agesa/family15tn/Kconfig @@ -39,4 +39,8 @@ config MMCONF_BUS_NUMBER int default 64 +config SMBUS0_BASE_ADDRESS + hex + default 0xB00 + endif diff --git a/src/northbridge/amd/agesa/family15tn/dimmSpd.c b/src/northbridge/amd/agesa/family15tn/dimmSpd.c index 8b62a39..6552da2 100644 --- a/src/northbridge/amd/agesa/family15tn/dimmSpd.c +++ b/src/northbridge/amd/agesa/family15tn/dimmSpd.c @@ -154,7 +154,7 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA [info->SocketId] [info->MemChannelId] [info->DimmId]; if (spdAddress == 0) return AGESA_ERROR; - ioBase = 0xB00; + ioBase = CONFIG_SMBUS0_BASE_ADDRESS; setupFch (ioBase); return readspd (ioBase, spdAddress, (void *) info->Buffer, 128); }

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coreboot February 2013