coreboot May 2010

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[PATCH] Support for HP DL165g6 Fam10
by Arne Georg Gleditsch 26 May '10

26 May '10

Hi, Attached is a patch implementing support for the HP DL165g6 mainboard (with fam10 CPUs). It is based on the code for the DL145 and SerialICE-observation of the vendor ROM. It touches superio/serverengines/pilot/pilot_early_init.c, which is also used by the DL145 board. I belive the changes to be harmless, but it would be good if someone with the board in hand could check it out. As seems to also be the case with the DL145 board, the Matrox VGA ROM needs to be loaded by SeaBIOS. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch(a)numascale.com> -- Arne.

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Indtast Bcc Will coreboot work on my machine?
by anders＠jenbo.dk 26 May '10

26 May '10

As your BIOS is not socketed it will be difficult to recover your board if you flash it with non working code. The P945 and ICH8 are currently not supported. But documentation should be available for some one to write the needed code. Your super I/O is supported so you would have debug from the start. Mvh Anders ----- Reply message ----- Fra: "am kara" <am_kara(a)yahoo.com> Dato: tir., maj 25, 2010 11:52 Emne: [coreboot] Will coreboot work on my machine? Til: <coreboot(a)coreboot.org>

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Re: [coreboot] [PATCH] cleanup CS5535/CS5536 specific init in GX2 code
by Nils 26 May '10

26 May '10

Hi stefan, On May 14 you wrote: > >This patch should fix the hda interrupt lost problem on the Wyse S50 > > >

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[commit] r5589 - in trunk/src: mainboard/amd/rumba mainboard/lippert/frontrunner mainboard/olpc/btest mainboard/olpc/rev_a mainboard/wyse/s50 northbridge/amd/gx2 southbridge/amd/cs5535 southbridge/...
by repository service 26 May '10

26 May '10

Author: stepan Date: Wed May 26 01:06:42 2010 New Revision: 5589 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5589 Log: Move CS5535 specific setup from GX2 driver to CS5535. To apply this patch you need to cp src/northbridge/amd/gx2/chipsetinit.c src/southbridge/amd/cs5535/ Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Nils Jacobs <njacobs8(a)hetnet.nl> Added: trunk/src/southbridge/amd/cs5535/chipsetinit.c - copied, changed from r5546, trunk/src/northbridge/amd/gx2/chipsetinit.c Deleted: trunk/src/northbridge/amd/gx2/chipsetinit.c Modified: trunk/src/mainboard/amd/rumba/devicetree.cb trunk/src/mainboard/lippert/frontrunner/devicetree.cb trunk/src/mainboard/olpc/btest/devicetree.cb trunk/src/mainboard/olpc/rev_a/devicetree.cb trunk/src/mainboard/wyse/s50/devicetree.cb trunk/src/northbridge/amd/gx2/Makefile.inc trunk/src/northbridge/amd/gx2/chip.h trunk/src/northbridge/amd/gx2/northbridge.c trunk/src/northbridge/amd/gx2/northbridge.h trunk/src/southbridge/amd/cs5535/Makefile.inc trunk/src/southbridge/amd/cs5535/chip.h trunk/src/southbridge/amd/cs5536/cs5536.c Modified: trunk/src/mainboard/amd/rumba/devicetree.cb ============================================================================== --- trunk/src/mainboard/amd/rumba/devicetree.cb Tue May 25 19:09:05 2010 (r5588) +++ trunk/src/mainboard/amd/rumba/devicetree.cb Wed May 26 01:06:42 2010 (r5589) @@ -1,5 +1,4 @@ chip northbridge/amd/gx2 - register "setupflash" = "0" #register "irqmap" = "0xaa5b" device lapic_cluster 0 on chip cpu/amd/model_gx2 Modified: trunk/src/mainboard/lippert/frontrunner/devicetree.cb ============================================================================== --- trunk/src/mainboard/lippert/frontrunner/devicetree.cb Tue May 25 19:09:05 2010 (r5588) +++ trunk/src/mainboard/lippert/frontrunner/devicetree.cb Wed May 26 01:06:42 2010 (r5589) @@ -1,9 +1,15 @@ chip northbridge/amd/gx2 - register "setupflash" = "0" + device lapic_cluster 0 on + chip cpu/amd/model_gx2 + device lapic 0 on end + end + end + #register "irqmap" = "0xaa5b" device pci_domain 0 on device pci 0.0 on end chip southbridge/amd/cs5535 + register "setupflash" = "0" device pci 12.0 on device pci 12.1 off end # SMI device pci 12.2 on end # IDE @@ -12,9 +18,5 @@ end end end - - chip cpu/amd/model_gx2 - end - end Modified: trunk/src/mainboard/olpc/btest/devicetree.cb ============================================================================== --- trunk/src/mainboard/olpc/btest/devicetree.cb Tue May 25 19:09:05 2010 (r5588) +++ trunk/src/mainboard/olpc/btest/devicetree.cb Wed May 26 01:06:42 2010 (r5589) @@ -1,6 +1,5 @@ chip northbridge/amd/gx2 register "irqmap" = "0xaa5b" - register "setupflash" = "0" device lapic_cluster 0 on chip cpu/amd/model_gx2 device lapic 0 on end Modified: trunk/src/mainboard/olpc/rev_a/devicetree.cb ============================================================================== --- trunk/src/mainboard/olpc/rev_a/devicetree.cb Tue May 25 19:09:05 2010 (r5588) +++ trunk/src/mainboard/olpc/rev_a/devicetree.cb Wed May 26 01:06:42 2010 (r5589) @@ -1,6 +1,5 @@ chip northbridge/amd/gx2 register "irqmap" = "0xaa5b" - register "setupflash" = "0" device lapic_cluster 0 on chip cpu/amd/model_gx2 device lapic 0 on end Modified: trunk/src/mainboard/wyse/s50/devicetree.cb ============================================================================== --- trunk/src/mainboard/wyse/s50/devicetree.cb Tue May 25 19:09:05 2010 (r5588) +++ trunk/src/mainboard/wyse/s50/devicetree.cb Wed May 26 01:06:42 2010 (r5589) @@ -21,7 +21,7 @@ chip northbridge/amd/gx2 register "irqmap" = "0xaa5b" - register "setupflash" = "0" + device lapic_cluster 0 on chip cpu/amd/model_gx2 device lapic 0 on end Modified: trunk/src/northbridge/amd/gx2/Makefile.inc ============================================================================== --- trunk/src/northbridge/amd/gx2/Makefile.inc Tue May 25 19:09:05 2010 (r5588) +++ trunk/src/northbridge/amd/gx2/Makefile.inc Wed May 26 01:06:42 2010 (r5589) @@ -1,4 +1,3 @@ driver-y += northbridge.o obj-y += northbridgeinit.o -obj-y += chipsetinit.o obj-y += grphinit.o Modified: trunk/src/northbridge/amd/gx2/chip.h ============================================================================== --- trunk/src/northbridge/amd/gx2/chip.h Tue May 25 19:09:05 2010 (r5588) +++ trunk/src/northbridge/amd/gx2/chip.h Wed May 26 01:06:42 2010 (r5589) @@ -1,7 +1,6 @@ struct northbridge_amd_gx2_config { uint16_t irqmap; - int setupflash; }; extern struct chip_operations northbridge_amd_gx2_ops; Modified: trunk/src/northbridge/amd/gx2/northbridge.c ============================================================================== --- trunk/src/northbridge/amd/gx2/northbridge.c Tue May 25 19:09:05 2010 (r5588) +++ trunk/src/northbridge/amd/gx2/northbridge.c Wed May 26 01:06:42 2010 (r5589) @@ -486,13 +486,12 @@ /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { - struct northbridge_amd_gx2_config *nb = (struct northbridge_amd_gx2_config *)dev->chip_info; u32 tomk; printk(BIOS_DEBUG, "DEVICE_PATH_PCI_DOMAIN\n"); /* cpubug MUST be called before setup_gx2(), so we force the issue here */ northbridgeinit(); cpubug(); - gx2_chipsetinit(nb); + chipsetinit(); setup_gx2(); do_vsmbios(); graphics_init(); Modified: trunk/src/northbridge/amd/gx2/northbridge.h ============================================================================== --- trunk/src/northbridge/amd/gx2/northbridge.h Tue May 25 19:09:05 2010 (r5588) +++ trunk/src/northbridge/amd/gx2/northbridge.h Wed May 26 01:06:42 2010 (r5589) @@ -6,7 +6,6 @@ #else unsigned int gx2_scan_root_bus(device_t root, unsigned int max); int sizeram(void); -void gx2_chipsetinit (struct northbridge_amd_gx2_config *nb); void graphics_init(void); void northbridgeinit(void); #endif Modified: trunk/src/southbridge/amd/cs5535/Makefile.inc ============================================================================== --- trunk/src/southbridge/amd/cs5535/Makefile.inc Tue May 25 19:09:05 2010 (r5588) +++ trunk/src/southbridge/amd/cs5535/Makefile.inc Wed May 26 01:06:42 2010 (r5589) @@ -1,3 +1,4 @@ driver-y += cs5535.o #driver-y += cs5535_pci.o #driver-y += cs5535_ide.o +obj-y += chipsetinit.o Modified: trunk/src/southbridge/amd/cs5535/chip.h ============================================================================== --- trunk/src/southbridge/amd/cs5535/chip.h Tue May 25 19:09:05 2010 (r5588) +++ trunk/src/southbridge/amd/cs5535/chip.h Wed May 26 01:06:42 2010 (r5589) @@ -4,7 +4,7 @@ extern struct chip_operations southbridge_amd_cs5535_ops; struct southbridge_amd_cs5535_config { - int none; + int setupflash; }; #endif /* _SOUTHBRIDGE_AMD_CS5536 */ Copied and modified: trunk/src/southbridge/amd/cs5535/chipsetinit.c (from r5546, trunk/src/northbridge/amd/gx2/chipsetinit.c) ============================================================================== --- trunk/src/northbridge/amd/gx2/chipsetinit.c Fri May 14 11:56:46 2010 (r5546, copy source) +++ trunk/src/southbridge/amd/cs5535/chipsetinit.c Wed May 26 01:06:42 2010 (r5589) @@ -8,10 +8,12 @@ #include <string.h> #include <bitops.h> #include "chip.h" -#include "northbridge.h" +#include "northbridge/amd/gx2/northbridge.h" #include <cpu/amd/gx2def.h> #include <cpu/x86/msr.h> #include <cpu/x86/cache.h> +#include "southbridge/amd/cs5535/cs5535.h" +// This code uses some cs5536 includes because cs5535 includes are empty: #include "southbridge/amd/cs5536/cs5536.h" /* the structs in this file only set msr.lo. But ... that may not always be true */ @@ -47,18 +49,6 @@ { 0, {.hi=0, .lo=0x000000000} } }; -/* 5536 Clock Gating*/ -static struct msrinit CS5536_CLOCK_GATING_TABLE[] = { -/* MSR Setting*/ - { GLIU_SB_GLD_MSR_PM, {.hi=0, .lo=0x000000004} }, - { GLPCI_SB_GLD_MSR_PM, {.hi=0, .lo=0x000000005} }, - { GLCP_SB_GLD_MSR_PM, {.hi=0, .lo=0x000000004} }, - { MDD_SB_GLD_MSR_PM, {.hi=0, .lo=0x050554111} }, /* SMBus clock gating errata (PBZ 2226 & SiBZ 3977) */ - { ATA_SB_GLD_MSR_PM, {.hi=0, .lo=0x000000005} }, - { AC97_SB_GLD_MSR_PM, {.hi=0, .lo=0x000000005} }, - { 0, {.hi=0, .lo=0x000000000} } -}; - #ifdef UNUSED_CODE struct acpiinit { unsigned short ioreg; @@ -81,19 +71,7 @@ {PM_WKXD, 0x0000000A0, 4}, {0,0,0} }; -#endif -/* return 1 if we are a 5536-based system */ -static int is_5536(void) -{ - msr_t msr; - msr = rdmsr(GLIU_SB_GLD_MSR_CAP); - msr.lo >>= 20; - printk(BIOS_DEBUG, "is_5536: msr.lo is 0x%x(==5 means 5536)\n", msr.lo&0xf); - return ((msr.lo&0xf) == 5); -} - -#ifdef UNUSED_CODE /***************************************************************************** * * pmChipsetInit @@ -256,9 +234,6 @@ unsigned long msrnum; unsigned long totalmem; - if (is_5536()) - return; - /* SWASIF for A1 DMA */ /* Set all memory to "just above systop" PCI so DMA will work */ @@ -279,18 +254,33 @@ } void -gx2_chipsetinit (struct northbridge_amd_gx2_config *nb) +chipsetinit(void) { + device_t dev; + struct southbridge_amd_cs5535_config *sb; msr_t msr; struct msrinit *csi; int i; unsigned long msrnum; + dev = dev_find_device(PCI_VENDOR_ID_AMD, + PCI_DEVICE_ID_NS_CS5535_ISA, 0); + + if (!dev) { + printk(BIOS_ERR, "CS5535 not found.\n"); + return; + } + + sb = (struct southbridge_amd_cs5535_config *)dev->chip_info; + + if (!sb) { + printk(BIOS_ERR, "CS5535 configuration not found.\n"); + return; + } + outb( P80_CHIPSET_INIT, 0x80); ChipsetGeodeLinkInit(); - printk(BIOS_DEBUG, "Companion is a %s\n", is_5536()?"CS5536":"CS5535"); - #ifdef UNUSED_CODE /* we hope NEVER to be in coreboot when S3 resumes if (! IsS3Resume()) */ @@ -310,15 +300,13 @@ } #endif - if (!is_5536()) { - /* Setup USB. Need more details. #118.18 */ - msrnum = MSR_SB_USB1 + 8; - msr.lo = 0x00012090; - msr.hi = 0; - wrmsr(msrnum, msr); - msrnum = MSR_SB_USB2 + 8; - wrmsr(msrnum, msr); - } + /* Setup USB. Need more details. #118.18 */ + msrnum = MSR_SB_USB1 + 8; + msr.lo = 0x00012090; + msr.hi = 0; + wrmsr(msrnum, msr); + msrnum = MSR_SB_USB2 + 8; + wrmsr(msrnum, msr); /* set hd IRQ */ outl (GPIOL_2_SET, GPIOL_INPUT_ENABLE); @@ -340,10 +328,7 @@ /* Set up Master Configuration Register */ /* If 5536, use same master config settings as 5535, except for OHCI MSRs */ - if (is_5536()) - i = 2; - else - i = 0; + i = 0; csi = &SB_MASTER_CONF_TABLE[i]; for(; csi->msrnum; csi++){ @@ -354,19 +339,16 @@ /* Flash Setup */ printk(BIOS_INFO, "%sDOING ChipsetFlashSetup()!\n", - nb->setupflash ? "" : "NOT "); + sb->setupflash ? "" : "NOT "); - if (nb->setupflash) + if (sb->setupflash) ChipsetFlashSetup(); /* Set up Hardware Clock Gating */ /* if (getnvram(TOKEN_SB_CLK_GATE) != TVALUE_DISABLE) */ { - if (is_5536()) - csi = CS5536_CLOCK_GATING_TABLE; - else - csi = CS5535_CLOCK_GATING_TABLE; + csi = CS5535_CLOCK_GATING_TABLE; for(; csi->msrnum; csi++){ msr.lo = csi->msr.lo; Modified: trunk/src/southbridge/amd/cs5536/cs5536.c ============================================================================== --- trunk/src/southbridge/amd/cs5536/cs5536.c Tue May 25 19:09:05 2010 (r5588) +++ trunk/src/southbridge/amd/cs5536/cs5536.c Wed May 26 01:06:42 2010 (r5589) @@ -518,9 +518,6 @@ * * Called from northbridge init (Pre-VSA). * - * NOTE! This function is NOT called if the CS5536 is combined with - * an AMD Geode GX2. It's ONLY used on Geode LX based systems. - * ****************************************************************************/ void chipsetinit(void) {

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Re: [coreboot] Geode db800 vs Wyse S50
by Oliver Schinagl 25 May '10

25 May '10

On 05/25/10 17:58, anders(a)jenbo.dk wrote: > Is probably IDE, verrrrryyy unlikely its in the BIOS Rom. > > Mvh Anders I'll check the rom as advised on the list; but I wouldn't be supprised if it was; the IDE port is free and unused > > ----- Reply message ----- > Fra: "Oliver Schinagl" <oliver(a)schinagl.nl> > Dato: tir., maj 25, 2010 14:01 > Emne: [coreboot] Geode db800 vs Wyse S50 > Til: <coreboot(a)coreboot.org> > > On 05/25/10 13:07, Joseph Smith wrote: > > > > > > On Tue, 25 May 2010 10:45:47 +0200, Oliver Schinagl <oliver(a)schinagl.nl> > > wrote: > > > >> On 05/25/10 00:16, Joseph Smith wrote: > >> > >>> On 05/24/2010 04:36 PM, Nils wrote: > >>> > >>>> Hi Oliver, > >>>> > >>>> Oliver wrote: > >>>> > >>>>> I just found http://www.coreboot.org/AMD_Geode_Porting_Guide over on > >>>>> the wiki and was wondering if that was maybe slightly outdated > or not > >>>>> needed for a Wyse S10? The S10 uses similar hardware as the S50. > >>>>> > >>>> The wiki page is a little outdated. > >>>> > >>>>> Actually the only difference is that the S50 has 128kb onboard > flash, > >>>>> so minor difference. > >>>>> > >>>> Are you sure ? > >>>> Joseph reported that his S30 uses a cs5535 instead of the cs5536 > on the > >>>> S50. > >>>> > >>> Yes my S30 has a GX2 and cs5535.From what I have read both the S30 and > >>> S50 are upgradable to the S10. It is just a bios and software upgrade. > >>> > >>> On another note I just got a V30L, sweet little VIA C& machine.... > >>> > >>> Hope that helps. > >>> > >>> > >> Hmm; I thought that the S10 was the most basic version :) > >> > >> > >> Processor: AMD Geode GX 366MHz > >> Memory: 0 Flash/128MB RAM > >> > >> > > So S10 has 0 flash??? Does it just PXE boot? > > > > > > Well it has a 2MB Bios chip, so I suppose the Wyse OS lives in the > biosflash area? > > Other then that, it only supports RDP, ICA int he Wyse OS; booting it > does from the following 3 options, IDE, PXE, USB. I'll take a foto of > the bios, though it really isn't interesting at all. > >> As the S50 reads: > >> Processor: AMD Geode GX 366MHz > >> Memory: 128MB Flash/256MB RAM > >> > >> btw they use a gx in the spec instead of gx2; odd. > >> > >> > > Yes you will see that alot, the GX is actually the sucsesor to the GX1. > > Others will call it GX2 for clarification (me :-)). > > > Ah! ok so there was GX1; and GX, but we call GX GX2 to make it sound as > a successor, as it is. I know linux uses GX2 in it's naming. > >> The S30 lists the same btw: > >> > >> Processor: AMD Geode GX 366MHz > >> Memory: 64MB Flash/128MB RAM > >> > >> > > S30 comes with different flash/ram combos. > > Mine has 32MB Flash/ 64MB RAM > > > I wonder where the flash is located at, in the bios chip, or if it's an > IDE devices 'flash' thing. > >> > >> So besides the tool outputs etc etc I posted earlier; I'll take > loads of > >> pics. Do I need to pry off the CPUs heatsink for a pic of that? Since I > >> don't know how to best re-attach it; id' like to postpone that. > >> > >> > > Yes I think this is a great idea :-) No need to take the heatsink > off, we > > already know what the CPU is. I propose a new wiki page "Wyse Thin > Clients" > > That we can upload pics too, and information about each system. I > have 3 or > > 4 different models so a central info point would be cool. I would be > glad > > to take lots of pics too. > > > Ok I'll do my best to make some nice pics of front/back of the pcb and > some of the chips. > > > >> Also not having a GX VSA is kinda really off-putting; it basically > means > >> I can't use coreboot on this thing yet? How did people do it on the S30 > >> and more specifically the S50? The S50 does list as being > supported, how? > >> > >> > > Don't worry about VSA too much, I am sure we can up with a solution > when we > > get to that point. > > > > > Ok. Atm I have compiled everything and it seemed to build after some > tweaking fine; using the Wyse S50 mainboard. > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot > >

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[commit] r5586 - in trunk/src: console cpu/intel/model_106cx cpu/intel/model_6bx cpu/intel/model_6ex cpu/intel/model_6fx include lib mainboard/getac/p470 mainboard/gigabyte/ga_2761gxdk mainboard/gi...
by repository service 25 May '10

25 May '10

Author: stepan Date: Tue May 25 18:17:45 2010 New Revision: 5586 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5586 Log: Long ago we agreed on kicking the _direct appendix because everything in coreboot is direct. This patch does it. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Added: trunk/src/console/usbdebug_console.c - copied, changed from r5583, trunk/src/console/usbdebug_direct_console.c trunk/src/include/usbdebug.h - copied unchanged from r5585, trunk/src/include/usbdebug_direct.h trunk/src/lib/usbdebug.c - copied, changed from r5585, trunk/src/lib/usbdebug_direct.c trunk/src/pc80/usbdebug_serial.c - copied, changed from r5583, trunk/src/pc80/usbdebug_direct_serial.c trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug.c - copied unchanged from r5583, trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug_direct.c trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug.c - copied unchanged from r5583, trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug_direct.c trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c - copied unchanged from r5583, trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug.c - copied unchanged from r5583, trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug_direct.c Deleted: trunk/src/console/usbdebug_direct_console.c trunk/src/include/usbdebug_direct.h trunk/src/lib/usbdebug_direct.c trunk/src/pc80/usbdebug_direct_serial.c trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug_direct.c trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug_direct.c trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug_direct.c Modified: trunk/src/console/Makefile.inc trunk/src/cpu/intel/model_106cx/model_106cx_init.c trunk/src/cpu/intel/model_6bx/model_6bx_init.c trunk/src/cpu/intel/model_6ex/model_6ex_init.c trunk/src/cpu/intel/model_6fx/model_6fx_init.c trunk/src/lib/Makefile.inc trunk/src/mainboard/getac/p470/romstage.c trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c trunk/src/mainboard/gigabyte/m57sli/romstage.c trunk/src/mainboard/intel/d945gclf/romstage.c trunk/src/mainboard/kontron/986lcd-m/romstage.c trunk/src/mainboard/msi/ms7260/romstage.c trunk/src/mainboard/msi/ms9652_fam10/romstage.c trunk/src/mainboard/nvidia/l1_2pvv/romstage.c trunk/src/mainboard/roda/rk886ex/romstage.c trunk/src/mainboard/tyan/s2912/romstage.c trunk/src/mainboard/tyan/s2912_fam10/romstage.c trunk/src/southbridge/amd/sb600/sb600_usb.c trunk/src/southbridge/amd/sb700/sb700_usb.c trunk/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c trunk/src/southbridge/nvidia/mcp55/mcp55_usb2.c trunk/src/southbridge/sis/sis966/sis966_usb2.c Modified: trunk/src/console/Makefile.inc ============================================================================== --- trunk/src/console/Makefile.inc Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/console/Makefile.inc Tue May 25 18:17:45 2010 (r5586) @@ -10,7 +10,7 @@ initobj-$(CONFIG_USE_DCACHE_RAM) += console.o driver-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.o -driver-$(CONFIG_USBDEBUG_DIRECT) += usbdebug_direct_console.o +driver-$(CONFIG_USBDEBUG_DIRECT) += usbdebug_console.o driver-$(CONFIG_CONSOLE_VGA) += vga_console.o driver-$(CONFIG_CONSOLE_BTEXT) += btext_console.o driver-$(CONFIG_CONSOLE_BTEXT) += font-8x16.o Copied and modified: trunk/src/console/usbdebug_console.c (from r5583, trunk/src/console/usbdebug_direct_console.c) ============================================================================== --- trunk/src/console/usbdebug_direct_console.c Mon May 24 17:51:15 2010 (r5583, copy source) +++ trunk/src/console/usbdebug_console.c Tue May 25 18:17:45 2010 (r5586) @@ -17,7 +17,7 @@ #include <string.h> #include <console/console.h> -#include <usbdebug_direct.h> +#include <usbdebug.h> #include <pc80/mc146818rtc.h> static struct ehci_debug_info dbg_info; Modified: trunk/src/cpu/intel/model_106cx/model_106cx_init.c ============================================================================== --- trunk/src/cpu/intel/model_106cx/model_106cx_init.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/cpu/intel/model_106cx/model_106cx_init.c Tue May 25 18:17:45 2010 (r5586) @@ -29,7 +29,7 @@ #include <cpu/intel/hyperthreading.h> #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> -#include <usbdebug_direct.h> +#include <usbdebug.h> static const uint32_t microcode_updates[] = { /* Dummy terminator */ Modified: trunk/src/cpu/intel/model_6bx/model_6bx_init.c ============================================================================== --- trunk/src/cpu/intel/model_6bx/model_6bx_init.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/cpu/intel/model_6bx/model_6bx_init.c Tue May 25 18:17:45 2010 (r5586) @@ -30,7 +30,7 @@ #include <cpu/x86/lapic.h> #include <cpu/intel/microcode.h> #include <cpu/x86/cache.h> -#include <usbdebug_direct.h> +#include <usbdebug.h> static const uint32_t microcode_updates[] = { #include "microcode-737-MU16b11c.h" Modified: trunk/src/cpu/intel/model_6ex/model_6ex_init.c ============================================================================== --- trunk/src/cpu/intel/model_6ex/model_6ex_init.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/cpu/intel/model_6ex/model_6ex_init.c Tue May 25 18:17:45 2010 (r5586) @@ -31,7 +31,7 @@ #include <cpu/intel/hyperthreading.h> #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> -#include <usbdebug_direct.h> +#include <usbdebug.h> static const uint32_t microcode_updates[] = { #include "microcode-1624-m206e839.h" Modified: trunk/src/cpu/intel/model_6fx/model_6fx_init.c ============================================================================== --- trunk/src/cpu/intel/model_6fx/model_6fx_init.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/cpu/intel/model_6fx/model_6fx_init.c Tue May 25 18:17:45 2010 (r5586) @@ -31,7 +31,7 @@ #include <cpu/intel/hyperthreading.h> #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> -#include <usbdebug_direct.h> +#include <usbdebug.h> static const uint32_t microcode_updates[] = { #include "microcode-2129-m206f257.h" Copied: trunk/src/include/usbdebug.h (from r5585, trunk/src/include/usbdebug_direct.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/include/usbdebug.h Tue May 25 18:17:45 2010 (r5586, copy of r5585, trunk/src/include/usbdebug_direct.h) @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + */ + +#ifndef USBDEBUG_H +#define USBDEBUG_H + +struct ehci_debug_info { + void *ehci_caps; + void *ehci_regs; + void *ehci_debug; + unsigned devnum; + unsigned endpoint_out; + unsigned endpoint_in; +}; + +int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size); +int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size); +void set_ehci_base(unsigned ehci_base); +void set_ehci_debug(unsigned ehci_deug); +unsigned get_ehci_debug(void); +void set_debug_port(unsigned port); + +#endif Modified: trunk/src/lib/Makefile.inc ============================================================================== --- trunk/src/lib/Makefile.inc Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/lib/Makefile.inc Tue May 25 18:17:45 2010 (r5586) @@ -23,7 +23,8 @@ initobj-y += lzma.o #initobj-y += lzmadecode.o -obj-$(CONFIG_USBDEBUG_DIRECT) += usbdebug_direct.o +obj-$(CONFIG_USBDEBUG_DIRECT) += usbdebug.o + obj-$(CONFIG_COMPRESSED_PAYLOAD_LZMA) += lzma.o obj-$(CONFIG_BOOTSPLASH) += jpeg.o Copied and modified: trunk/src/lib/usbdebug.c (from r5585, trunk/src/lib/usbdebug_direct.c) ============================================================================== --- trunk/src/lib/usbdebug_direct.c Tue May 25 18:02:28 2010 (r5585, copy source) +++ trunk/src/lib/usbdebug.c Tue May 25 18:17:45 2010 (r5586) @@ -31,7 +31,7 @@ #include <usb_ch9.h> #include <ehci.h> -#include <usbdebug_direct.h> +#include <usbdebug.h> #define USB_DEBUG_DEVNUM 127 Modified: trunk/src/mainboard/getac/p470/romstage.c ============================================================================== --- trunk/src/mainboard/getac/p470/romstage.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/mainboard/getac/p470/romstage.c Tue May 25 18:17:45 2010 (r5586) @@ -40,7 +40,7 @@ #if CONFIG_USBDEBUG_DIRECT #define DBGP_DEFAULT 0 #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" -#include "pc80/usbdebug_direct_serial.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c Tue May 25 18:17:45 2010 (r5586) @@ -55,8 +55,8 @@ #include <console/console.h> #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/sis/sis966/sis966_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/sis/sis966/sis966_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" Modified: trunk/src/mainboard/gigabyte/m57sli/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/m57sli/romstage.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/mainboard/gigabyte/m57sli/romstage.c Tue May 25 18:17:45 2010 (r5586) @@ -53,8 +53,8 @@ #include <console/console.h> #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" Modified: trunk/src/mainboard/intel/d945gclf/romstage.c ============================================================================== --- trunk/src/mainboard/intel/d945gclf/romstage.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/mainboard/intel/d945gclf/romstage.c Tue May 25 18:17:45 2010 (r5586) @@ -42,7 +42,7 @@ #if CONFIG_USBDEBUG_DIRECT #define DBGP_DEFAULT 1 #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" -#include "pc80/usbdebug_direct_serial.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" Modified: trunk/src/mainboard/kontron/986lcd-m/romstage.c ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/romstage.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/mainboard/kontron/986lcd-m/romstage.c Tue May 25 18:17:45 2010 (r5586) @@ -50,9 +50,9 @@ #if CONFIG_USBDEBUG_DIRECT #define DBGP_DEFAULT 1 -#include <usbdebug_direct.h> +#include <usbdebug.h> #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" -#include "pc80/usbdebug_direct_serial.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" Modified: trunk/src/mainboard/msi/ms7260/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms7260/romstage.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/mainboard/msi/ms7260/romstage.c Tue May 25 18:17:45 2010 (r5586) @@ -57,8 +57,8 @@ #include <console/console.h> #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/msi/ms9652_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9652_fam10/romstage.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/mainboard/msi/ms9652_fam10/romstage.c Tue May 25 18:17:45 2010 (r5586) @@ -46,8 +46,8 @@ #include "option_table.h" #include <console/console.h> #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" Modified: trunk/src/mainboard/nvidia/l1_2pvv/romstage.c ============================================================================== --- trunk/src/mainboard/nvidia/l1_2pvv/romstage.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/mainboard/nvidia/l1_2pvv/romstage.c Tue May 25 18:17:45 2010 (r5586) @@ -53,8 +53,8 @@ #include <console/console.h> #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" Modified: trunk/src/mainboard/roda/rk886ex/romstage.c ============================================================================== --- trunk/src/mainboard/roda/rk886ex/romstage.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/mainboard/roda/rk886ex/romstage.c Tue May 25 18:17:45 2010 (r5586) @@ -44,7 +44,7 @@ #if CONFIG_USBDEBUG_DIRECT #define DBGP_DEFAULT 1 #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" -#include "pc80/usbdebug_direct_serial.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" Modified: trunk/src/mainboard/tyan/s2912/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912/romstage.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/mainboard/tyan/s2912/romstage.c Tue May 25 18:17:45 2010 (r5586) @@ -53,8 +53,8 @@ #include <console/console.h> #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" Modified: trunk/src/mainboard/tyan/s2912_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912_fam10/romstage.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/mainboard/tyan/s2912_fam10/romstage.c Tue May 25 18:17:45 2010 (r5586) @@ -46,8 +46,8 @@ #include "option_table.h" #include <console/console.h> #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" Copied and modified: trunk/src/pc80/usbdebug_serial.c (from r5583, trunk/src/pc80/usbdebug_direct_serial.c) ============================================================================== --- trunk/src/pc80/usbdebug_direct_serial.c Mon May 24 17:51:15 2010 (r5583, copy source) +++ trunk/src/pc80/usbdebug_serial.c Tue May 25 18:17:45 2010 (r5586) @@ -15,7 +15,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA */ -#include "../lib/usbdebug_direct.c" +#include "../lib/usbdebug.c" static void early_usbdebug_direct_init(void) { Copied: trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug.c (from r5583, trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug_direct.c) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug.c Tue May 25 18:17:45 2010 (r5586, copy of r5583, trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug_direct.c) @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SB600_DEVN_BASE + +#define SB600_DEVN_BASE 0 + +#endif + +#define EHCI_BAR_INDEX 0x10 +#define EHCI_BAR 0xFEF00000 +#define EHCI_DEBUG_OFFSET 0xE0 + +static void sb600_enable_usbdebug_direct(u32 port) +{ + set_debug_port(port); + pci_write_config32(PCI_DEV(0, SB600_DEVN_BASE + 0x13, 5), + EHCI_BAR_INDEX, EHCI_BAR); + pci_write_config8(PCI_DEV(0, SB600_DEVN_BASE + 0x13, 5), 0x04, 0x2); /* mem space enabe */ +} Modified: trunk/src/southbridge/amd/sb600/sb600_usb.c ============================================================================== --- trunk/src/southbridge/amd/sb600/sb600_usb.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/southbridge/amd/sb600/sb600_usb.c Tue May 25 18:17:45 2010 (r5586) @@ -22,7 +22,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> -#include <usbdebug_direct.h> +#include <usbdebug.h> #include <arch/io.h> #include "sb600.h" Copied: trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug.c (from r5583, trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug_direct.c) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug.c Tue May 25 18:17:45 2010 (r5586, copy of r5583, trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug_direct.c) @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SB700_DEVN_BASE + +#define SB700_DEVN_BASE 0 + +#endif + +#define EHCI_BAR_INDEX 0x10 +#define EHCI_BAR 0xFEF00000 +#define EHCI_DEBUG_OFFSET 0xE0 + +static void sb700_enable_usbdebug_direct(u32 port) +{ + set_debug_port(port); + pci_write_config32(PCI_DEV(0, SB700_DEVN_BASE + 0x13, 5), + EHCI_BAR_INDEX, EHCI_BAR); + pci_write_config8(PCI_DEV(0, SB700_DEVN_BASE + 0x13, 5), 0x04, 0x2); /* mem space enabe */ +} Modified: trunk/src/southbridge/amd/sb700/sb700_usb.c ============================================================================== --- trunk/src/southbridge/amd/sb700/sb700_usb.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/southbridge/amd/sb700/sb700_usb.c Tue May 25 18:17:45 2010 (r5586) @@ -22,7 +22,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> -#include <usbdebug_direct.h> +#include <usbdebug.h> #include <arch/io.h> #include "sb700.h" Modified: trunk/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c ============================================================================== --- trunk/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c Tue May 25 18:17:45 2010 (r5586) @@ -24,7 +24,7 @@ #include <device/pci_ids.h> #include "i82801gx.h" #if CONFIG_USBDEBUG_DIRECT -#include <usbdebug_direct.h> +#include <usbdebug.h> #endif #include <arch/io.h> Copied: trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c (from r5583, trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c Tue May 25 18:17:45 2010 (r5586, copy of r5583, trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c) @@ -0,0 +1,50 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2004 Tyan Computer + * Written by Yinghai Lu <yhlu(a)tyan.com> for Tyan Computer. + * Copyright (C) 2006,2007 AMD + * Written by Yinghai Lu <yinghai.lu(a)amd.com> for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20 + #define MCP55_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE +#else + #define MCP55_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE +#endif + +#define EHCI_BAR_INDEX 0x10 +#define EHCI_BAR 0xFEF00000 +#define EHCI_DEBUG_OFFSET 0x98 + +static void set_debug_port(unsigned port) +{ + uint32_t dword; + dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), 0x74); + dword &= ~(0xf<<12); + dword |= (port<<12); + pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), 0x74, dword); + +} + +static void mcp55_enable_usbdebug_direct(unsigned port) +{ + set_debug_port(port); + pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), EHCI_BAR_INDEX, EHCI_BAR); + pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), 0x04, 0x2); // mem space enabe +} + Modified: trunk/src/southbridge/nvidia/mcp55/mcp55_usb2.c ============================================================================== --- trunk/src/southbridge/nvidia/mcp55/mcp55_usb2.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/southbridge/nvidia/mcp55/mcp55_usb2.c Tue May 25 18:17:45 2010 (r5586) @@ -28,7 +28,7 @@ #include <device/pci_ops.h> #include "mcp55.h" #if CONFIG_USBDEBUG_DIRECT -#include <usbdebug_direct.h> +#include <usbdebug.h> #endif extern struct ehci_debug_info dbg_info; Copied: trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug.c (from r5583, trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug_direct.c) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug.c Tue May 25 18:17:45 2010 (r5586, copy of r5583, trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug_direct.c) @@ -0,0 +1,50 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2004 Tyan Computer + * Written by Yinghai Lu <yhlu(a)tyan.com> for Tyan Computer. + * Copyright (C) 2006,2007 AMD + * Written by Yinghai Lu <yinghai.lu(a)amd.com> for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE + #define SIS966_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE +#else + #define SIS966_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE +#endif + +#define EHCI_BAR_INDEX 0x10 +#define EHCI_BAR 0xFEF00000 +#define EHCI_DEBUG_OFFSET 0x98 + +static void set_debug_port(unsigned port) +{ + uint32_t dword; + dword = pci_read_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), 0x74); + dword &= ~(0xf<<12); + dword |= (port<<12); + pci_write_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), 0x74, dword); + +} + +static void sis966_enable_usbdebug_direct(unsigned port) +{ + set_debug_port(port); + pci_write_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), EHCI_BAR_INDEX, EHCI_BAR); + pci_write_config8(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), 0x04, 0x2); // mem space enabe +} + Modified: trunk/src/southbridge/sis/sis966/sis966_usb2.c ============================================================================== --- trunk/src/southbridge/sis/sis966/sis966_usb2.c Tue May 25 18:02:28 2010 (r5585) +++ trunk/src/southbridge/sis/sis966/sis966_usb2.c Tue May 25 18:17:45 2010 (r5586) @@ -31,7 +31,7 @@ #include <arch/io.h> #include "sis966.h" #if CONFIG_USBDEBUG_DIRECT -#include <usbdebug_direct.h> +#include <usbdebug.h> #endif extern struct ehci_debug_info dbg_info;

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[commit] r5588 - in trunk/src: arch/i386/boot console cpu/amd/model_fxx cpu/intel/model_1067x cpu/intel/model_106cx cpu/intel/model_6bx cpu/intel/model_6ex cpu/intel/model_6fx lib mainboard/getac/p...
by repository service 25 May '10

25 May '10

Author: stepan Date: Tue May 25 19:09:05 2010 New Revision: 5588 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5588 Log: also rename the config option. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/arch/i386/boot/coreboot_table.c trunk/src/console/Kconfig trunk/src/console/Makefile.inc trunk/src/cpu/amd/model_fxx/model_fxx_init.c trunk/src/cpu/intel/model_1067x/model_1067x_init.c trunk/src/cpu/intel/model_106cx/cache_as_ram.inc trunk/src/cpu/intel/model_106cx/model_106cx_init.c trunk/src/cpu/intel/model_6bx/model_6bx_init.c trunk/src/cpu/intel/model_6ex/cache_as_ram.inc trunk/src/cpu/intel/model_6ex/model_6ex_init.c trunk/src/cpu/intel/model_6fx/cache_as_ram.inc trunk/src/cpu/intel/model_6fx/model_6fx_init.c trunk/src/lib/Makefile.inc trunk/src/mainboard/getac/p470/romstage.c trunk/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c trunk/src/mainboard/gigabyte/m57sli/romstage.c trunk/src/mainboard/intel/d945gclf/romstage.c trunk/src/mainboard/kontron/986lcd-m/romstage.c trunk/src/mainboard/msi/ms7260/ap_romstage.c trunk/src/mainboard/msi/ms7260/romstage.c trunk/src/mainboard/msi/ms9652_fam10/Kconfig trunk/src/mainboard/msi/ms9652_fam10/romstage.c trunk/src/mainboard/nvidia/l1_2pvv/ap_romstage.c trunk/src/mainboard/nvidia/l1_2pvv/romstage.c trunk/src/mainboard/roda/rk886ex/romstage.c trunk/src/mainboard/tyan/s2912/ap_romstage.c trunk/src/mainboard/tyan/s2912/romstage.c trunk/src/mainboard/tyan/s2912_fam10/romstage.c trunk/src/southbridge/amd/sb600/sb600_usb.c trunk/src/southbridge/amd/sb700/sb700_usb.c trunk/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c trunk/src/southbridge/nvidia/mcp55/mcp55_usb2.c trunk/src/southbridge/sis/sis966/sis966_usb2.c Modified: trunk/src/arch/i386/boot/coreboot_table.c ============================================================================== --- trunk/src/arch/i386/boot/coreboot_table.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/arch/i386/boot/coreboot_table.c Tue May 25 19:09:05 2010 (r5588) @@ -146,7 +146,7 @@ #if CONFIG_CONSOLE_SROM add_console(header, LB_TAG_CONSOLE_SROM); #endif -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG add_console(header, LB_TAG_CONSOLE_EHCI); #endif } Modified: trunk/src/console/Kconfig ============================================================================== --- trunk/src/console/Kconfig Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/console/Kconfig Tue May 25 19:09:05 2010 (r5588) @@ -86,7 +86,7 @@ depends on CONSOLE_SERIAL8250 # TODO: FIX DEPENDENCY HERE -config USBDEBUG_DIRECT +config USBDEBUG bool "USB 2.0 EHCI debug dongle support" default n help Modified: trunk/src/console/Makefile.inc ============================================================================== --- trunk/src/console/Makefile.inc Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/console/Makefile.inc Tue May 25 19:09:05 2010 (r5588) @@ -10,7 +10,7 @@ initobj-$(CONFIG_USE_DCACHE_RAM) += console.o driver-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.o -driver-$(CONFIG_USBDEBUG_DIRECT) += usbdebug_console.o +driver-$(CONFIG_USBDEBUG) += usbdebug_console.o driver-$(CONFIG_CONSOLE_VGA) += vga_console.o driver-$(CONFIG_CONSOLE_BTEXT) += btext_console.o driver-$(CONFIG_CONSOLE_BTEXT) += font-8x16.o Modified: trunk/src/cpu/amd/model_fxx/model_fxx_init.c ============================================================================== --- trunk/src/cpu/amd/model_fxx/model_fxx_init.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/cpu/amd/model_fxx/model_fxx_init.c Tue May 25 19:09:05 2010 (r5588) @@ -462,7 +462,7 @@ } -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG static unsigned ehci_debug_addr; #endif @@ -481,7 +481,7 @@ get_fms(&c, dev->device); #endif -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG if (!ehci_debug_addr) ehci_debug_addr = get_ehci_debug(); set_ehci_debug(0); @@ -492,7 +492,7 @@ amd_setup_mtrrs(); x86_mtrr_check(); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG set_ehci_debug(ehci_debug_addr); #endif Modified: trunk/src/cpu/intel/model_1067x/model_1067x_init.c ============================================================================== --- trunk/src/cpu/intel/model_1067x/model_1067x_init.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/cpu/intel/model_1067x/model_1067x_init.c Tue May 25 19:09:05 2010 (r5588) @@ -194,7 +194,7 @@ wrmsr(PIC_SENS_CFG, msr); } -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG static unsigned ehci_debug_addr; #endif @@ -212,7 +212,7 @@ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG // Is this caution really needed? if(!ehci_debug_addr) ehci_debug_addr = get_ehci_debug(); @@ -223,7 +223,7 @@ x86_setup_mtrrs(36); x86_mtrr_check(); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG set_ehci_debug(ehci_debug_addr); #endif Modified: trunk/src/cpu/intel/model_106cx/cache_as_ram.inc ============================================================================== --- trunk/src/cpu/intel/model_106cx/cache_as_ram.inc Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/cpu/intel/model_106cx/cache_as_ram.inc Tue May 25 19:09:05 2010 (r5588) @@ -123,7 +123,7 @@ movl %eax, %cr0 /* Set up stack pointer */ -#if defined(CONFIG_USBDEBUG_DIRECT) && (CONFIG_USBDEBUG_DIRECT == 1) +#if defined(CONFIG_USBDEBUG) && (CONFIG_USBDEBUG == 1) /* leave some space for the struct ehci_debug_info */ movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %eax #else Modified: trunk/src/cpu/intel/model_106cx/model_106cx_init.c ============================================================================== --- trunk/src/cpu/intel/model_106cx/model_106cx_init.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/cpu/intel/model_106cx/model_106cx_init.c Tue May 25 19:09:05 2010 (r5588) @@ -155,7 +155,7 @@ wrmsr(IA32_MISC_ENABLE, msr); } -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG static unsigned ehci_debug_addr; #endif @@ -173,7 +173,7 @@ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG // Is this caution really needed? if(!ehci_debug_addr) ehci_debug_addr = get_ehci_debug(); @@ -184,7 +184,7 @@ x86_setup_mtrrs(32); x86_mtrr_check(); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG set_ehci_debug(ehci_debug_addr); #endif Modified: trunk/src/cpu/intel/model_6bx/model_6bx_init.c ============================================================================== --- trunk/src/cpu/intel/model_6bx/model_6bx_init.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/cpu/intel/model_6bx/model_6bx_init.c Tue May 25 19:09:05 2010 (r5588) @@ -76,7 +76,7 @@ strcpy(processor_name, processor_name_start); } -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG static unsigned ehci_debug_addr; #endif @@ -94,7 +94,7 @@ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG // Is this caution really needed? if(!ehci_debug_addr) ehci_debug_addr = get_ehci_debug(); @@ -105,7 +105,7 @@ x86_setup_mtrrs(36); x86_mtrr_check(); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG set_ehci_debug(ehci_debug_addr); #endif Modified: trunk/src/cpu/intel/model_6ex/cache_as_ram.inc ============================================================================== --- trunk/src/cpu/intel/model_6ex/cache_as_ram.inc Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/cpu/intel/model_6ex/cache_as_ram.inc Tue May 25 19:09:05 2010 (r5588) @@ -123,7 +123,7 @@ movl %eax, %cr0 /* Set up stack pointer */ -#if defined(CONFIG_USBDEBUG_DIRECT) && (CONFIG_USBDEBUG_DIRECT == 1) +#if defined(CONFIG_USBDEBUG) && (CONFIG_USBDEBUG == 1) /* leave some space for the struct ehci_debug_info */ movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %eax #else Modified: trunk/src/cpu/intel/model_6ex/model_6ex_init.c ============================================================================== --- trunk/src/cpu/intel/model_6ex/model_6ex_init.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/cpu/intel/model_6ex/model_6ex_init.c Tue May 25 19:09:05 2010 (r5588) @@ -184,7 +184,7 @@ wrmsr(PIC_SENS_CFG, msr); } -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG static unsigned ehci_debug_addr; #endif @@ -202,7 +202,7 @@ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG // Is this caution really needed? if(!ehci_debug_addr) ehci_debug_addr = get_ehci_debug(); @@ -213,7 +213,7 @@ x86_setup_mtrrs(36); x86_mtrr_check(); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG set_ehci_debug(ehci_debug_addr); #endif Modified: trunk/src/cpu/intel/model_6fx/cache_as_ram.inc ============================================================================== --- trunk/src/cpu/intel/model_6fx/cache_as_ram.inc Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/cpu/intel/model_6fx/cache_as_ram.inc Tue May 25 19:09:05 2010 (r5588) @@ -130,7 +130,7 @@ movl %eax, %cr0 /* Set up stack pointer */ -#if defined(CONFIG_USBDEBUG_DIRECT) && (CONFIG_USBDEBUG_DIRECT == 1) +#if defined(CONFIG_USBDEBUG) && (CONFIG_USBDEBUG == 1) /* leave some space for the struct ehci_debug_info */ movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %eax #else Modified: trunk/src/cpu/intel/model_6fx/model_6fx_init.c ============================================================================== --- trunk/src/cpu/intel/model_6fx/model_6fx_init.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/cpu/intel/model_6fx/model_6fx_init.c Tue May 25 19:09:05 2010 (r5588) @@ -211,7 +211,7 @@ wrmsr(PIC_SENS_CFG, msr); } -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG static unsigned ehci_debug_addr; #endif @@ -229,7 +229,7 @@ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG // Is this caution really needed? if(!ehci_debug_addr) ehci_debug_addr = get_ehci_debug(); @@ -243,7 +243,7 @@ /* Setup Page Attribute Tables (PAT) */ // TODO set up PAT -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG set_ehci_debug(ehci_debug_addr); #endif Modified: trunk/src/lib/Makefile.inc ============================================================================== --- trunk/src/lib/Makefile.inc Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/lib/Makefile.inc Tue May 25 19:09:05 2010 (r5588) @@ -23,7 +23,7 @@ initobj-y += lzma.o #initobj-y += lzmadecode.o -obj-$(CONFIG_USBDEBUG_DIRECT) += usbdebug.o +obj-$(CONFIG_USBDEBUG) += usbdebug.o obj-$(CONFIG_COMPRESSED_PAYLOAD_LZMA) += lzma.o Modified: trunk/src/mainboard/getac/p470/romstage.c ============================================================================== --- trunk/src/mainboard/getac/p470/romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/getac/p470/romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -37,7 +37,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #define DBGP_DEFAULT 0 #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" #include "pc80/usbdebug_serial.c" @@ -320,7 +320,7 @@ /* Set up the console */ uart_init(); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG i82801gx_enable_usbdebug(DBGP_DEFAULT); early_usbdebug_init(); #endif Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -83,7 +83,7 @@ id = get_node_core_id_x(); - //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP + //FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n"); train_ram(id.nodeid, sysinfo, sysinfox); Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -54,7 +54,7 @@ #include "pc80/mc146818rtc_early.c" #include <console/console.h> -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #include "southbridge/sis/sis966/sis966_enable_usbdebug.c" #include "pc80/usbdebug_serial.c" #endif @@ -199,7 +199,7 @@ /* Halt if there was a built in self test failure */ report_bist_failure(bist); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG sis966_enable_usbdebug(DBGP_DEFAULT); early_usbdebug_init(); #endif Modified: trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -81,7 +81,7 @@ id = get_node_core_id_x(); - //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP + //FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n"); train_ram(id.nodeid, sysinfo, sysinfox); Modified: trunk/src/mainboard/gigabyte/m57sli/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/m57sli/romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/gigabyte/m57sli/romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -52,7 +52,7 @@ #include "pc80/mc146818rtc_early.c" #include <console/console.h> -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" #include "pc80/usbdebug_serial.c" #endif @@ -212,7 +212,7 @@ /* Halt if there was a built in self test failure */ report_bist_failure(bist); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG mcp55_enable_usbdebug(DBGP_DEFAULT); early_usbdebug_init(); #endif Modified: trunk/src/mainboard/intel/d945gclf/romstage.c ============================================================================== --- trunk/src/mainboard/intel/d945gclf/romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/intel/d945gclf/romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -39,7 +39,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #define DBGP_DEFAULT 1 #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" #include "pc80/usbdebug_serial.c" @@ -236,7 +236,7 @@ /* Set up the console */ uart_init(); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG i82801gx_enable_usbdebug(DBGP_DEFAULT); early_usbdebug_init(); #endif Modified: trunk/src/mainboard/kontron/986lcd-m/romstage.c ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/kontron/986lcd-m/romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -48,7 +48,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #define DBGP_DEFAULT 1 #include <usbdebug.h> #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" @@ -380,7 +380,7 @@ /* Set up the console */ uart_init(); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG i82801gx_enable_usbdebug(DBGP_DEFAULT); early_usbdebug_init(); #endif Modified: trunk/src/mainboard/msi/ms7260/ap_romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms7260/ap_romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/msi/ms7260/ap_romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -67,7 +67,7 @@ id = get_node_core_id_x(); - /* FIXME: For USBDEBUG_DIRECT you need to make sure dbg_info gets + /* FIXME: For USBDEBUG you need to make sure dbg_info gets * assigned in AP. */ print_debug("CODE IN CACHE ON NODE:"); Modified: trunk/src/mainboard/msi/ms7260/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms7260/romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/msi/ms7260/romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -56,7 +56,7 @@ #include "pc80/mc146818rtc_early.c" #include <console/console.h> -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" #include "pc80/usbdebug_serial.c" #endif @@ -181,7 +181,7 @@ setup_mb_resource_map(); uart_init(); report_bist_failure(bist); /* Halt upon BIST failure. */ -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG mcp55_enable_usbdebug(DBGP_DEFAULT); early_usbdebug_init(); #endif Modified: trunk/src/mainboard/msi/ms9652_fam10/Kconfig ============================================================================== --- trunk/src/mainboard/msi/ms9652_fam10/Kconfig Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/msi/ms9652_fam10/Kconfig Tue May 25 19:09:05 2010 (r5588) @@ -159,7 +159,7 @@ default y depends on BOARD_MSI_MS9652_FAM10 -config USBDEBUG_DIRECT +config USBDEBUG bool default n depends on BOARD_MSI_MS9652_FAM10 Modified: trunk/src/mainboard/msi/ms9652_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9652_fam10/romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/msi/ms9652_fam10/romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -45,7 +45,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include <console/console.h> -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" #include "pc80/usbdebug_serial.c" #endif @@ -185,7 +185,7 @@ /* Halt if there was a built in self test failure */ report_bist_failure(bist); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG mcp55_enable_usbdebug(DBGP_DEFAULT); early_usbdebug_init(); #endif Modified: trunk/src/mainboard/nvidia/l1_2pvv/ap_romstage.c ============================================================================== --- trunk/src/mainboard/nvidia/l1_2pvv/ap_romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/nvidia/l1_2pvv/ap_romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -81,7 +81,7 @@ id = get_node_core_id_x(); - //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP + //FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n"); train_ram(id.nodeid, sysinfo, sysinfox); Modified: trunk/src/mainboard/nvidia/l1_2pvv/romstage.c ============================================================================== --- trunk/src/mainboard/nvidia/l1_2pvv/romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/nvidia/l1_2pvv/romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -52,7 +52,7 @@ #include "pc80/mc146818rtc_early.c" #include <console/console.h> -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" #include "pc80/usbdebug_serial.c" #endif @@ -198,7 +198,7 @@ /* Halt if there was a built in self test failure */ report_bist_failure(bist); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG mcp55_enable_usbdebug(DBGP_DEFAULT); early_usbdebug_init(); #endif Modified: trunk/src/mainboard/roda/rk886ex/romstage.c ============================================================================== --- trunk/src/mainboard/roda/rk886ex/romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/roda/rk886ex/romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -41,7 +41,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #define DBGP_DEFAULT 1 #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" #include "pc80/usbdebug_serial.c" @@ -290,7 +290,7 @@ /* Set up the console */ uart_init(); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG i82801gx_enable_usbdebug(DBGP_DEFAULT); early_usbdebug_init(); #endif Modified: trunk/src/mainboard/tyan/s2912/ap_romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912/ap_romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/tyan/s2912/ap_romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -78,7 +78,7 @@ id = get_node_core_id_x(); - //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP + //FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n"); train_ram(id.nodeid, sysinfo, sysinfox); Modified: trunk/src/mainboard/tyan/s2912/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912/romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/tyan/s2912/romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -52,7 +52,7 @@ #include "pc80/mc146818rtc_early.c" #include <console/console.h> -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" #include "pc80/usbdebug_serial.c" #endif @@ -192,7 +192,7 @@ /* Halt if there was a built in self test failure */ report_bist_failure(bist); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG mcp55_enable_usbdebug(DBGP_DEFAULT); early_usbdebug_init(); #endif Modified: trunk/src/mainboard/tyan/s2912_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912_fam10/romstage.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/mainboard/tyan/s2912_fam10/romstage.c Tue May 25 19:09:05 2010 (r5588) @@ -45,7 +45,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include <console/console.h> -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" #include "pc80/usbdebug_serial.c" #endif @@ -180,7 +180,7 @@ /* Halt if there was a built in self test failure */ report_bist_failure(bist); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG mcp55_enable_usbdebug(DBGP_DEFAULT); early_usbdebug_init(); #endif Modified: trunk/src/southbridge/amd/sb600/sb600_usb.c ============================================================================== --- trunk/src/southbridge/amd/sb600/sb600_usb.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/southbridge/amd/sb600/sb600_usb.c Tue May 25 19:09:05 2010 (r5588) @@ -127,7 +127,7 @@ static void usb_set_resources(struct device *dev) { -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG struct resource *res; u32 base; u32 old_debug; @@ -137,7 +137,7 @@ #endif pci_dev_set_resources(dev); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG res = find_resource(dev, 0x10); set_ehci_debug(old_debug); if (!res) Modified: trunk/src/southbridge/amd/sb700/sb700_usb.c ============================================================================== --- trunk/src/southbridge/amd/sb700/sb700_usb.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/southbridge/amd/sb700/sb700_usb.c Tue May 25 19:09:05 2010 (r5588) @@ -169,7 +169,7 @@ static void usb_set_resources(struct device *dev) { -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG struct resource *res; u32 base; u32 old_debug; @@ -179,7 +179,7 @@ #endif pci_dev_set_resources(dev); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG res = find_resource(dev, 0x10); set_ehci_debug(old_debug); if (!res) Modified: trunk/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c ============================================================================== --- trunk/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c Tue May 25 19:09:05 2010 (r5588) @@ -23,7 +23,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include "i82801gx.h" -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #include <usbdebug.h> #endif #include <arch/io.h> @@ -87,7 +87,7 @@ static void usb_ehci_set_resources(struct device *dev) { -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG struct resource *res; u32 base; u32 usb_debug; @@ -97,7 +97,7 @@ #endif pci_dev_set_resources(dev); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG res = find_resource(dev, 0x10); set_ehci_debug(usb_debug); if (!res) return; Modified: trunk/src/southbridge/nvidia/mcp55/mcp55_usb2.c ============================================================================== --- trunk/src/southbridge/nvidia/mcp55/mcp55_usb2.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/southbridge/nvidia/mcp55/mcp55_usb2.c Tue May 25 19:09:05 2010 (r5588) @@ -27,7 +27,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include "mcp55.h" -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #include <usbdebug.h> #endif @@ -43,7 +43,7 @@ static void usb2_set_resources(struct device *dev) { -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG struct resource *res; unsigned base; unsigned old_debug; @@ -53,7 +53,7 @@ #endif pci_dev_set_resources(dev); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG res = find_resource(dev, 0x10); set_ehci_debug(old_debug); if (!res) return; Modified: trunk/src/southbridge/sis/sis966/sis966_usb2.c ============================================================================== --- trunk/src/southbridge/sis/sis966/sis966_usb2.c Tue May 25 18:35:51 2010 (r5587) +++ trunk/src/southbridge/sis/sis966/sis966_usb2.c Tue May 25 19:09:05 2010 (r5588) @@ -30,7 +30,7 @@ #include <device/pci_ops.h> #include <arch/io.h> #include "sis966.h" -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #include <usbdebug.h> #endif @@ -123,7 +123,7 @@ static void usb2_set_resources(struct device *dev) { -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG struct resource *res; unsigned base; unsigned old_debug; @@ -133,7 +133,7 @@ #endif pci_dev_set_resources(dev); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG res = find_resource(dev, 0x10); set_ehci_debug(old_debug); if (!res) return;

1 0

[commit] r5587 - in trunk/src: lib mainboard/getac/p470 mainboard/gigabyte/ga_2761gxdk mainboard/gigabyte/m57sli mainboard/intel/d945gclf mainboard/kontron/986lcd-m mainboard/msi/ms7260 mainboard/m...
by repository service 25 May '10

25 May '10

Author: stepan Date: Tue May 25 18:35:51 2010 New Revision: 5587 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5587 Log: fix most usbdebug warnings and fix function names. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/lib/usbdebug.c trunk/src/mainboard/getac/p470/romstage.c trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c trunk/src/mainboard/gigabyte/m57sli/romstage.c trunk/src/mainboard/intel/d945gclf/romstage.c trunk/src/mainboard/kontron/986lcd-m/romstage.c trunk/src/mainboard/msi/ms7260/romstage.c trunk/src/mainboard/msi/ms9652_fam10/romstage.c trunk/src/mainboard/nvidia/l1_2pvv/romstage.c trunk/src/mainboard/roda/rk886ex/romstage.c trunk/src/mainboard/tyan/s2912/romstage.c trunk/src/mainboard/tyan/s2912_fam10/romstage.c trunk/src/pc80/usbdebug_serial.c trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug.c trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug.c trunk/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug.c Modified: trunk/src/lib/usbdebug.c ============================================================================== --- trunk/src/lib/usbdebug.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/lib/usbdebug.c Tue May 25 18:35:51 2010 (r5587) @@ -83,7 +83,7 @@ unsigned ctrl; int loop = 0x100000; do { - ctrl = read32(&ehci_debug->control); + ctrl = read32((unsigned long)&ehci_debug->control); /* Stop when the transaction is finished */ if (ctrl & DBGP_DONE) break; @@ -94,7 +94,7 @@ /* Now that we have observed the completed transaction, * clear the done bit. */ - write32(&ehci_debug->control, ctrl | DBGP_DONE); + write32((unsigned long)&ehci_debug->control, ctrl | DBGP_DONE); return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl); } @@ -119,9 +119,9 @@ int loop = 3; retry: - write32(&ehci_debug->control, ctrl | DBGP_GO); + write32((unsigned long)&ehci_debug->control, ctrl | DBGP_GO); ret = dbgp_wait_until_complete(ehci_debug); - pids = read32(&ehci_debug->pids); + pids = read32((unsigned long)&ehci_debug->pids); lpid = DBGP_PID_GET(pids); if (ret < 0) @@ -151,8 +151,8 @@ lo |= bytes[i] << (8*i); for (; i < 8 && i < size; i++) hi |= bytes[i] << (8*(i - 4)); - write32(&ehci_debug->data03, lo); - write32(&ehci_debug->data47, hi); + write32((unsigned long)&ehci_debug->data03, lo); + write32((unsigned long)&ehci_debug->data47, hi); } static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size) @@ -160,8 +160,8 @@ unsigned char *bytes = buf; unsigned lo, hi; int i; - lo = read32(&ehci_debug->data03); - hi = read32(&ehci_debug->data47); + lo = read32((unsigned long)&ehci_debug->data03); + hi = read32((unsigned long)&ehci_debug->data47); for (i = 0; i < 4 && i < size; i++) bytes[i] = (lo >> (8*i)) & 0xff; for (; i < 8 && i < size; i++) @@ -177,17 +177,17 @@ addr = DBGP_EPADDR(devnum, endpoint); - pids = read32(&ehci_debug->pids); + pids = read32((unsigned long)&ehci_debug->pids); pids = DBGP_PID_UPDATE(pids, USB_PID_OUT); - ctrl = read32(&ehci_debug->control); + ctrl = read32((unsigned long)&ehci_debug->control); ctrl = DBGP_LEN_UPDATE(ctrl, size); ctrl |= DBGP_OUT; ctrl |= DBGP_GO; dbgp_set_data(ehci_debug, bytes, size); - write32(&ehci_debug->address, addr); - write32(&ehci_debug->pids, pids); + write32((unsigned long)&ehci_debug->address, addr); + write32((unsigned long)&ehci_debug->pids, pids); ret = dbgp_wait_until_done(ehci_debug, ctrl); if (ret < 0) { @@ -211,16 +211,16 @@ addr = DBGP_EPADDR(devnum, endpoint); - pids = read32(&ehci_debug->pids); + pids = read32((unsigned long)&ehci_debug->pids); pids = DBGP_PID_UPDATE(pids, USB_PID_IN); - ctrl = read32(&ehci_debug->control); + ctrl = read32((unsigned long)&ehci_debug->control); ctrl = DBGP_LEN_UPDATE(ctrl, size); ctrl &= ~DBGP_OUT; ctrl |= DBGP_GO; - write32(&ehci_debug->address, addr); - write32(&ehci_debug->pids, pids); + write32((unsigned long)&ehci_debug->address, addr); + write32((unsigned long)&ehci_debug->pids, pids); ret = dbgp_wait_until_done(ehci_debug, ctrl); if (ret < 0) return ret; @@ -256,15 +256,15 @@ pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP); addr = DBGP_EPADDR(devnum, 0); - ctrl = read32(&ehci_debug->control); + ctrl = read32((unsigned long)&ehci_debug->control); ctrl = DBGP_LEN_UPDATE(ctrl, sizeof(req)); ctrl |= DBGP_OUT; ctrl |= DBGP_GO; /* Send the setup message */ dbgp_set_data(ehci_debug, &req, sizeof(req)); - write32(&ehci_debug->address, addr); - write32(&ehci_debug->pids, pids); + write32((unsigned long)&ehci_debug->address, addr); + write32((unsigned long)&ehci_debug->pids, pids); ret = dbgp_wait_until_done(ehci_debug, ctrl); if (ret < 0) return ret; @@ -282,25 +282,25 @@ int loop; /* Reset the usb debug port */ - portsc = read32(&ehci_regs->port_status[port - 1]); + portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]); portsc &= ~PORT_PE; portsc |= PORT_RESET; - write32(&ehci_regs->port_status[port - 1], portsc); + write32((unsigned long)&ehci_regs->port_status[port - 1], portsc); delay = HUB_ROOT_RESET_TIME; for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT; delay_time += delay) { dbgp_mdelay(delay); - portsc = read32(&ehci_regs->port_status[port - 1]); + portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]); if (portsc & PORT_RESET) { /* force reset to complete */ loop = 2; - write32(&ehci_regs->port_status[port - 1], + write32((unsigned long)&ehci_regs->port_status[port - 1], portsc & ~(PORT_RWC_BITS | PORT_RESET)); do { dbgp_mdelay(delay); - portsc = read32(&ehci_regs->port_status[port - 1]); + portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]); delay_time += delay; } while ((portsc & PORT_RESET) && (--loop > 0)); if (!loop) { @@ -329,7 +329,7 @@ int ret, reps; for (reps = 0; reps < 3; reps++) { dbgp_mdelay(100); - status = read32(&ehci_regs->status); + status = read32((unsigned long)&ehci_regs->status); if (status & STS_PCD) { ret = ehci_reset_port(ehci_regs, port); if (ret == 0) @@ -346,7 +346,7 @@ #else #define dbgp_printk(fmt_arg...) do {} while(0) #endif -static void usbdebug_direct_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) +static void usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) { struct ehci_caps *ehci_caps; struct ehci_regs *ehci_regs; @@ -356,7 +356,6 @@ struct usb_debug_descriptor dbgp_desc; unsigned ctrl, devnum; int ret; - unsigned delay_time, delay; int loop; unsigned cmd, status, portsc, hcs_params, debug_port, n_ports, new_debug_port; @@ -366,16 +365,18 @@ unsigned playtimes = 3; ehci_caps = (struct ehci_caps *)ehci_bar; - ehci_regs = (struct ehci_regs *)(ehci_bar + HC_LENGTH(read32(&ehci_caps->hc_capbase))); + ehci_regs = (struct ehci_regs *)(ehci_bar + HC_LENGTH(read32((unsigned long)&ehci_caps->hc_capbase))); ehci_debug = (struct ehci_dbg_port *)(ehci_bar + offset); info->ehci_debug = (void *)0; + new_debug_port = 0; + try_next_time: port_map_tried = 0; try_next_port: - hcs_params = read32(&ehci_caps->hcs_params); + hcs_params = read32((unsigned long)&ehci_caps->hcs_params); debug_port = HCS_DEBUG_PORT(hcs_params); n_ports = HCS_N_PORTS(hcs_params); @@ -385,7 +386,7 @@ #if 1 for (i = 1; i <= n_ports; i++) { - portsc = read32(&ehci_regs->port_status[i-1]); + portsc = read32((unsigned long)&ehci_regs->port_status[i-1]); dbgp_printk("PORTSC #%d: %08x\n", i, portsc); } #endif @@ -400,11 +401,11 @@ /* Reset the EHCI controller */ loop = 10; - cmd = read32(&ehci_regs->command); + cmd = read32((unsigned long)&ehci_regs->command); cmd |= CMD_RESET; - write32(&ehci_regs->command, cmd); + write32((unsigned long)&ehci_regs->command, cmd); do { - cmd = read32(&ehci_regs->command); + cmd = read32((unsigned long)&ehci_regs->command); } while ((cmd & CMD_RESET) && (--loop > 0)); if(!loop) @@ -413,24 +414,24 @@ dbgp_printk("EHCI controller reset successfully.\n"); /* Claim ownership, but do not enable yet */ - ctrl = read32(&ehci_debug->control); + ctrl = read32((unsigned long)&ehci_debug->control); ctrl |= DBGP_OWNER; ctrl &= ~(DBGP_ENABLED | DBGP_INUSE); - write32(&ehci_debug->control, ctrl); + write32((unsigned long)&ehci_debug->control, ctrl); /* Start the ehci running */ - cmd = read32(&ehci_regs->command); + cmd = read32((unsigned long)&ehci_regs->command); cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET); cmd |= CMD_RUN; - write32(&ehci_regs->command, cmd); + write32((unsigned long)&ehci_regs->command, cmd); /* Ensure everything is routed to the EHCI */ - write32(&ehci_regs->configured_flag, FLAG_CF); + write32((unsigned long)&ehci_regs->configured_flag, FLAG_CF); /* Wait until the controller is no longer halted */ loop = 10; do { - status = read32(&ehci_regs->status); + status = read32((unsigned long)&ehci_regs->status); } while ((status & STS_HALT) && (--loop>0)); if(!loop) { @@ -448,21 +449,21 @@ dbgp_printk("EHCI done waiting for port.\n"); /* Enable the debug port */ - ctrl = read32(&ehci_debug->control); + ctrl = read32((unsigned long)&ehci_debug->control); ctrl |= DBGP_CLAIM; - write32(&ehci_debug->control, ctrl); - ctrl = read32(&ehci_debug->control); + write32((unsigned long)&ehci_debug->control, ctrl); + ctrl = read32((unsigned long)&ehci_debug->control); if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) { dbgp_printk("No device in EHCI debug port.\n"); - write32(&ehci_debug->control, ctrl & ~DBGP_CLAIM); + write32((unsigned long)&ehci_debug->control, ctrl & ~DBGP_CLAIM); goto err; } dbgp_printk("EHCI debug port enabled.\n"); /* Completely transfer the debug device to the debug controller */ - portsc = read32(&ehci_regs->port_status[debug_port - 1]); + portsc = read32((unsigned long)&ehci_regs->port_status[debug_port - 1]); portsc &= ~PORT_PE; - write32(&ehci_regs->port_status[debug_port - 1], portsc); + write32((unsigned long)&ehci_regs->port_status[debug_port - 1], portsc); dbgp_mdelay(100); @@ -529,9 +530,9 @@ return; err: /* Things didn't work so remove my claim */ - ctrl = read32(&ehci_debug->control); + ctrl = read32((unsigned long)&ehci_debug->control); ctrl &= ~(DBGP_CLAIM | DBGP_OUT); - write32((unsigned long)&ehci_debug->control, ctrl); + write32((unsigned long)(unsigned long)&ehci_debug->control, ctrl); next_debug_port: port_map_tried |= (1<<(debug_port-1)); Modified: trunk/src/mainboard/getac/p470/romstage.c ============================================================================== --- trunk/src/mainboard/getac/p470/romstage.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/mainboard/getac/p470/romstage.c Tue May 25 18:35:51 2010 (r5587) @@ -321,8 +321,8 @@ uart_init(); #if CONFIG_USBDEBUG_DIRECT - i82801gx_enable_usbdebug_direct(DBGP_DEFAULT); - early_usbdebug_direct_init(); + i82801gx_enable_usbdebug(DBGP_DEFAULT); + early_usbdebug_init(); #endif console_init(); Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c Tue May 25 18:35:51 2010 (r5587) @@ -200,8 +200,8 @@ report_bist_failure(bist); #if CONFIG_USBDEBUG_DIRECT - sis966_enable_usbdebug_direct(DBGP_DEFAULT); - early_usbdebug_direct_init(); + sis966_enable_usbdebug(DBGP_DEFAULT); + early_usbdebug_init(); #endif console_init(); printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1); Modified: trunk/src/mainboard/gigabyte/m57sli/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/m57sli/romstage.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/mainboard/gigabyte/m57sli/romstage.c Tue May 25 18:35:51 2010 (r5587) @@ -213,8 +213,8 @@ report_bist_failure(bist); #if CONFIG_USBDEBUG_DIRECT - mcp55_enable_usbdebug_direct(DBGP_DEFAULT); - early_usbdebug_direct_init(); + mcp55_enable_usbdebug(DBGP_DEFAULT); + early_usbdebug_init(); #endif console_init(); printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1); Modified: trunk/src/mainboard/intel/d945gclf/romstage.c ============================================================================== --- trunk/src/mainboard/intel/d945gclf/romstage.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/mainboard/intel/d945gclf/romstage.c Tue May 25 18:35:51 2010 (r5587) @@ -237,8 +237,8 @@ uart_init(); #if CONFIG_USBDEBUG_DIRECT - i82801gx_enable_usbdebug_direct(DBGP_DEFAULT); - early_usbdebug_direct_init(); + i82801gx_enable_usbdebug(DBGP_DEFAULT); + early_usbdebug_init(); #endif console_init(); Modified: trunk/src/mainboard/kontron/986lcd-m/romstage.c ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/romstage.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/mainboard/kontron/986lcd-m/romstage.c Tue May 25 18:35:51 2010 (r5587) @@ -381,8 +381,8 @@ uart_init(); #if CONFIG_USBDEBUG_DIRECT - i82801gx_enable_usbdebug_direct(DBGP_DEFAULT); - early_usbdebug_direct_init(); + i82801gx_enable_usbdebug(DBGP_DEFAULT); + early_usbdebug_init(); #endif console_init(); Modified: trunk/src/mainboard/msi/ms7260/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms7260/romstage.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/mainboard/msi/ms7260/romstage.c Tue May 25 18:35:51 2010 (r5587) @@ -182,8 +182,8 @@ uart_init(); report_bist_failure(bist); /* Halt upon BIST failure. */ #if CONFIG_USBDEBUG_DIRECT - mcp55_enable_usbdebug_direct(DBGP_DEFAULT); - early_usbdebug_direct_init(); + mcp55_enable_usbdebug(DBGP_DEFAULT); + early_usbdebug_init(); #endif console_init(); Modified: trunk/src/mainboard/msi/ms9652_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9652_fam10/romstage.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/mainboard/msi/ms9652_fam10/romstage.c Tue May 25 18:35:51 2010 (r5587) @@ -186,8 +186,8 @@ report_bist_failure(bist); #if CONFIG_USBDEBUG_DIRECT - mcp55_enable_usbdebug_direct(DBGP_DEFAULT); - early_usbdebug_direct_init(); + mcp55_enable_usbdebug(DBGP_DEFAULT); + early_usbdebug_init(); #endif val = cpuid_eax(1); Modified: trunk/src/mainboard/nvidia/l1_2pvv/romstage.c ============================================================================== --- trunk/src/mainboard/nvidia/l1_2pvv/romstage.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/mainboard/nvidia/l1_2pvv/romstage.c Tue May 25 18:35:51 2010 (r5587) @@ -199,8 +199,8 @@ report_bist_failure(bist); #if CONFIG_USBDEBUG_DIRECT - mcp55_enable_usbdebug_direct(DBGP_DEFAULT); - early_usbdebug_direct_init(); + mcp55_enable_usbdebug(DBGP_DEFAULT); + early_usbdebug_init(); #endif console_init(); printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1); Modified: trunk/src/mainboard/roda/rk886ex/romstage.c ============================================================================== --- trunk/src/mainboard/roda/rk886ex/romstage.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/mainboard/roda/rk886ex/romstage.c Tue May 25 18:35:51 2010 (r5587) @@ -291,8 +291,8 @@ uart_init(); #if CONFIG_USBDEBUG_DIRECT - i82801gx_enable_usbdebug_direct(DBGP_DEFAULT); - early_usbdebug_direct_init(); + i82801gx_enable_usbdebug(DBGP_DEFAULT); + early_usbdebug_init(); #endif console_init(); Modified: trunk/src/mainboard/tyan/s2912/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912/romstage.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/mainboard/tyan/s2912/romstage.c Tue May 25 18:35:51 2010 (r5587) @@ -193,8 +193,8 @@ report_bist_failure(bist); #if CONFIG_USBDEBUG_DIRECT - mcp55_enable_usbdebug_direct(DBGP_DEFAULT); - early_usbdebug_direct_init(); + mcp55_enable_usbdebug(DBGP_DEFAULT); + early_usbdebug_init(); #endif console_init(); printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1); Modified: trunk/src/mainboard/tyan/s2912_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912_fam10/romstage.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/mainboard/tyan/s2912_fam10/romstage.c Tue May 25 18:35:51 2010 (r5587) @@ -181,8 +181,8 @@ report_bist_failure(bist); #if CONFIG_USBDEBUG_DIRECT - mcp55_enable_usbdebug_direct(DBGP_DEFAULT); - early_usbdebug_direct_init(); + mcp55_enable_usbdebug(DBGP_DEFAULT); + early_usbdebug_init(); #endif val = cpuid_eax(1); Modified: trunk/src/pc80/usbdebug_serial.c ============================================================================== --- trunk/src/pc80/usbdebug_serial.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/pc80/usbdebug_serial.c Tue May 25 18:35:51 2010 (r5587) @@ -17,15 +17,15 @@ #include "../lib/usbdebug.c" -static void early_usbdebug_direct_init(void) +static void early_usbdebug_init(void) { struct ehci_debug_info *dbg_info = (struct ehci_debug_info *) (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info)); - usbdebug_direct_init(EHCI_BAR, EHCI_DEBUG_OFFSET, dbg_info); + usbdebug_init(EHCI_BAR, EHCI_DEBUG_OFFSET, dbg_info); } -void usbdebug_direct_tx_byte(unsigned char data) +void usbdebug_tx_byte(unsigned char data) { struct ehci_debug_info *dbg_info; @@ -38,7 +38,7 @@ } } -void usbdebug_direct_ram_tx_byte(unsigned char data) +void usbdebug_ram_tx_byte(unsigned char data) { struct ehci_debug_info *dbg_info; Modified: trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug.c ============================================================================== --- trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/southbridge/amd/sb600/sb600_enable_usbdebug.c Tue May 25 18:35:51 2010 (r5587) @@ -27,7 +27,7 @@ #define EHCI_BAR 0xFEF00000 #define EHCI_DEBUG_OFFSET 0xE0 -static void sb600_enable_usbdebug_direct(u32 port) +static void sb600_enable_usbdebug(u32 port) { set_debug_port(port); pci_write_config32(PCI_DEV(0, SB600_DEVN_BASE + 0x13, 5), Modified: trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug.c ============================================================================== --- trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/southbridge/amd/sb700/sb700_enable_usbdebug.c Tue May 25 18:35:51 2010 (r5587) @@ -27,7 +27,7 @@ #define EHCI_BAR 0xFEF00000 #define EHCI_DEBUG_OFFSET 0xE0 -static void sb700_enable_usbdebug_direct(u32 port) +static void sb700_enable_usbdebug(u32 port) { set_debug_port(port); pci_write_config32(PCI_DEV(0, SB700_DEVN_BASE + 0x13, 5), Modified: trunk/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c ============================================================================== --- trunk/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c Tue May 25 18:35:51 2010 (r5587) @@ -36,7 +36,7 @@ write32(EHCI_BAR + EHCI_DEBUG_OFFSET, dbgctl); } -static void i82801gx_enable_usbdebug_direct(unsigned port) +static void i82801gx_enable_usbdebug(unsigned port) { pci_write_config32(PCI_DEV(0, 0x1d, 7), EHCI_BAR_INDEX, EHCI_BAR); pci_write_config8(PCI_DEV(0, 0x1d, 7), 0x04, 0x2); // Memory Space Enable Modified: trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c ============================================================================== --- trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c Tue May 25 18:35:51 2010 (r5587) @@ -41,7 +41,7 @@ } -static void mcp55_enable_usbdebug_direct(unsigned port) +static void mcp55_enable_usbdebug(unsigned port) { set_debug_port(port); pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), EHCI_BAR_INDEX, EHCI_BAR); Modified: trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug.c ============================================================================== --- trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug.c Tue May 25 18:17:45 2010 (r5586) +++ trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug.c Tue May 25 18:35:51 2010 (r5587) @@ -41,7 +41,7 @@ } -static void sis966_enable_usbdebug_direct(unsigned port) +static void sis966_enable_usbdebug(unsigned port) { set_debug_port(port); pci_write_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), EHCI_BAR_INDEX, EHCI_BAR);

1 0

[commit] r5585 - in trunk/src: include lib mainboard/kontron/986lcd-m
by repository service 25 May '10

25 May '10

Author: stepan Date: Tue May 25 18:02:28 2010 New Revision: 5585 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5585 Log: Fix usbdebug compilation. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/include/usb_ch9.h trunk/src/include/usbdebug_direct.h trunk/src/lib/usbdebug_direct.c trunk/src/mainboard/kontron/986lcd-m/romstage.c Modified: trunk/src/include/usb_ch9.h ============================================================================== --- trunk/src/include/usb_ch9.h Tue May 25 18:00:08 2010 (r5584) +++ trunk/src/include/usb_ch9.h Tue May 25 18:02:28 2010 (r5585) @@ -61,22 +61,21 @@ #define USB_DEVICE_DEBUG_MODE 6 /* (special devices only) */ -//frim usb_ch9.h struct usb_ctrlrequest { - uint8_t bRequestType; - uint8_t bRequest; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; + u8 bRequestType; + u8 bRequest; + u16 wValue; + u16 wIndex; + u16 wLength; } __attribute__ ((packed)); struct usb_debug_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; + u8 bLength; + u8 bDescriptorType; /* bulk endpoints with 8 byte maxpacket */ - uint8_t bDebugInEndpoint; - uint8_t bDebugOutEndpoint; + u8 bDebugInEndpoint; + u8 bDebugOutEndpoint; }; #endif Modified: trunk/src/include/usbdebug_direct.h ============================================================================== --- trunk/src/include/usbdebug_direct.h Tue May 25 18:00:08 2010 (r5584) +++ trunk/src/include/usbdebug_direct.h Tue May 25 18:02:28 2010 (r5585) @@ -15,8 +15,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA */ -#ifndef USBDEBUG_DIRECT_H -#define USBDEBUG_DIRECT_H +#ifndef USBDEBUG_H +#define USBDEBUG_H struct ehci_debug_info { void *ehci_caps; Modified: trunk/src/lib/usbdebug_direct.c ============================================================================== --- trunk/src/lib/usbdebug_direct.c Tue May 25 18:00:08 2010 (r5584) +++ trunk/src/lib/usbdebug_direct.c Tue May 25 18:02:28 2010 (r5585) @@ -342,9 +342,9 @@ #define DBGP_DEBUG 1 #if DBGP_DEBUG -# define dbgp_printk(fmt, arg...) printk(BIOS_DEBUG, fmt, arg) +# define dbgp_printk(fmt_arg...) printk(BIOS_DEBUG, fmt_arg) #else -#define dbgp_printk(fmt, arg...) do {} while(0) +#define dbgp_printk(fmt_arg...) do {} while(0) #endif static void usbdebug_direct_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) { @@ -531,7 +531,7 @@ /* Things didn't work so remove my claim */ ctrl = read32(&ehci_debug->control); ctrl &= ~(DBGP_CLAIM | DBGP_OUT); - write32(&ehci_debug->control, ctrl); + write32((unsigned long)&ehci_debug->control, ctrl); next_debug_port: port_map_tried |= (1<<(debug_port-1)); Modified: trunk/src/mainboard/kontron/986lcd-m/romstage.c ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/romstage.c Tue May 25 18:00:08 2010 (r5584) +++ trunk/src/mainboard/kontron/986lcd-m/romstage.c Tue May 25 18:02:28 2010 (r5585) @@ -50,6 +50,7 @@ #if CONFIG_USBDEBUG_DIRECT #define DBGP_DEFAULT 1 +#include <usbdebug_direct.h> #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" #include "pc80/usbdebug_direct_serial.c" #endif

1 0

Re: [coreboot] Geode db800 vs Wyse S50
by Nils 25 May '10

25 May '10

Hi Oliver, Oliver wrote: >I just found http://www.coreboot.org/AMD_Geode_Porting_Guide over on >the wiki and was wondering if that was maybe slighlty outdated or not >needed for a Wyse S10? The S10 uses similar hardware as the S50. The wiki page is a little outdated. >Actually the only difference is that the S50 has 128kb onboard flash, >so minor difference. Are you sure ? Joseph reported that his S30 uses a cs5535 insted of the cs5536 on the S50. >E.g. If i just build for the S50 in make >menuconfig; I won't need to read that page right? Also it mentions >padding etc on the VSA bin; I take it make menuconfig takes care of >that as well now? Yes,Coreboot is using Kconfig now and doesn`t need a manual adding and padding of the VSA. Only problem is, it seems there is no GX2 VSA on the internet available. I don`t want to discourage you, but there is still a bug in the oprom VSA loading introduced in rev5543 that affects Geodes GX2 and LX. (VSA loading crashes) Greetings,Nils.

4 15

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coreboot May 2010