coreboot May 2010

coreboot@coreboot.org

59 participants
300 discussions

Re: [coreboot] #77: hang on the "Jumping to coreboot" step on via epia-m with 4-chip 128Mbyte DDR module

by coreboot

#77: hang on the "Jumping to coreboot" step on via epia-m with 4-chip 128Mbyte DDR module ------------------------------+--------------------------------------------- Reporter: bam80@… | Owner: somebody Type: defect | Status: new Priority: major | Milestone: Component: coreboot | Keywords: via epia-m ram init jumping to linuxbios hang Dependencies: | Patchstatus: there is no patch ------------------------------+--------------------------------------------- Comment(by stepan): The problem is documented on the VIA Epia-M Wiki page. Only 256MB modules are supported unless someone is willing to fix the code. (It reads like v1 did a better job) -- Ticket URL: <https://tracker.coreboot.org/trac/coreboot/ticket/77#comment:7> coreboot <http://www.coreboot.org/>

10 years, 10 months

#142: remove #warnings in the code

by coreboot

#142: remove #warnings in the code ---------------------------------+------------------------------------------ Reporter: myles | Owner: somebody Type: defect | Status: new Priority: major | Milestone: Component: coreboot | Version: v2 Keywords: | Dependencies: Patchstatus: there is no patch | ---------------------------------+------------------------------------------ #warnings in the code should be converted to tickets in trac, or fixed. Compiler warnings don't seem to be useful to get things fixed. They also obscure real warnings. The medium-term goal would be to have warning-free compilation. After that -Werror would be nice. It seems like a small thing to ask that code compile without warnings. -- Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/142> coreboot <http://www.coreboot.org/>

10 years, 10 months

Trac reminder: list of new ticket(s)

by coreboot tracker

10 years, 10 months

FreeBSD Coreboot support

by Vladimir 'φ-coder/phcoder' Serbinenko

Hello, I was playing with loading FreeBSD using grub2 as bootloader and have met following problems: 1) FreeBSD-i386 makes BIOS calls. On coreboot they cause a crash. I propose to restructure machdep.c to call int12 only if no smap is supplied. Patch attached. Abandon keyboard rate retrieving from BIOS in sys/dev/atkbdc/atkbd.c. Or move this code to bootloader and pass the rate in environment. I'll do the patch when we decide on approach to use. sys/i386/cpufreq/smist.c is unusable and would cause panic. sys/i386/isa/vesa.c usability depends on VGA BIOS. For the last 2 cases and the future I propose to have a flag like hw.no_bios=1 and hw.no_video_bios=1 which would make vm86_intcall and vm86_datacall return an error on intnum!=0x10 / intnum=0x10. Alternatively it's possible to catch the exception in vm8086 mode and return an error instead of panic. 2) The range 0-0x1000 isn't usable on coreboot since it contains coreboot tables which according to an IRC chat I had with devs shouldn't be overwritten. It causes an early hang on i386 or a following panic on amd64: if (basemem == 0) panic("BIOS smap did not include a basemem segment!"); Can FreeBSD avoid using these memory chunks if they are not available? 3) On amd64 if no ACPI tables are present and using serial console userspace is able to write only 16 bytes to console. Kernel messages have no such problem. I'm confused -- Regards Vladimir 'φ-coder/phcoder' Serbinenko

10 years, 10 months

computers with Coreboot BIOS

by Peter Link

Recently I inquired with Inatux Computers, which sells pre-installed systems that include gNewSense and Trisquel, among others, about plans for offering coreboot BIOS as an option. After a few emails back and forth, they quickly added some information on their website on the following page: http://inatux.com/?gnu (text is below) <<<< Free BIOS (Coreboot, etc.): --------------------------- Our computers are not yet available with a Free BIOS, but we are very interested in offering that option in the future. We can build systems with Coreboot as the BIOS, but there will be some limitations as to certain video cards (ATI for 3D), processors, motherboards, memory, WiFi, and other areas as well. Please write us if you are interested. >>>> I think that this is good news, and I hope it gets around. --pete link

10 years, 10 months

Re: [coreboot] Indtast Bcc computers with Coreboot BIOS

by ron minnich

For really practical use of coreboot the mainboards need to come loaded and supported from the vendor. That's what I've been pushing on for the last few years. And vendors are starting to listen -- not because of me, I suspect, but because of their other customers. There are Tier 1 vendors out there talking and others are now telling me they can give me systems with coreboot already on them and that they have coreboot capable people on staff. This is a huge change. None too soon: ARMs are becoming a key part of the server systems available this year and they already have a free bios -- U-boot -- which is one important advantage over x86 systems for many customers. At some point the x86 universe will wake up and realize it has a new competitor, one that is just a bit more open in many ways. Not surprisingly the "EFI for ARM" concept has not gotten very far; I think people want to know what's running on their machines. ron

10 years, 10 months

Indtast Bcc computers with Coreboot BIOS

by anders＠jenbo.dk

What about the video card limits? Mvh Anders ----- Reply message ----- Fra: "bari" <bari(a)onelabs.com> Dato: lør., maj 1, 2010 16:12 Emne: [coreboot] computers with Coreboot BIOS Til: "Joseph Smith" <joe(a)settoplinux.org> Cc: <coreboot(a)coreboot.org>, "Peter Link" <petelink1(a)yahoo.com> Joseph Smith wrote: >> <<<< >> Free BIOS (Coreboot, etc.): >> --------------------------- >> Our >> computers are not yet available with a Free BIOS, but we are very >> interested in offering that option in the future. We can build systems >> with Coreboot as the BIOS, but there will be some limitations as to >> certain video cards (ATI for 3D), processors, motherboards, memory, >> WiFi, and other areas as well. Please write us if you are interested. > > Yes that is good news Pete. > I don't really get the part about "limitations" though, why would those > items have "limitations"? > They probably meant that since there are no modern Intel chipsets or CPU's currently supported by coreboot that this will be limited to AMD only. Plus AMD DDR3 support is only ~1 week old. -Bari -- coreboot mailing list: coreboot(a)coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

10 years, 10 months

run away pci scan

by Marc Jones

I'm working with amd/mahogany_fam10 mainboard and having problems in ramstage. It is going through pci device scanning when it starts finding the same devices again and malloc memory until it dies. It also looks like it never goes down a bridge, always staying on bus0. The problem starts at CPU: APIC: 03, it starts scanning bus0 again. Enumerating buses... Show all devs...Before Device Enumeration. Root Device: enabled 1, 0 resources APIC_CLUSTER: 0: enabled 1, 0 resources APIC: 00: enabled 1, 0 resources PCI_DOMAIN: 0000: enabled 1, 0 resources ... normal device init happens..... CPU: APIC: 00 enabled malloc Enter, size 1092, free_mem_ptr 00270000 malloc 00270000 CPU: APIC: 01 enabled malloc Enter, size 1092, free_mem_ptr 00270444 malloc 00270444 CPU: APIC: 02 enabled malloc Enter, size 1092, free_mem_ptr 00270888 malloc 00270888 CPU: APIC: 03 enabled PCI_DOMAIN: 0000 scanning... Anyone have thoughts on what is happening here? Attached complete serial log. Thanks! Marc -- http://se-eng.com

10 years, 10 months

Re: [coreboot] r5511 broke my compile

by Keith Hui

> On 4/30/10 6:25 AM, Keith Hui wrote: >> $ make >> GEN build.h >> ROMCC romstage.inc >> GEN crt0.S >> CC mainboard/asus/p2b-ls/crt0.s >> CC mainboard/asus/p2b-ls/crt0.initobj.o >> LINK coreboot >> OBJCOPY coreboot.bootblock >> make: *** No rule to make target `src/arch/i386/include/arch/asm.h', >> needed by `build/arch/i386/lib/c_start.o'. Stop. >> >> > > The define ASSEMBLY is now passed by the Makefile for assembler files. > > Hence the asm.h construct is no longer needed. > > Just drop asm.h includes from your code. If you use the post_code() > macro, you can now #include <cpu/x86/post_code.h> instead. I solved the issue by a 'make clean'. Thanks.

10 years, 10 months

Re: [coreboot] Warnings

by Nils

Hi Stefan, First of all thanks for the great improvements in Geode (GX2). On 4/30/10 7:50 PM, Stefan Reinauer wrote: > src/northbridge/amd/gx2/chipsetinit.c:271: warning: suggest > parentheses around '-' inside '<<' > This would need help from someone with a GX2 (or willing to check out the data sheets ;-) I would be happy if i could be of any help with this, I have a GX2 board i can test on. I saw your discussion about the warning before and it inspired me to dedicate my spare free time to again update my working rev5446 patches to current trunk. But unfortunately i can`t get it to work anymore on rev5120 and some other rev`s i tried. (Linux errors out with: "hda: lost interrupt") I will send the details in a separate mail. Thanks,Nils

10 years, 10 months

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coreboot May 2010