coreboot April 2010

coreboot@coreboot.org

64 participants
402 discussions

[PATCH] Istanbul support
by Arne Georg Gleditsch 13 Sep '10

13 Sep '10

Hi, The following patch implements Opteron Fam 10 rev D (aka Istanbul) support for coreboot. I have not updated MAX_CPUS for all fam10 mainboards, but it might make sense to multiply those by 1.5. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch(a)numascale.com> -- Arne.

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workaround for mahogany_fam10. Not a signed-off-by
by Bao, Zheng 11 Sep '10

11 Sep '10

This is for the mahogany_fam10 I just sent. It is not a signed-off-by patch. We need to work it out about this problem. Index: src/northbridge/amd/amdht/h3finit.c =================================================================== --- src/northbridge/amd/amdht/h3finit.c (revision 4521) +++ src/northbridge/amd/amdht/h3finit.c (working copy) @@ -1104,6 +1104,7 @@ AmdPCIRead(currentPtr, &temp); } while (!IS_HT_SLAVE_CAPABILITY(temp)); +#if (CONFIG_HT_CHAIN_UNITID_BASE != 0) AmdPCIReadBits(currentPtr, 25, 21, &unitIDcnt); if ((unitIDcnt + currentBUID > 31) || ((secBus == 0) && (unitIDcnt + currentBUID > 24))) { @@ -1145,7 +1146,7 @@ STOP_HERE; break; } - +#endif AmdPCIReadBits(currentPtr, 26, 26, &temp); pDat->PortList[pDat->TotalLinks*2+1].Link = (u8)temp; pDat->PortList[pDat->TotalLinks*2+1].Pointer = currentPtr; @@ -1156,6 +1157,11 @@ depth++; pDat->TotalLinks++; currentBUID += unitIDcnt; +#if CONFIG_HT_CHAIN_UNITID_BASE == 0 + STOP_HERE; + break; +#endif + } if (pDat->HtBlock->AMD_CB_EventNotify) {

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filo and usb boot
by Masoud Fatollahy 18 Aug '10

18 Aug '10

Hi, Why is it problem to boot from an usb port when we are using linuxbios and filo. as I can see all usb code are there, what is missing? Thanks, /Masoud

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[patch] DDR3 support of AMD Family 10
by Bao, Zheng 11 Aug '10

11 Aug '10

DDR3 supporting is added. More testing need to be done. But we don't have boards that cover all the options. Features that have been tested. The socket AM3 and ASB2. Single rank and double rank DIMM. Features that need to be tested. Socket C32 and G34, I don't know if it is DDR3. Quad rank. Registered DIMM, which is quite complicated and I am not confident about. The tilapia board is the demo that shows the way to use DDR3. It is quite close to mahogany, except tilapia uses AM3. For a new board, just specify the socket type in Kconfig the devicetree.cb. Signed-off-by: Zheng Bao <zheng.bao(a)amd.com>

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#154: Flashing BIOSes from Fujitsu/Siemens is not supported
by coreboot 25 Jul '10

25 Jul '10

#154: Flashing BIOSes from Fujitsu/Siemens is not supported ---------------------------------------+------------------------------------ Reporter: johannesobermayr@… | Owner: carldani Type: enhancement | Status: new Priority: major | Milestone: Component: flashrom | Version: Keywords: | Dependencies: Patchstatus: there is no patch | ---------------------------------------+------------------------------------ As summary says I cannot flash BIOSes provided by Fujitsu/Siemens. You can see BIOS architecture from Fujitsu/Siemens if you download for example this BIOS package (for D1326): http://dl- extern3.treiberupdate.de/download2/123525.EXE I also could not find a suitable converter... -- Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/154> coreboot <http://www.coreboot.org/>

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#134: flashrom crashes acer aspire one laptop
by coreboot 23 Jul '10

23 Jul '10

#134: flashrom crashes acer aspire one laptop -----------------------------------------------------------+---------------- Reporter: Timo Juhani Lindfors <timo.lindfors@…> | Owner: somebody Type: defect | Status: new Priority: minor | Milestone: Component: flashrom | Version: v2 Keywords: aspire laptop | Dependencies: Patchstatus: there is no patch | -----------------------------------------------------------+---------------- I ran the "flashrom" command on my acer aspire one laptop. The display turned black and the system did not respond to even sysrq after that. (Fortunately the system boots after powercycling.) This is debian stable with flashrom package that has version "0.0+r3397-1". -- Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/134> coreboot <http://www.coreboot.org/>

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i840 coreboot challenge
by Joseph Smith 08 Jun '10

08 Jun '10

Hello, I want to propose a "coreboot challenge" to first port coreboot to the i840 chpset, second port coreboot to support a very rare i840 dual cpu board, third instead of RAMBUS (which i840 is designed for) this board uses SDRAM. I think this would be a very interesting port for coreboot. The board is a AMI Megatrends MegaDual. The user manual can be found here: http://www.ami.com/support/doc/MegaDual_mb_man.PDF I have four of these rare boards and am willing to donate three of them (one person each, less shipping costs of course) to anyone who is willing to take on this challenge. Let me know if your interested. P.S.: the first person to boot to a Linux command line gets the grand prize, a big fat cookie :-) -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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Re: [coreboot] SeaBIOS and hp dl145g3
by Kevin O'Connor 26 May '10

26 May '10

On Wed, Apr 29, 2009 at 04:53:13PM +0200, samuel wrote: > Hi Kevin, > > I have tried Seabios on my hp dl145 g3 (the patches from mondrian) and > it works really well now > I was able to load the vga rom and i have output on the screen. Great! > One single problem... It doesn't seem to find the sata controller... > > bootlog with coreboot and seabios: > http://merlin.ugent.be/~samuel/dl145g3/corebootwithseabios.log There isn't much SeaBIOS info in that log - can you recompile with CONFIG_DEBUG_LEVEL set to 6? > > lspci -vnn : http://merlin.ugent.be/~samuel/dl145g3/info/lspci-vnn.txt > > and the original patch from mondrian to add support for the dl145g3 to filo: > http://merlin.ugent.be/~samuel/dl145g3/patch/filo_dl145_sata.patch > > It looks rather simple but I don't see what i have to change in > seabios to support the device. > > The pci id (0x104 is already in pci_ids.h of seabios) so i would think > it should just work. Myles thought it could be related to the fact > that his sata interface of this mainboard does not support a legacy > IDE interface mode. > > You have any ideas how i could quickly add support for the hp dl145 g3 > to SeaBIOS?? The equivalent patch in SeaBIOS would look like: --- a/src/ata.c +++ b/src/ata.c @@ -841,7 +845,8 @@ ata_init() int count=0; int bdf, max; foreachpci(bdf, max) { - if (pci_config_readw(bdf, PCI_CLASS_DEVICE) != PCI_CLASS_STORAGE_IDE) + u16 class = pci_config_readw(bdf, PCI_CLASS_DEVICE); + if (class != PCI_CLASS_STORAGE_IDE && class != PCI_CLASS_STORAGE_RAID) continue; if (count >= ARRAY_SIZE(ATA.channels)) break; -Kevin

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GX2 problems
by Nils 12 May '10

12 May '10

Hi all, Attached patches add the Wyse S50 thin client to Coreboot. I have rev5446 and some older rev`s working here with different hacks but rev5484 and 5520 (and some i tested in between) are not working anymore. Linux gives the following error: "hda: lost interrupt" . Attached also the bootlogs from rev5446 and rev5520. Could somebody give me a hint (or even better a patch) i can try? Although the patches are probably not ready for inclusion: Signed-off-by: Nils Jacobs <njacobs8(a)hetnet.nl> Thanks,Nils.

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Linux booting hangs when booted by FILO
by limp 07 May '10

07 May '10

Hi all, I have loaded coreboot with FILO on a Kontron 986LCD-M board and when I am trying to boot Linux from FILO, it freezes at the "Jumping to entry point..." bit. Found Linux version 2.6.31.6 (limp@ubuntu) #50 Wed Feb 3 15:04:41 GMT 2010 bzIm age. Loading kernel... ok Loading initrd... ok Jumping to entry point... Does anyone have any idea on how to resolve that? Thank you in advance. P.S. please CC me. Regards, limp

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coreboot April 2010