Author: hailfinger
Date: 2008-05-14 01:03:12 +0200 (Wed, 14 May 2008)
New Revision: 3305
Added:
trunk/util/flashrom/it87spi.c
Modified:
trunk/util/flashrom/Makefile
trunk/util/flashrom/flash.h
trunk/util/flashrom/spi.c
Log:
flashrom: Move all IT87xx specific SPI routines from spi.c to a separate
file it87spi.c.
No behavioural changes, but greatly improved SPI abstraction.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Acked-by: Peter Stuge <peter(a)stuge.se>
Modified: trunk/util/flashrom/Makefile
===================================================================
--- trunk/util/flashrom/Makefile 2008-05-13 22:14:21 UTC (rev 3304)
+++ trunk/util/flashrom/Makefile 2008-05-13 23:03:12 UTC (rev 3305)
@@ -24,7 +24,7 @@
sst28sf040.o am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o \
w49f002u.o 82802ab.o msys_doc.o pm49fl004.o sst49lf040.o \
sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o \
- flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o
+ flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o
all: pciutils dep $(PROGRAM)
Modified: trunk/util/flashrom/flash.h
===================================================================
--- trunk/util/flashrom/flash.h 2008-05-13 22:14:21 UTC (rev 3304)
+++ trunk/util/flashrom/flash.h 2008-05-13 23:03:12 UTC (rev 3305)
@@ -360,6 +360,11 @@
int spi_chip_erase_c7(struct flashchip *flash);
int spi_chip_write(struct flashchip *flash, uint8_t *buf);
int spi_chip_read(struct flashchip *flash, uint8_t *buf);
+uint8_t spi_read_status_register();
+void spi_disable_blockprotect(void);
+void spi_byte_program(int address, uint8_t byte);
+void spi_page_program(int block, uint8_t *buf, uint8_t *bios);
+void spi_nbyte_read(int address, uint8_t *bytes, int len);
/* 82802ab.c */
int probe_82802ab(struct flashchip *flash);
@@ -371,6 +376,13 @@
int erase_29f040b(struct flashchip *flash);
int write_29f040b(struct flashchip *flash, uint8_t *buf);
+/* it87spi.c */
+extern uint16_t it8716f_flashport;
+int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
+int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
+int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
+void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios);
+
/* jedec.c */
void toggle_ready_jedec(volatile uint8_t *dst);
void data_polling_jedec(volatile uint8_t *dst, uint8_t data);
Copied: trunk/util/flashrom/it87spi.c (from rev 3302, trunk/util/flashrom/spi.c)
===================================================================
--- trunk/util/flashrom/it87spi.c (rev 0)
+++ trunk/util/flashrom/it87spi.c 2008-05-13 23:03:12 UTC (rev 3305)
@@ -0,0 +1,257 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2007, 2008 Carl-Daniel Hailfinger
+ * Copyright (C) 2008 Ronald Hoogenboom <ronald(a)zonnet.nl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/*
+ * Contains the ITE IT87* SPI specific routines
+ */
+
+#include <stdio.h>
+#include <pci/pci.h>
+#include <stdint.h>
+#include <string.h>
+#include "flash.h"
+#include "spi.h"
+
+#define ITE_SUPERIO_PORT1 0x2e
+#define ITE_SUPERIO_PORT2 0x4e
+
+
+uint16_t it8716f_flashport = 0;
+/* use fast 33MHz SPI (<>0) or slow 16MHz (0) */
+int fast_spi = 1;
+
+/* Generic Super I/O helper functions */
+uint8_t regval(uint16_t port, uint8_t reg)
+{
+ outb(reg, port);
+ return inb(port + 1);
+}
+
+void regwrite(uint16_t port, uint8_t reg, uint8_t val)
+{
+ outb(reg, port);
+ outb(val, port + 1);
+}
+
+/* Helper functions for most recent ITE IT87xx Super I/O chips */
+#define CHIP_ID_BYTE1_REG 0x20
+#define CHIP_ID_BYTE2_REG 0x21
+static void enter_conf_mode_ite(uint16_t port)
+{
+ outb(0x87, port);
+ outb(0x01, port);
+ outb(0x55, port);
+ if (port == ITE_SUPERIO_PORT1)
+ outb(0x55, port);
+ else
+ outb(0xaa, port);
+}
+
+static void exit_conf_mode_ite(uint16_t port)
+{
+ regwrite(port, 0x02, 0x02);
+}
+
+static uint16_t find_ite_spi_flash_port(uint16_t port)
+{
+ uint8_t tmp = 0;
+ uint16_t id, flashport = 0;
+
+ enter_conf_mode_ite(port);
+
+ id = regval(port, CHIP_ID_BYTE1_REG) << 8;
+ id |= regval(port, CHIP_ID_BYTE2_REG);
+
+ /* TODO: Handle more IT87xx if they support flash translation */
+ if (id == 0x8716) {
+ /* NOLDN, reg 0x24, mask out lowest bit (suspend) */
+ tmp = regval(port, 0x24) & 0xFE;
+ printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
+ 0xFFFE0000, 0xFFFFFFFF, (tmp & 1 << 1) ? "en" : "dis");
+ printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
+ 0x000E0000, 0x000FFFFF, (tmp & 1 << 1) ? "en" : "dis");
+ printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
+ 0xFFEE0000, 0xFFEFFFFF, (tmp & 1 << 2) ? "en" : "dis");
+ printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
+ 0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis");
+ printf("LPC write to serial flash %sabled\n",
+ (tmp & 1 << 4) ? "en" : "dis");
+ printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29);
+ /* LDN 0x7, reg 0x64/0x65 */
+ regwrite(port, 0x07, 0x7);
+ flashport = regval(port, 0x64) << 8;
+ flashport |= regval(port, 0x65);
+ }
+ exit_conf_mode_ite(port);
+ return flashport;
+}
+
+int it87xx_probe_spi_flash(const char *name)
+{
+ it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT1);
+ if (!it8716f_flashport)
+ it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT2);
+ return (!it8716f_flashport);
+}
+
+/* The IT8716F only supports commands with length 1,2,4,5 bytes including
+ command byte and can not read more than 3 bytes from the device.
+ This function expects writearr[0] to be the first byte sent to the device,
+ whereas the IT8716F splits commands internally into address and non-address
+ commands with the address in inverse wire order. That's why the register
+ ordering in case 4 and 5 may seem strange. */
+int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
+{
+ uint8_t busy, writeenc;
+ int i;
+
+ do {
+ busy = inb(it8716f_flashport) & 0x80;
+ } while (busy);
+ if (readcnt > 3) {
+ printf("%s called with unsupported readcnt %i.\n",
+ __FUNCTION__, readcnt);
+ return 1;
+ }
+ switch (writecnt) {
+ case 1:
+ outb(writearr[0], it8716f_flashport + 1);
+ writeenc = 0x0;
+ break;
+ case 2:
+ outb(writearr[0], it8716f_flashport + 1);
+ outb(writearr[1], it8716f_flashport + 7);
+ writeenc = 0x1;
+ break;
+ case 4:
+ outb(writearr[0], it8716f_flashport + 1);
+ outb(writearr[1], it8716f_flashport + 4);
+ outb(writearr[2], it8716f_flashport + 3);
+ outb(writearr[3], it8716f_flashport + 2);
+ writeenc = 0x2;
+ break;
+ case 5:
+ outb(writearr[0], it8716f_flashport + 1);
+ outb(writearr[1], it8716f_flashport + 4);
+ outb(writearr[2], it8716f_flashport + 3);
+ outb(writearr[3], it8716f_flashport + 2);
+ outb(writearr[4], it8716f_flashport + 7);
+ writeenc = 0x3;
+ break;
+ default:
+ printf("%s called with unsupported writecnt %i.\n",
+ __FUNCTION__, writecnt);
+ return 1;
+ }
+ /* Start IO, 33 or 16 MHz, readcnt input bytes, writecnt output bytes.
+ * Note:
+ * We can't use writecnt directly, but have to use a strange encoding.
+ */
+ outb(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);
+
+ if (readcnt > 0) {
+ do {
+ busy = inb(it8716f_flashport) & 0x80;
+ } while (busy);
+
+ for (i = 0; i < readcnt; i++) {
+ readarr[i] = inb(it8716f_flashport + 5 + i);
+ }
+ }
+
+ return 0;
+}
+
+/* Page size is usually 256 bytes */
+void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) {
+ int i;
+
+ spi_write_enable();
+ outb(0x06 , it8716f_flashport + 1);
+ outb(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
+ for (i = 0; i < 256; i++) {
+ bios[256 * block + i] = buf[256 * block + i];
+ }
+ outb(0, it8716f_flashport);
+ /* Wait until the Write-In-Progress bit is cleared.
+ * This usually takes 1-10 ms, so wait in 1 ms steps.
+ */
+ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+ usleep(1000);
+}
+
+/*
+ * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
+ * Program chip using firmware cycle byte programming. (SLOW!)
+ */
+int it8716f_over512k_spi_chip_write(struct flashchip *flash, uint8_t *buf)
+{
+ int total_size = 1024 * flash->total_size;
+ int i;
+ fast_spi = 0;
+
+ spi_disable_blockprotect();
+ for (i = 0; i < total_size; i++) {
+ spi_write_enable();
+ spi_byte_program(i, buf[i]);
+ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+ myusec_delay(10);
+ }
+ /* resume normal ops... */
+ outb(0x20, it8716f_flashport);
+ return 0;
+}
+
+/*
+ * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
+ * Need to read this big flash using firmware cycles 3 byte at a time.
+ */
+int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf)
+{
+ int total_size = 1024 * flash->total_size;
+ int i;
+ fast_spi = 0;
+
+ if (total_size > 512 * 1024) {
+ for (i = 0; i < total_size; i += 3) {
+ int toread = 3;
+ if (total_size - i < toread)
+ toread = total_size - i;
+ spi_nbyte_read(i, buf + i, toread);
+ }
+ } else {
+ memcpy(buf, (const char *)flash->virtual_memory, total_size);
+ }
+ return 0;
+}
+
+int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf) {
+ int total_size = 1024 * flash->total_size;
+ int i;
+ if (total_size > 512 * 1024) {
+ it8716f_over512k_spi_chip_write(flash, buf);
+ } else {
+ for (i = 0; i < total_size / 256; i++) {
+ spi_page_program(i, buf, (uint8_t *)flash->virtual_memory);
+ }
+ }
+ return 0;
+}
+
Modified: trunk/util/flashrom/spi.c
===================================================================
--- trunk/util/flashrom/spi.c 2008-05-13 22:14:21 UTC (rev 3304)
+++ trunk/util/flashrom/spi.c 2008-05-13 23:03:12 UTC (rev 3305)
@@ -2,7 +2,6 @@
* This file is part of the flashrom project.
*
* Copyright (C) 2007, 2008 Carl-Daniel Hailfinger
- * Copyright (C) 2008 Ronald Hoogenboom <ronald(a)zonnet.nl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -29,159 +28,9 @@
#include "flash.h"
#include "spi.h"
-#define ITE_SUPERIO_PORT1 0x2e
-#define ITE_SUPERIO_PORT2 0x4e
-
-uint16_t it8716f_flashport = 0;
-/* use fast 33MHz SPI (<>0) or slow 16MHz (0) */
-int fast_spi = 1;
-
void spi_prettyprint_status_register(struct flashchip *flash);
-void spi_disable_blockprotect(void);
-/* Generic Super I/O helper functions */
-uint8_t regval(uint16_t port, uint8_t reg)
-{
- outb(reg, port);
- return inb(port + 1);
-}
-
-void regwrite(uint16_t port, uint8_t reg, uint8_t val)
-{
- outb(reg, port);
- outb(val, port + 1);
-}
-
-/* Helper functions for most recent ITE IT87xx Super I/O chips */
-#define CHIP_ID_BYTE1_REG 0x20
-#define CHIP_ID_BYTE2_REG 0x21
-static void enter_conf_mode_ite(uint16_t port)
-{
- outb(0x87, port);
- outb(0x01, port);
- outb(0x55, port);
- if (port == ITE_SUPERIO_PORT1)
- outb(0x55, port);
- else
- outb(0xaa, port);
-}
-
-static void exit_conf_mode_ite(uint16_t port)
-{
- regwrite(port, 0x02, 0x02);
-}
-
-static uint16_t find_ite_spi_flash_port(uint16_t port)
-{
- uint8_t tmp = 0;
- uint16_t id, flashport = 0;
-
- enter_conf_mode_ite(port);
-
- id = regval(port, CHIP_ID_BYTE1_REG) << 8;
- id |= regval(port, CHIP_ID_BYTE2_REG);
-
- /* TODO: Handle more IT87xx if they support flash translation */
- if (id == 0x8716) {
- /* NOLDN, reg 0x24, mask out lowest bit (suspend) */
- tmp = regval(port, 0x24) & 0xFE;
- printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
- 0xFFFE0000, 0xFFFFFFFF, (tmp & 1 << 1) ? "en" : "dis");
- printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
- 0x000E0000, 0x000FFFFF, (tmp & 1 << 1) ? "en" : "dis");
- printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
- 0xFFEE0000, 0xFFEFFFFF, (tmp & 1 << 2) ? "en" : "dis");
- printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
- 0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis");
- printf("LPC write to serial flash %sabled\n",
- (tmp & 1 << 4) ? "en" : "dis");
- printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29);
- /* LDN 0x7, reg 0x64/0x65 */
- regwrite(port, 0x07, 0x7);
- flashport = regval(port, 0x64) << 8;
- flashport |= regval(port, 0x65);
- }
- exit_conf_mode_ite(port);
- return flashport;
-}
-
-int it87xx_probe_spi_flash(const char *name)
-{
- it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT1);
- if (!it8716f_flashport)
- it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT2);
- return (!it8716f_flashport);
-}
-
-/* The IT8716F only supports commands with length 1,2,4,5 bytes including
- command byte and can not read more than 3 bytes from the device.
- This function expects writearr[0] to be the first byte sent to the device,
- whereas the IT8716F splits commands internally into address and non-address
- commands with the address in inverse wire order. That's why the register
- ordering in case 4 and 5 may seem strange. */
-static int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
-{
- uint8_t busy, writeenc;
- int i;
-
- do {
- busy = inb(it8716f_flashport) & 0x80;
- } while (busy);
- if (readcnt > 3) {
- printf("%s called with unsupported readcnt %i.\n",
- __FUNCTION__, readcnt);
- return 1;
- }
- switch (writecnt) {
- case 1:
- outb(writearr[0], it8716f_flashport + 1);
- writeenc = 0x0;
- break;
- case 2:
- outb(writearr[0], it8716f_flashport + 1);
- outb(writearr[1], it8716f_flashport + 7);
- writeenc = 0x1;
- break;
- case 4:
- outb(writearr[0], it8716f_flashport + 1);
- outb(writearr[1], it8716f_flashport + 4);
- outb(writearr[2], it8716f_flashport + 3);
- outb(writearr[3], it8716f_flashport + 2);
- writeenc = 0x2;
- break;
- case 5:
- outb(writearr[0], it8716f_flashport + 1);
- outb(writearr[1], it8716f_flashport + 4);
- outb(writearr[2], it8716f_flashport + 3);
- outb(writearr[3], it8716f_flashport + 2);
- outb(writearr[4], it8716f_flashport + 7);
- writeenc = 0x3;
- break;
- default:
- printf("%s called with unsupported writecnt %i.\n",
- __FUNCTION__, writecnt);
- return 1;
- }
- /* Start IO, 33 or 16 MHz, readcnt input bytes, writecnt output bytes.
- * Note:
- * We can't use writecnt directly, but have to use a strange encoding.
- */
- outb(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);
-
- if (readcnt > 0) {
- do {
- busy = inb(it8716f_flashport) & 0x80;
- } while (busy);
-
- for (i = 0; i < readcnt; i++) {
- readarr[i] = inb(it8716f_flashport + 5 + i);
- }
- }
-
- return 0;
-}
-
int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
{
if (it8716f_flashport)
@@ -390,28 +239,13 @@
return 0;
}
-/* Page size is usually 256 bytes */
-void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) {
- int i;
-
- spi_write_enable();
- outb(0x06 , it8716f_flashport + 1);
- outb(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
- for (i = 0; i < 256; i++) {
- bios[256 * block + i] = buf[256 * block + i];
- }
- outb(0, it8716f_flashport);
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 1-10 ms, so wait in 1 ms steps.
- */
- while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
- usleep(1000);
-}
-
void spi_page_program(int block, uint8_t *buf, uint8_t *bios)
{
- if (it8716f_flashport)
+ if (it8716f_flashport) {
it8716f_spi_page_program(block, buf, bios);
+ return;
+ }
+ printf_debug("%s called, but no SPI chipset detected\n", __FUNCTION__);
}
/*
@@ -452,30 +286,8 @@
}
}
-/*
- * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
- * Program chip using firmware cycle byte programming. (SLOW!)
- */
-int it8716f_over512k_spi_chip_write(struct flashchip *flash, uint8_t *buf)
+void spi_nbyte_read(int address, uint8_t *bytes, int len)
{
- int total_size = 1024 * flash->total_size;
- int i;
- fast_spi = 0;
-
- spi_disable_blockprotect();
- for (i = 0; i < total_size; i++) {
- spi_write_enable();
- spi_byte_program(i, buf[i]);
- while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
- myusec_delay(10);
- }
- /* resume normal ops... */
- outb(0x20, it8716f_flashport);
- return 0;
-}
-
-void spi_3byte_read(int address, uint8_t *bytes, int len)
-{
const unsigned char cmd[JEDEC_READ_OUTSIZE] = {JEDEC_READ,
(address >> 16) & 0xff,
(address >> 8) & 0xff,
@@ -486,39 +298,19 @@
spi_command(JEDEC_READ_OUTSIZE, len, cmd, bytes);
}
-/*
- * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
- * Need to read this big flash using firmware cycles 3 byte at a time.
- */
int spi_chip_read(struct flashchip *flash, uint8_t *buf)
{
- int total_size = 1024 * flash->total_size;
- int i;
- fast_spi = 0;
-
- if (total_size > 512 * 1024) {
- for (i = 0; i < total_size; i += 3) {
- int toread = 3;
- if (total_size - i < toread)
- toread = total_size - i;
- spi_3byte_read(i, buf + i, toread);
- }
- } else {
- memcpy(buf, (const char *)flash->virtual_memory, total_size);
- }
- return 0;
+ if (it8716f_flashport)
+ return it8716f_spi_chip_read(flash, buf);
+ printf_debug("%s called, but no SPI chipset detected\n", __FUNCTION__);
+ return 1;
}
-int spi_chip_write(struct flashchip *flash, uint8_t *buf) {
- int total_size = 1024 * flash->total_size;
- int i;
- if (total_size > 512 * 1024) {
- it8716f_over512k_spi_chip_write(flash, buf);
- } else {
- for (i = 0; i < total_size / 256; i++) {
- spi_page_program(i, buf, (uint8_t *)flash->virtual_memory);
- }
- }
- return 0;
+int spi_chip_write(struct flashchip *flash, uint8_t *buf)
+{
+ if (it8716f_flashport)
+ return it8716f_spi_chip_write(flash, buf);
+ printf_debug("%s called, but no SPI chipset detected\n", __FUNCTION__);
+ return 1;
}
