coreboot December 2008

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r3804 - trunk/util/flashrom
by svn＠coreboot.org 08 Dec '08

08 Dec '08

Author: stepan Date: 2008-12-08 19:15:10 +0100 (Mon, 08 Dec 2008) New Revision: 3804 Modified: trunk/util/flashrom/flashchips.c Log: Breaks chip info into multiple lines. Signed-off-by: FENG yu ning <fengyuning1984(a)gmail.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/util/flashrom/flashchips.c =================================================================== --- trunk/util/flashrom/flashchips.c 2008-12-06 01:37:09 UTC (rev 3803) +++ trunk/util/flashrom/flashchips.c 2008-12-08 18:15:10 UTC (rev 3804) @@ -29,167 +29,944 @@ * the output of 'flashrom -L' is alphabetically sorted. */ struct flashchip flashchips[] = { - /**********************************************************************************************************************************************************************************************************************/ - /* Vendor Chip Vendor ID Chip ID Total size (kB) Page size (B) Test status Probe function Erase function Write function Read function */ - /**********************************************************************************************************************************************************************************************************************/ - {"AMD", "Am29F002(N)BB", AMD_ID, AM_29F002BB, 256, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_en29f002a}, - {"AMD", "Am29F002(N)BT", AMD_ID, AM_29F002BT, 256, 256, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_en29f002a}, - {"AMD", "Am29F016D", AMD_ID, AM_29F016D, 2048, 64 * 1024, TEST_UNTESTED, probe_29f040b, erase_29f040b, write_29f040b}, - {"AMD", "Am29F040B", AMD_ID, AM_29F040B, 512, 64 * 1024, TEST_OK_PREW, probe_29f040b, erase_29f040b, write_29f040b}, - {"AMD", "Am29LV040B", AMD_ID, AM_29LV040B, 512, 64 * 1024, TEST_UNTESTED, probe_29f040b, erase_29f040b, write_29f040b}, - {"ASD", "AE49F2008", ASD_ID, ASD_AE49F2008, 256, 128, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, - {"Atmel", "AT25DF021", ATMEL_ID, AT_25DF021, 256, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL, spi_chip_read}, - {"Atmel", "AT25DF041A", ATMEL_ID, AT_25DF041A, 512, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL, spi_chip_read}, - {"Atmel", "AT25DF081", ATMEL_ID, AT_25DF081, 1024, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL, spi_chip_read}, - {"Atmel", "AT25DF161", ATMEL_ID, AT_25DF161, 2048, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL, spi_chip_read}, - {"Atmel", "AT25DF321", ATMEL_ID, AT_25DF321, 4096, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Atmel", "AT25DF321A", ATMEL_ID, AT_25DF321A, 4096, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL, spi_chip_read}, - {"Atmel", "AT25DF641", ATMEL_ID, AT_25DF641, 8192, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL, spi_chip_read}, - {"Atmel", "AT25F512B", ATMEL_ID, AT_25F512B, 64, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL, spi_chip_read}, - {"Atmel", "AT25FS010", ATMEL_ID, AT_25FS010, 128, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL, spi_chip_read}, - {"Atmel", "AT25FS040", ATMEL_ID, AT_25FS040, 512, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL, spi_chip_read}, - {"Atmel", "AT26DF041", ATMEL_ID, AT_26DF041, 512, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL /* Incompatible Page write */,spi_chip_read}, - {"Atmel", "AT26DF081A", ATMEL_ID, AT_26DF081A, 1024, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL, spi_chip_read}, - {"Atmel", "AT26DF161", ATMEL_ID, AT_26DF161, 2048, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL, spi_chip_read}, - {"Atmel", "AT26DF161A", ATMEL_ID, AT_26DF161A, 2048, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL, spi_chip_read}, + + /* Vendor, Chip, Vendor ID, Chip ID, + * Total size (kB), Page size (B), + * Test status, + * Probe function, Erase function, Write function, Read function + */ + + {"AMD", "Am29F002(N)BB", AMD_ID, AM_29F002BB, + 256, 256, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_en29f002a + }, + + {"AMD", "Am29F002(N)BT", AMD_ID, AM_29F002BT, + 256, 256, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_en29f002a + }, + + {"AMD", "Am29F016D", AMD_ID, AM_29F016D, + 2048, 64 * 1024, + TEST_UNTESTED, + probe_29f040b, erase_29f040b, write_29f040b + }, + + {"AMD", "Am29F040B", AMD_ID, AM_29F040B, + 512, 64 * 1024, + TEST_OK_PREW, + probe_29f040b, erase_29f040b, write_29f040b + }, + + {"AMD", "Am29LV040B", AMD_ID, AM_29LV040B, + 512, 64 * 1024, + TEST_UNTESTED, + probe_29f040b, erase_29f040b, write_29f040b + }, + + {"ASD", "AE49F2008", ASD_ID, ASD_AE49F2008, + 256, 128, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"Atmel", "AT25DF021", ATMEL_ID, AT_25DF021, + 256, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL, spi_chip_read + }, + + {"Atmel", "AT25DF041A", ATMEL_ID, AT_25DF041A, + 512, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL, spi_chip_read + }, + + {"Atmel", "AT25DF081", ATMEL_ID, AT_25DF081, + 1024, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL, spi_chip_read + }, + + {"Atmel", "AT25DF161", ATMEL_ID, AT_25DF161, + 2048, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL, spi_chip_read + }, + + {"Atmel", "AT25DF321", ATMEL_ID, AT_25DF321, + 4096, 256, + TEST_OK_PREW, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"Atmel", "AT25DF321A", ATMEL_ID, AT_25DF321A, + 4096, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL, spi_chip_read + }, + + {"Atmel", "AT25DF641", ATMEL_ID, AT_25DF641, + 8192, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL, spi_chip_read + }, + + {"Atmel", "AT25F512B", ATMEL_ID, AT_25F512B, + 64, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL, spi_chip_read + }, + + {"Atmel", "AT25FS010", ATMEL_ID, AT_25FS010, + 128, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL, spi_chip_read + }, + + {"Atmel", "AT25FS040", ATMEL_ID, AT_25FS040, + 512, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL, spi_chip_read + }, + + {"Atmel", "AT26DF041", ATMEL_ID, AT_26DF041, + 512, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL /* Incompatible Page write */,spi_chip_read + }, + + {"Atmel", "AT26DF081A", ATMEL_ID, AT_26DF081A, + 1024, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL, spi_chip_read + }, + + {"Atmel", "AT26DF161", ATMEL_ID, AT_26DF161, + 2048, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL, spi_chip_read + }, + + {"Atmel", "AT26DF161A", ATMEL_ID, AT_26DF161A, + 2048, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL, spi_chip_read + }, + /*The AT26DF321 has the same ID as the AT25DF321. */ - /*{"Atmel", "AT26DF321", ATMEL_ID, AT_26DF321, 4096, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL, spi_chip_read},*/ - {"Atmel", "AT26F004", ATMEL_ID, AT_26F004, 512, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL /* Incompatible Page write */,spi_chip_read}, - {"Atmel", "AT29C020", ATMEL_ID, AT_29C020, 256, 256, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_jedec}, - {"Atmel", "AT29C040A", ATMEL_ID, AT_29C040A, 512, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, - {"Atmel", "AT45CS1282", ATMEL_ID, AT_45CS1282, 16896/*!*/,1056/*!*/, TEST_BAD_READ, probe_spi_rdid, NULL, NULL /* Incompatible Page write */, NULL /* Incompatible read */}, /* No power of two sizes */ - {"Atmel", "AT45DB011D", ATMEL_ID, AT_45DB011D, 128/*!*/,256/*!*/, TEST_BAD_READ, probe_spi_rdid, NULL, NULL, NULL}, /* Size can only be determined from status register */ - {"Atmel", "AT45DB021D", ATMEL_ID, AT_45DB021D, 256/*!*/,256/*!*/, TEST_BAD_READ, probe_spi_rdid, NULL, NULL, NULL}, /* Size can only be determined from status register */ - {"Atmel", "AT45DB041D", ATMEL_ID, AT_45DB041D, 512/*!*/,256/*!*/, TEST_BAD_READ, probe_spi_rdid, NULL, NULL, NULL}, /* Size can only be determined from status register */ - {"Atmel", "AT45DB081D", ATMEL_ID, AT_45DB081D, 1024/*!*/,256/*!*/, TEST_BAD_READ, probe_spi_rdid, NULL, NULL, NULL}, /* Size can only be determined from status register */ - {"Atmel", "AT45DB161D", ATMEL_ID, AT_45DB161D, 2048/*!*/,512/*!*/, TEST_BAD_READ, probe_spi_rdid, NULL, NULL, NULL}, /* Size can only be determined from status register */ - {"Atmel", "AT45DB321C", ATMEL_ID, AT_45DB321C, 4224/*!*/,528/*!*/, TEST_BAD_READ, probe_spi_rdid, NULL, NULL, NULL /* Incompatible read */}, /* No power of two sizes */ - {"Atmel", "AT45DB321D", ATMEL_ID, AT_45DB321D, 4096/*!*/,512/*!*/, TEST_BAD_READ, probe_spi_rdid, NULL, NULL, NULL}, /* Size can only be determined from status register */ - {"Atmel", "AT45DB642D", ATMEL_ID, AT_45DB642D, 8192/*!*/,1024/*!*/, TEST_BAD_READ, probe_spi_rdid, NULL, NULL, NULL}, /* Size can only be determined from status register */ - {"Atmel", "AT49F002(N)", ATMEL_ID, AT_49F002N, 256, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_49f002}, - {"Atmel", "AT49F002(N)T", ATMEL_ID, AT_49F002NT, 256, 256, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_49f002}, - {"AMIC", "A25L40P", AMIC_ID, AMIC_A25L40P, 512, 256, TEST_OK_PREW, probe_spi_rdid4, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"AMIC", "A29002B", AMIC_ID_NOPREFIX, AMIC_A29002B, 256, 64 * 1024, TEST_UNTESTED, probe_29f002, erase_29f002, write_29f002}, - {"AMIC", "A29002T", AMIC_ID_NOPREFIX, AMIC_A29002T, 256, 64 * 1024, TEST_OK_PREW, probe_29f002, erase_29f002, write_29f002}, - {"AMIC", "A29040B", AMIC_ID_NOPREFIX, AMIC_A29040B, 512, 64 * 1024, TEST_OK_PR, probe_29f040b, erase_29f040b, write_29f040b}, - {"AMIC", "A49LF040A", AMIC_ID_NOPREFIX, AMIC_A49LF040A, 512, 64 * 1024, TEST_OK_PREW, probe_49fl00x, erase_49fl00x, write_49fl00x}, - {"EMST", "F49B002UA", EMST_ID, EMST_F49B002UA, 256, 4096, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_49f002}, - {"EON", "EN29F002(A)(N)B", EON_ID, EN_29F002B, 256, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_en29f002a}, - {"EON", "EN29F002(A)(N)T", EON_ID, EN_29F002T, 256, 256, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_en29f002a}, - {"Fujitsu", "MBM29F004BC", FUJITSU_ID, MBM29F004BC, 512, 64 * 1024, TEST_UNTESTED, probe_jedec, NULL, NULL}, - {"Fujitsu", "MBM29F004TC", FUJITSU_ID, MBM29F004TC, 512, 64 * 1024, TEST_UNTESTED, probe_jedec, NULL, NULL}, - {"Fujitsu", "MBM29F400BC", FUJITSU_ID, MBM29F400BC, 512, 64 * 1024, TEST_UNTESTED, probe_m29f400bt, erase_m29f400bt, write_coreboot_m29f400bt}, - {"Fujitsu", "MBM29F400TC", FUJITSU_ID, MBM29F400TC, 512, 64 * 1024, TEST_UNTESTED, probe_m29f400bt, erase_m29f400bt, write_coreboot_m29f400bt}, - {"Intel", "82802AB", INTEL_ID, 173, 512, 64 * 1024, TEST_OK_PREW, probe_82802ab, erase_82802ab, write_82802ab}, - {"Intel", "82802AC", INTEL_ID, 172, 1024, 64 * 1024, TEST_OK_PREW, probe_82802ab, erase_82802ab, write_82802ab}, - {"Macronix", "MX25L512", MX_ID, MX_25L512, 64, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Macronix", "MX25L1005", MX_ID, MX_25L1005, 128, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Macronix", "MX25L2005", MX_ID, MX_25L2005, 256, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Macronix", "MX25L4005", MX_ID, MX_25L4005, 512, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Macronix", "MX25L8005", MX_ID, MX_25L8005, 1024, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Macronix", "MX25L1605", MX_ID, MX_25L1605, 2048, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Macronix", "MX25L3205", MX_ID, MX_25L3205, 4096, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Macronix", "MX25L6405", MX_ID, MX_25L6405, 8192, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Macronix", "MX29F002B", MX_ID, MX_29F002B, 256, 64 * 1024, TEST_UNTESTED, probe_29f002, erase_29f002, write_29f002}, - {"Macronix", "MX29F002T", MX_ID, MX_29F002T, 256, 64 * 1024, TEST_UNTESTED, probe_29f002, erase_29f002, write_29f002}, - {"Numonyx", "M25PE10", ST_ID, 0x8011, 128, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_d8, spi_chip_write, spi_chip_read}, - {"Numonyx", "M25PE20", ST_ID, 0x8012, 256, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_d8, spi_chip_write, spi_chip_read}, - {"Numonyx", "M25PE40", ST_ID, 0x8013, 256, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_d8, spi_chip_write, spi_chip_read}, - {"Numonyx", "M25PE80", ST_ID, 0x8014, 1024, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_d8, spi_chip_write, spi_chip_read}, - {"Numonyx", "M25PE16", ST_ID, 0x8015, 2048, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_d8, spi_chip_write, spi_chip_read}, - {"PMC", "Pm25LV010", PMC_ID, PMC_25LV010, 128, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"PMC", "Pm25LV016B", PMC_ID, PMC_25LV016B, 2048, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"PMC", "Pm25LV020", PMC_ID, PMC_25LV020, 256, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"PMC", "Pm25LV040", PMC_ID, PMC_25LV040, 512, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"PMC", "Pm25LV080B", PMC_ID, PMC_25LV080B, 1024, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"PMC", "Pm25LV512", PMC_ID, PMC_25LV512, 64, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"PMC", "Pm49FL002", PMC_ID_NOPREFIX,PMC_49FL002, 256, 16 * 1024, TEST_OK_PREW, probe_49fl00x, erase_49fl00x, write_49fl00x}, - {"PMC", "Pm49FL004", PMC_ID_NOPREFIX,PMC_49FL004, 512, 64 * 1024, TEST_OK_PREW, probe_49fl00x, erase_49fl00x, write_49fl00x}, - {"Sharp", "LHF00L04", SHARP_ID, SHARP_LHF00L04, 1024, 64 * 1024, TEST_UNTESTED, probe_lhf00l04, erase_lhf00l04, write_lhf00l04}, - {"Spansion", "S25FL016A", SPANSION_ID, SPANSION_S25FL016A, 2048, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"SST", "SST25VF016B", SST_ID, SST_25VF016B, 2048, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"SST", "SST25VF032B", SST_ID, SST_25VF032B, 4096, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"SST", "SST25VF040B", SST_ID, SST_25VF040B, 512, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"SST", "SST25VF080B", SST_ID, SST_25VF080B, 1024, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_60_c7, spi_chip_write, spi_chip_read}, - {"SST", "SST28SF040A", SST_ID, SST_28SF040, 512, 256, TEST_UNTESTED, probe_28sf040, erase_28sf040, write_28sf040}, - {"SST", "SST29EE010", SST_ID, SST_29EE010, 128, 128, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_jedec}, - {"SST", "SST29LE010", SST_ID, SST_29LE010, 128, 128, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, - {"SST", "SST29EE020A", SST_ID, SST_29EE020A, 256, 128, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, - {"SST", "SST29LE020", SST_ID, SST_29LE020, 256, 128, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, - {"SST", "SST39SF010A", SST_ID, SST_39SF010, 128, 4096, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_39sf020}, - {"SST", "SST39SF020A", SST_ID, SST_39SF020, 256, 4096, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_39sf020}, - {"SST", "SST39SF040", SST_ID, SST_39SF040, 512, 4096, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_39sf020}, - {"SST", "SST39VF512", SST_ID, SST_39VF512, 64, 4096, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_39sf020}, - {"SST", "SST39VF010", SST_ID, SST_39VF010, 128, 4096, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_39sf020}, - {"SST", "SST39VF020", SST_ID, SST_39VF020, 256, 4096, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_39sf020}, - {"SST", "SST39VF040", SST_ID, SST_39VF040, 512, 4096, TEST_OK_PROBE, probe_jedec, erase_chip_jedec, write_39sf020}, -// assume similar to 004B, ignoring data sheet - {"SST", "SST49LF002A/B", SST_ID, SST_49LF002A, 256, 16 * 1024, TEST_OK_PREW, probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub}, - {"SST", "SST49LF003A/B", SST_ID, SST_49LF003A, 384, 64 * 1024, TEST_UNTESTED, probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub}, - {"SST", "SST49LF004A/B", SST_ID, SST_49LF004A, 512, 64 * 1024, TEST_OK_PREW, probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub}, - {"SST", "SST49LF004C", SST_ID, SST_49LF004C, 512, 4 * 1024, TEST_UNTESTED, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, - {"SST", "SST49LF008A", SST_ID, SST_49LF008A, 1024, 64 * 1024, TEST_OK_PREW, probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub}, - {"SST", "SST49LF008C", SST_ID, SST_49LF008C, 1024, 4 * 1024, TEST_UNTESTED, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, - {"SST", "SST49LF016C", SST_ID, SST_49LF016C, 2048, 4 * 1024, TEST_OK_PREW, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, - {"SST", "SST49LF020A", SST_ID, SST_49LF020A, 256, 16 * 1024, TEST_UNTESTED, probe_jedec, erase_49lf040, write_49lf040}, - {"SST", "SST49LF040", SST_ID, SST_49LF040, 512, 4096, TEST_OK_PREW, probe_jedec, erase_49lf040, write_49lf040}, - {"SST", "SST49LF040B", SST_ID, SST_49LF040B, 512, 64 * 1024, TEST_OK_PREW, probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub}, - {"SST", "SST49LF080A", SST_ID, SST_49LF080A, 1024, 4096, TEST_OK_PREW, probe_jedec, erase_49lf040, write_49lf040}, - {"SST", "SST49LF160C", SST_ID, SST_49LF160C, 2048, 4 * 1024, TEST_OK_PREW, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, - {"ST", "M25P05-A", ST_ID, ST_M25P05A, 64, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"ST", "M25P10-A", ST_ID, ST_M25P10A, 128, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"ST", "M25P20", ST_ID, ST_M25P20, 256, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"ST", "M25P40", ST_ID, ST_M25P40, 512, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"ST", "M25P40-old", ST_ID, ST_M25P40_RES, 512, 256, TEST_UNTESTED, probe_spi_res, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"ST", "M25P80", ST_ID, ST_M25P80, 1024, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"ST", "M25P16", ST_ID, ST_M25P16, 2048, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"ST", "M25P32", ST_ID, ST_M25P32, 4096, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"ST", "M25P64", ST_ID, ST_M25P64, 8192, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"ST", "M25P128", ST_ID, ST_M25P128, 16384, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"ST", "M29F002B", ST_ID, ST_M29F002B, 256, 64 * 1024, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, - {"ST", "M29F002T/NT", ST_ID, ST_M29F002T, 256, 64 * 1024, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, - {"ST", "M29F040B", ST_ID, ST_M29F040B, 512, 64 * 1024, TEST_OK_PREW, probe_29f040b, erase_29f040b, write_29f040b}, - {"ST", "M29F400BT", ST_ID, ST_M29F400BT, 512, 64 * 1024, TEST_UNTESTED, probe_m29f400bt, erase_m29f400bt, write_coreboot_m29f400bt}, - {"ST", "M29W010B", ST_ID, ST_M29W010B, 128, 16 * 1024, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, - {"ST", "M29W040B", ST_ID, ST_M29W040B, 512, 64 * 1024, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, - {"ST", "M50FLW040A", ST_ID, ST_M50FLW040A, 512, 64 * 1024, TEST_UNTESTED, probe_stm50flw0x0x, erase_stm50flw0x0x, write_stm50flw0x0x}, - {"ST", "M50FLW040B", ST_ID, ST_M50FLW040B, 512, 64 * 1024, TEST_UNTESTED, probe_stm50flw0x0x, erase_stm50flw0x0x, write_stm50flw0x0x}, - {"ST", "M50FLW080A", ST_ID, ST_M50FLW080A, 1024, 64 * 1024, TEST_OK_PREW, probe_stm50flw0x0x, erase_stm50flw0x0x, write_stm50flw0x0x}, - {"ST", "M50FLW080B", ST_ID, ST_M50FLW080B, 1024, 64 * 1024, TEST_UNTESTED, probe_stm50flw0x0x, erase_stm50flw0x0x, write_stm50flw0x0x}, - {"ST", "M50FW002", ST_ID, ST_M50FW002, 256, 64 * 1024, TEST_UNTESTED, probe_49lfxxxc, NULL, NULL}, - {"ST", "M50FW016", ST_ID, ST_M50FW016, 2048, 64 * 1024, TEST_UNTESTED, probe_82802ab, erase_82802ab, write_82802ab}, - {"ST", "M50FW040", ST_ID, ST_M50FW040, 512, 64 * 1024, TEST_OK_PREW, probe_82802ab, erase_82802ab, write_82802ab}, - {"ST", "M50FW080", ST_ID, ST_M50FW080, 1024, 64 * 1024, TEST_UNTESTED, probe_82802ab, erase_82802ab, write_82802ab}, - {"ST", "M50LPW116", ST_ID, ST_M50LPW116, 2048, 64 * 1024, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, - {"SyncMOS", "S29C31004T", SYNCMOS_ID, S29C31004T, 512, 128, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_49f002}, - {"SyncMOS", "S29C51001T", SYNCMOS_ID, S29C51001T, 128, 128, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_49f002}, - {"SyncMOS", "S29C51002T", SYNCMOS_ID, S29C51002T, 256, 128, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_49f002}, - {"SyncMOS", "S29C51004T", SYNCMOS_ID, S29C51004T, 512, 128, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_49f002}, - {"Winbond", "W25x10", WINBOND_NEX_ID, W_25X10, 128, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Winbond", "W25x20", WINBOND_NEX_ID, W_25X20, 256, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Winbond", "W25x40", WINBOND_NEX_ID, W_25X40, 512, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Winbond", "W25x80", WINBOND_NEX_ID, W_25X80, 1024, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Winbond", "W29C011", WINBOND_ID, W_29C011, 128, 128, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_jedec}, - {"Winbond", "W29C020C", WINBOND_ID, W_29C020C, 256, 128, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_jedec}, - {"Winbond", "W29C040P", WINBOND_ID, W_29C040P, 512, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, - {"Winbond", "W29EE011", WINBOND_ID, W_29C011, 128, 128, TEST_OK_PREW, probe_w29ee011, erase_chip_jedec, write_jedec}, - {"Winbond", "W39V040A", WINBOND_ID, W_39V040A, 512, 64*1024, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_39sf020}, - {"Winbond", "W39V040B", WINBOND_ID, W_39V040B, 512, 64*1024, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_39sf020}, - {"Winbond", "W39V040C", WINBOND_ID, 0x50, 512, 64*1024, TEST_OK_PREW, probe_w39v040c, erase_w39v040c, write_w39v040c}, - {"Winbond", "W39V040FA", WINBOND_ID, W_39V040FA, 512, 64*1024, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_39sf020}, - {"Winbond", "W39V080A", WINBOND_ID, W_39V080A, 1024, 64*1024, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_39sf020}, - {"Winbond", "W49F002U", WINBOND_ID, W_49F002U, 256, 128, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_49f002}, - {"Winbond", "W49V002A", WINBOND_ID, W_49V002A, 256, 128, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_49f002}, - {"Winbond", "W49V002FA", WINBOND_ID, W_49V002FA, 256, 128, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_49f002}, - {"Winbond", "W39V080FA", WINBOND_ID, W_39V080FA, 1024, 64*1024, TEST_OK_PREW, probe_winbond_fwhub, erase_winbond_fwhub, write_winbond_fwhub}, - {"Winbond", "W39V080FA (dual mode)",WINBOND_ID, W_39V080FA_DM, 512, 64*1024, TEST_UNTESTED, probe_winbond_fwhub, erase_winbond_fwhub, write_winbond_fwhub}, + /*{"Atmel", "AT26DF321", ATMEL_ID, AT_26DF321, + 4096, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL, spi_chip_read + }, + */ - {"Atmel", "unknown Atmel SPI chip",ATMEL_ID, GENERIC_DEVICE_ID, 0, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL}, - {"EON", "unknown EON SPI chip", EON_ID_NOPREFIX,GENERIC_DEVICE_ID, 0, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL}, - {"Macronix", "unknown Macronix SPI chip", MX_ID, GENERIC_DEVICE_ID, 0, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL}, - {"PMC", "unknown PMC SPI chip", PMC_ID, GENERIC_DEVICE_ID, 0, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL}, - {"SST", "unknown SST SPI chip", SST_ID, GENERIC_DEVICE_ID, 0, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL}, - {"ST", "unknown ST SPI chip", ST_ID, GENERIC_DEVICE_ID, 0, 256, TEST_UNTESTED, probe_spi_rdid, NULL, NULL}, + {"Atmel", "AT26F004", ATMEL_ID, AT_26F004, + 512, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL /* Incompatible Page write */,spi_chip_read + }, + {"Atmel", "AT29C020", ATMEL_ID, AT_29C020, + 256, 256, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"Atmel", "AT29C040A", ATMEL_ID, AT_29C040A, + 512, 256, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"Atmel", "AT45CS1282", ATMEL_ID, AT_45CS1282, + 16896/*!*/, 1056/*!*/, + TEST_BAD_READ, + probe_spi_rdid, NULL, NULL /* Incompatible Page write */, NULL /* Incompatible read */ + }, /* No power of two sizes */ + + {"Atmel", "AT45DB011D", ATMEL_ID, AT_45DB011D, + 128/*!*/, 256/*!*/, + TEST_BAD_READ, + probe_spi_rdid, NULL, NULL, NULL + }, /* Size can only be determined from status register */ + + {"Atmel", "AT45DB021D", ATMEL_ID, AT_45DB021D, + 256/*!*/, 256/*!*/, + TEST_BAD_READ, + probe_spi_rdid, NULL, NULL, NULL + }, /* Size can only be determined from status register */ + + {"Atmel", "AT45DB041D", ATMEL_ID, AT_45DB041D, + 512/*!*/, 256/*!*/, + TEST_BAD_READ, + probe_spi_rdid, NULL, NULL, NULL + }, /* Size can only be determined from status register */ + + {"Atmel", "AT45DB081D", ATMEL_ID, AT_45DB081D, + 1024/*!*/, 256/*!*/, + TEST_BAD_READ, + probe_spi_rdid, NULL, NULL, NULL + }, /* Size can only be determined from status register */ + + {"Atmel", "AT45DB161D", ATMEL_ID, AT_45DB161D, + 2048/*!*/, 512/*!*/, + TEST_BAD_READ, + probe_spi_rdid, NULL, NULL, NULL + }, /* Size can only be determined from status register */ + + {"Atmel", "AT45DB321C", ATMEL_ID, AT_45DB321C, + 4224/*!*/, 528/*!*/, + TEST_BAD_READ, + probe_spi_rdid, NULL, NULL, NULL /* Incompatible read */ + }, /* No power of two sizes */ + + {"Atmel", "AT45DB321D", ATMEL_ID, AT_45DB321D, + 4096/*!*/, 512/*!*/, + TEST_BAD_READ, + probe_spi_rdid, NULL, NULL, NULL + }, /* Size can only be determined from status register */ + + {"Atmel", "AT45DB642D", ATMEL_ID, AT_45DB642D, + 8192/*!*/, 1024/*!*/, + TEST_BAD_READ, + probe_spi_rdid, NULL, NULL, NULL + }, /* Size can only be determined from status register */ + + {"Atmel", "AT49F002(N)", ATMEL_ID, AT_49F002N, + 256, 256, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_49f002 + }, + + {"Atmel", "AT49F002(N)T", ATMEL_ID, AT_49F002NT, + 256, 256, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_49f002 + }, + + {"AMIC", "A25L40P", AMIC_ID, AMIC_A25L40P, + 512, 256, + TEST_OK_PREW, + probe_spi_rdid4, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"AMIC", "A29002B", AMIC_ID_NOPREFIX, AMIC_A29002B, + 256, 64 * 1024, + TEST_UNTESTED, + probe_29f002, erase_29f002, write_29f002 + }, + + {"AMIC", "A29002T", AMIC_ID_NOPREFIX, AMIC_A29002T, + 256, 64 * 1024, + TEST_OK_PREW, + probe_29f002, erase_29f002, write_29f002 + }, + + {"AMIC", "A29040B", AMIC_ID_NOPREFIX, AMIC_A29040B, + 512, 64 * 1024, + TEST_OK_PR, + probe_29f040b, erase_29f040b, write_29f040b + }, + + {"AMIC", "A49LF040A", AMIC_ID_NOPREFIX, AMIC_A49LF040A, + 512, 64 * 1024, + TEST_OK_PREW, + probe_49fl00x, erase_49fl00x, write_49fl00x + }, + + {"EMST", "F49B002UA", EMST_ID, EMST_F49B002UA, + 256, 4096, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_49f002 + }, + + {"EON", "EN29F002(A)(N)B", EON_ID, EN_29F002B, + 256, 256, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_en29f002a + }, + + {"EON", "EN29F002(A)(N)T", EON_ID, EN_29F002T, + 256, 256, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_en29f002a + }, + + {"Fujitsu", "MBM29F004BC", FUJITSU_ID, MBM29F004BC, + 512, 64 * 1024, + TEST_UNTESTED, + probe_jedec, NULL, NULL + }, + + {"Fujitsu", "MBM29F004TC", FUJITSU_ID, MBM29F004TC, + 512, 64 * 1024, + TEST_UNTESTED, + probe_jedec, NULL, NULL + }, + + {"Fujitsu", "MBM29F400BC", FUJITSU_ID, MBM29F400BC, + 512, 64 * 1024, + TEST_UNTESTED, + probe_m29f400bt, erase_m29f400bt, write_coreboot_m29f400bt + }, + + {"Fujitsu", "MBM29F400TC", FUJITSU_ID, MBM29F400TC, + 512, 64 * 1024, + TEST_UNTESTED, + probe_m29f400bt, erase_m29f400bt, write_coreboot_m29f400bt + }, + + {"Intel", "82802AB", INTEL_ID, 173, + 512, 64 * 1024, + TEST_OK_PREW, + probe_82802ab, erase_82802ab, write_82802ab + }, + + {"Intel", "82802AC", INTEL_ID, 172, + 1024, 64 * 1024, + TEST_OK_PREW, + probe_82802ab, erase_82802ab, write_82802ab + }, + + {"Macronix", "MX25L512", MX_ID, MX_25L512, + 64, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"Macronix", "MX25L1005", MX_ID, MX_25L1005, + 128, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"Macronix", "MX25L2005", MX_ID, MX_25L2005, + 256, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"Macronix", "MX25L4005", MX_ID, MX_25L4005, + 512, 256, + TEST_OK_PREW, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"Macronix", "MX25L8005", MX_ID, MX_25L8005, + 1024, 256, + TEST_OK_PREW, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"Macronix", "MX25L1605", MX_ID, MX_25L1605, + 2048, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"Macronix", "MX25L3205", MX_ID, MX_25L3205, + 4096, 256, + TEST_OK_PREW, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"Macronix", "MX25L6405", MX_ID, MX_25L6405, + 8192, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"Macronix", "MX29F002B", MX_ID, MX_29F002B, + 256, 64 * 1024, + TEST_UNTESTED, + probe_29f002, erase_29f002, write_29f002 + }, + + {"Macronix", "MX29F002T", MX_ID, MX_29F002T, + 256, 64 * 1024, + TEST_UNTESTED, + probe_29f002, erase_29f002, write_29f002 + }, + + {"Numonyx", "M25PE10", ST_ID, 0x8011, + 128, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_d8, spi_chip_write, spi_chip_read + }, + + {"Numonyx", "M25PE20", ST_ID, 0x8012, + 256, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_d8, spi_chip_write, spi_chip_read + }, + + {"Numonyx", "M25PE40", ST_ID, 0x8013, + 256, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_d8, spi_chip_write, spi_chip_read + }, + + {"Numonyx", "M25PE80", ST_ID, 0x8014, + 1024, 256, + TEST_OK_PREW, + probe_spi_rdid, spi_chip_erase_d8, spi_chip_write, spi_chip_read + }, + + {"Numonyx", "M25PE16", ST_ID, 0x8015, + 2048, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_d8, spi_chip_write, spi_chip_read + }, + + {"PMC", "Pm25LV010", PMC_ID, PMC_25LV010, + 128, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"PMC", "Pm25LV016B", PMC_ID, PMC_25LV016B, + 2048, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"PMC", "Pm25LV020", PMC_ID, PMC_25LV020, + 256, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"PMC", "Pm25LV040", PMC_ID, PMC_25LV040, + 512, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"PMC", "Pm25LV080B", PMC_ID, PMC_25LV080B, + 1024, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"PMC", "Pm25LV512", PMC_ID, PMC_25LV512, + 64, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"PMC", "Pm49FL002", PMC_ID_NOPREFIX, PMC_49FL002, + 256, 16 * 1024, + TEST_OK_PREW, + probe_49fl00x, erase_49fl00x, write_49fl00x + }, + + {"PMC", "Pm49FL004", PMC_ID_NOPREFIX,PMC_49FL004, + 512, 64 * 1024, + TEST_OK_PREW, + probe_49fl00x, erase_49fl00x, write_49fl00x + }, + + {"Sharp", "LHF00L04", SHARP_ID, SHARP_LHF00L04, + 1024, 64 * 1024, + TEST_UNTESTED, + probe_lhf00l04, erase_lhf00l04, write_lhf00l04 + }, + + {"Spansion", "S25FL016A", SPANSION_ID, SPANSION_S25FL016A, + 2048, 256, + TEST_OK_PREW, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"SST", "SST25VF016B", SST_ID, SST_25VF016B, + 2048, 256, + TEST_OK_PREW, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"SST", "SST25VF032B", SST_ID, SST_25VF032B, + 4096, 256, + TEST_OK_PREW, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"SST", "SST25VF040B", SST_ID, SST_25VF040B, + 512, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"SST", "SST25VF080B", SST_ID, SST_25VF080B, + 1024, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_60_c7, spi_chip_write, spi_chip_read + }, + + {"SST", "SST28SF040A", SST_ID, SST_28SF040, + 512, 256, + TEST_UNTESTED, + probe_28sf040, erase_28sf040, write_28sf040 + }, + + {"SST", "SST29EE010", SST_ID, SST_29EE010, + 128, 128, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"SST", "SST29LE010", SST_ID, SST_29LE010, + 128, 128, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"SST", "SST29EE020A", SST_ID, SST_29EE020A, + 256, 128, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"SST", "SST29LE020", SST_ID, SST_29LE020, + 256, 128, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"SST", "SST39SF010A", SST_ID, SST_39SF010, + 128, 4096, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_39sf020 + }, + + {"SST", "SST39SF020A", SST_ID, SST_39SF020, + 256, 4096, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_39sf020 + }, + + {"SST", "SST39SF040", SST_ID, SST_39SF040, + 512, 4096, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_39sf020 + }, + + {"SST", "SST39VF512", SST_ID, SST_39VF512, + 64, 4096, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_39sf020 + }, + + {"SST", "SST39VF010", SST_ID, SST_39VF010, + 128, 4096, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_39sf020 + }, + + {"SST", "SST39VF020", SST_ID, SST_39VF020, + 256, 4096, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_39sf020 + }, + + {"SST", "SST39VF040", SST_ID, SST_39VF040, + 512, 4096, + TEST_OK_PROBE, + probe_jedec, erase_chip_jedec, write_39sf020 + }, /* assume similar to 004B, ignoring data sheet */ + + {"SST", "SST49LF002A/B", SST_ID, SST_49LF002A, + 256, 16 * 1024, + TEST_OK_PREW, + probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub + }, + + {"SST", "SST49LF003A/B", SST_ID, SST_49LF003A, + 384, 64 * 1024, + TEST_UNTESTED, + probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub + }, + + {"SST", "SST49LF004A/B", SST_ID, SST_49LF004A, + 512, 64 * 1024, + TEST_OK_PREW, + probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub + }, + + {"SST", "SST49LF004C", SST_ID, SST_49LF004C, + 512, 4 * 1024, + TEST_UNTESTED, + probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc + }, + + {"SST", "SST49LF008A", SST_ID, SST_49LF008A, + 1024, 64 * 1024, + TEST_OK_PREW, + probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub + }, + + {"SST", "SST49LF008C", SST_ID, SST_49LF008C, + 1024, 4 * 1024, + TEST_UNTESTED, + probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc + }, + + {"SST", "SST49LF016C", SST_ID, SST_49LF016C, + 2048, 4 * 1024, + TEST_OK_PREW, + probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc + }, + + {"SST", "SST49LF020A", SST_ID, SST_49LF020A, + 256, 16 * 1024, + TEST_UNTESTED, + probe_jedec, erase_49lf040, write_49lf040 + }, + + {"SST", "SST49LF040", SST_ID, SST_49LF040, + 512, 4096, + TEST_OK_PREW, + probe_jedec, erase_49lf040, write_49lf040 + }, + + {"SST", "SST49LF040B", SST_ID, SST_49LF040B, + 512, 64 * 1024, + TEST_OK_PREW, + probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub + }, + + {"SST", "SST49LF080A", SST_ID, SST_49LF080A, + 1024, 4096, + TEST_OK_PREW, + probe_jedec, erase_49lf040, write_49lf040 + }, + + {"SST", "SST49LF160C", SST_ID, SST_49LF160C, + 2048, 4 * 1024, + TEST_OK_PREW, + probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc + }, + + {"ST", "M25P05-A", ST_ID, ST_M25P05A, + 64, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"ST", "M25P10-A", ST_ID, ST_M25P10A, + 128, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"ST", "M25P20", ST_ID, ST_M25P20, + 256, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"ST", "M25P40", ST_ID, ST_M25P40, + 512, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"ST", "M25P40-old", ST_ID, ST_M25P40_RES, + 512, 256, + TEST_UNTESTED, + probe_spi_res, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"ST", "M25P80", ST_ID, ST_M25P80, + 1024, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"ST", "M25P16", ST_ID, ST_M25P16, + 2048, 256, + TEST_OK_PREW, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"ST", "M25P32", ST_ID, ST_M25P32, + 4096, 256, + TEST_OK_PREW, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"ST", "M25P64", ST_ID, ST_M25P64, + 8192, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"ST", "M25P128", ST_ID, ST_M25P128, + 16384, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"ST", "M29F002B", ST_ID, ST_M29F002B, + 256, 64 * 1024, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"ST", "M29F002T/NT", ST_ID, ST_M29F002T, + 256, 64 * 1024, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"ST", "M29F040B", ST_ID, ST_M29F040B, + 512, 64 * 1024, + TEST_OK_PREW, + probe_29f040b, erase_29f040b, write_29f040b + }, + + {"ST", "M29F400BT", ST_ID, ST_M29F400BT, + 512, 64 * 1024, + TEST_UNTESTED, + probe_m29f400bt, erase_m29f400bt, write_coreboot_m29f400bt + }, + + {"ST", "M29W010B", ST_ID, ST_M29W010B, + 128, 16 * 1024, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"ST", "M29W040B", ST_ID, ST_M29W040B, + 512, 64 * 1024, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"ST", "M50FLW040A", ST_ID, ST_M50FLW040A, + 512, 64 * 1024, + TEST_UNTESTED, + probe_stm50flw0x0x, erase_stm50flw0x0x, write_stm50flw0x0x + }, + + {"ST", "M50FLW040B", ST_ID, ST_M50FLW040B, + 512, 64 * 1024, + TEST_UNTESTED, + probe_stm50flw0x0x, erase_stm50flw0x0x, write_stm50flw0x0x + }, + + {"ST", "M50FLW080A", ST_ID, ST_M50FLW080A, + 1024, 64 * 1024, + TEST_OK_PREW, + probe_stm50flw0x0x, erase_stm50flw0x0x, write_stm50flw0x0x + }, + + {"ST", "M50FLW080B", ST_ID, ST_M50FLW080B, + 1024, 64 * 1024, + TEST_UNTESTED, + probe_stm50flw0x0x, erase_stm50flw0x0x, write_stm50flw0x0x + }, + + {"ST", "M50FW002", ST_ID, ST_M50FW002, + 256, 64 * 1024, + TEST_UNTESTED, + probe_49lfxxxc, NULL, NULL + }, + + {"ST", "M50FW016", ST_ID, ST_M50FW016, + 2048, 64 * 1024, + TEST_UNTESTED, + probe_82802ab, erase_82802ab, write_82802ab + }, + + {"ST", "M50FW040", ST_ID, ST_M50FW040, + 512, 64 * 1024, + TEST_OK_PREW, + probe_82802ab, erase_82802ab, write_82802ab + }, + + {"ST", "M50FW080", ST_ID, ST_M50FW080, + 1024, 64 * 1024, + TEST_UNTESTED, + probe_82802ab, erase_82802ab, write_82802ab + }, + + {"ST", "M50LPW116", ST_ID, ST_M50LPW116, + 2048, 64 * 1024, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"SyncMOS", "S29C31004T", SYNCMOS_ID, S29C31004T, + 512, 128, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_49f002 + }, + + {"SyncMOS", "S29C51001T", SYNCMOS_ID, S29C51001T, + 128, 128, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_49f002 + }, + + {"SyncMOS", "S29C51002T", SYNCMOS_ID, S29C51002T, + 256, 128, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_49f002 + }, + + {"SyncMOS", "S29C51004T", SYNCMOS_ID, S29C51004T, + 512, 128, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_49f002 + }, + + {"Winbond", "W25x10", WINBOND_NEX_ID, W_25X10, + 128, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"Winbond", "W25x20", WINBOND_NEX_ID, W_25X20, + 256, 256, + TEST_UNTESTED, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"Winbond", "W25x40", WINBOND_NEX_ID, W_25X40, + 512, 256, + TEST_OK_PREW, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"Winbond", "W25x80", WINBOND_NEX_ID, W_25X80, + 1024, 256, + TEST_OK_PREW, + probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read + }, + + {"Winbond", "W29C011", WINBOND_ID, W_29C011, + 128, 128, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"Winbond", "W29C020C", WINBOND_ID, W_29C020C, + 256, 128, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"Winbond", "W29C040P", WINBOND_ID, W_29C040P, + 512, 256, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_jedec + }, + + {"Winbond", "W29EE011", WINBOND_ID, W_29C011, + 128, 128, + TEST_OK_PREW, + probe_w29ee011, erase_chip_jedec, write_jedec + }, + + {"Winbond", "W39V040A", WINBOND_ID, W_39V040A, + 512, 64*1024, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_39sf020 + }, + + {"Winbond", "W39V040B", WINBOND_ID, W_39V040B, + 512, 64*1024, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_39sf020 + }, + + {"Winbond", "W39V040C", WINBOND_ID, 0x50, + 512, 64*1024, + TEST_OK_PREW, + probe_w39v040c, erase_w39v040c, write_w39v040c + }, + + {"Winbond", "W39V040FA", WINBOND_ID, W_39V040FA, + 512, 64*1024, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_39sf020 + }, + + {"Winbond", "W39V080A", WINBOND_ID, W_39V080A, + 1024, 64*1024, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_39sf020 + }, + + {"Winbond", "W49F002U", WINBOND_ID, W_49F002U, + 256, 128, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_49f002 + }, + + {"Winbond", "W49V002A", WINBOND_ID, W_49V002A, + 256, 128, + TEST_OK_PREW, + probe_jedec, erase_chip_jedec, write_49f002 + }, + + {"Winbond", "W49V002FA", WINBOND_ID, W_49V002FA, + 256, 128, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_49f002 + }, + + {"Winbond", "W39V080FA", WINBOND_ID, W_39V080FA, + 1024, 64*1024, + TEST_OK_PREW, + probe_winbond_fwhub, erase_winbond_fwhub, write_winbond_fwhub + }, + + {"Winbond", "W39V080FA (dual mode)", WINBOND_ID, W_39V080FA_DM, + 512, 64*1024, + TEST_UNTESTED, + probe_winbond_fwhub, erase_winbond_fwhub, write_winbond_fwhub + }, + + {"Atmel", "unknown Atmel SPI chip", ATMEL_ID, GENERIC_DEVICE_ID, + 0, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL + }, + + {"EON", "unknown EON SPI chip", EON_ID_NOPREFIX, GENERIC_DEVICE_ID, + 0, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL + }, + + {"Macronix", "unknown Macronix SPI chip", MX_ID, GENERIC_DEVICE_ID, + 0, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL + }, + + {"PMC", "unknown PMC SPI chip", PMC_ID, GENERIC_DEVICE_ID, + 0, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL + }, + + {"SST", "unknown SST SPI chip", SST_ID, GENERIC_DEVICE_ID, + 0, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL + }, + + {"ST", "unknown ST SPI chip", ST_ID, GENERIC_DEVICE_ID, + 0, 256, + TEST_UNTESTED, + probe_spi_rdid, NULL, NULL + }, + {NULL,} };

1 0

[PATCH] flashrom: flashchips.c cosmetic change
by FENG Yu Ning 08 Dec '08

08 Dec '08

Breaks chip info into multiple lines. Patch excerpt: struct flashchip flashchips[] = { - /**********************************************************************************************************************************************************************************************************************/ - /* Vendor Chip Vendor ID Chip ID Total size (kB) Page size (B) Test status Probe function Erase function Write function Read function */ - /**********************************************************************************************************************************************************************************************************************/ - {"AMD", "Am29F002(N)BB", AMD_ID, AM_29F002BB, 256, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_en29f002a}, + + /* Vendor, Chip, Vendor ID, Chip ID, + * Total size (kB), Page size (B), + * Test status, + * Probe function, Erase function, Write function, Read function + */ + + {"AMD", "Am29F002(N)BB", AMD_ID, AM_29F002BB, + 256, 256, + TEST_UNTESTED, + probe_jedec, erase_chip_jedec, write_en29f002a + }, + Signed-off-by: FENG yu ning <fengyuning1984(a)gmail.com>

2 1

superiotool on Asus M2A-VM
by Carl-Daniel Hailfinger 08 Dec '08

08 Dec '08

# superiotool -de superiotool r3784 Found ITE IT8716F (id=0x8716, rev=0x1) at 0x2e Register dump: idx 20 21 22 23 24 2b val 87 16 01 00 00 00 def 87 16 01 00 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 val 00 00 00 00 04 00 80 def 00 03 f0 06 02 00 00 LDN 0x01 (COM1) idx 30 60 61 70 f0 f1 f2 f3 val 01 03 f8 04 00 50 00 7f def 00 03 f8 04 00 50 00 7f LDN 0x02 (COM2) idx 30 60 61 70 f0 f1 f2 f3 val 00 00 00 00 00 50 00 7f def 00 02 f8 03 00 50 00 7f LDN 0x03 (Parallel port) idx 30 60 61 62 63 70 74 f0 val 01 03 78 00 00 07 04 09 def 00 03 78 07 78 07 03 03 LDN 0x04 (Environment controller) idx 30 60 61 62 63 70 f0 f1 f2 f3 f4 f5 f6 val 01 02 28 00 00 00 00 00 0a 00 8a 00 ff def 00 02 90 02 30 09 00 00 00 00 00 NA NA LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 71 f0 val 01 00 60 00 64 01 02 68 def 01 00 60 00 64 01 02 00 LDN 0x06 (Mouse) idx 30 70 71 f0 val 01 0c 02 00 def 00 0c 02 00 LDN 0x07 (GPIO) idx 25 26 27 28 29 2a 2c 60 61 62 63 64 65 70 71 72 73 74 b0 b1 b2 b3 b4 b5 b8 b9 ba bb bc bd c0 c1 c2 c3 c4 c8 c9 ca cb cc e0 e1 e2 e3 e4 f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd val 40 0e 00 42 82 00 1f 00 00 02 20 00 00 00 01 00 38 00 40 0e 00 42 02 80 00 02 00 00 00 00 50 0e 00 42 02 50 0e 00 42 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 32 00 def 01 00 00 40 00 00 00 00 00 00 00 00 00 00 00 20 38 00 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 40 00 01 00 00 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 NA 00 LDN 0x08 (MIDI port) idx 30 60 61 70 f0 val 00 03 00 0a 00 def 00 03 00 0a 00 LDN 0x09 (Game port) idx 30 60 61 val 00 02 01 def 00 02 01 LDN 0x0a (Consumer IR) idx 30 60 61 70 f0 val 00 03 10 0b 06 def 00 03 10 0b 00 Environment controller (0x022d) Register dump: idx 00 04 05 06 07 08 09 0b 0c 10 11 12 13 14 15 16 17 1b 1c 1d 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 48 50 51 52 53 54 56 57 59 5c 5d 5e 5f 60 61 62 63 64 65 68 69 6a 6b 6c 6d 70 71 72 73 74 75 84 85 86 87 88 89 8c 8d 8e 8f 90 91 92 93 94 95 98 99 9a 9b 9c 9d val 11 00 00 00 00 00 80 09 17 d0 d0 ff 33 d7 80 81 82 00 00 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 2d ff 31 7f 7f 7f f3 00 00 00 00 00 00 00 32 7f 3c a0 00 00 32 7f 3c a0 00 7f 7f 7f 00 00 00 ff ff ff ff 00 00 02 00 99 99 7f 7f 7f 00 00 7f 7f 7f 7f 00 00 7f def 18 00 00 00 00 00 80 09 00 NA NA NA 07 50 NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA RR 00 00 7f 7f 7f 00 00 00 00 00 00 00 7f 7f 7f 00 00 7f 7f 7f 7f 00 00 7f 7f 7f 7f 00 00 7f NA NA NA NA 00 00 02 00 99 99 7f 7f 7f 00 00 7f 7f 7f 7f 00 00 7f -- http://www.hailfinger.org/

1 0

#102: flashrom: coreboot ROM image file identification heuristic is broken
by coreboot 08 Dec '08

08 Dec '08

#102: flashrom: coreboot ROM image file identification heuristic is broken -----------------------------------+---------------------------------------- Reporter: stuge | Owner: somebody Type: defect | Status: new Priority: blocker | Milestone: flashrom v1.0 Component: flashrom | Version: Keywords: rom image heuristic | Dependencies: Patchstatus: patch needs work | -----------------------------------+---------------------------------------- Non-coreboot ROM images are incorrectly identified as coreboot images, and arbitrary data is used in flashrom code. The heuristic is far too simplistic, we need a proper signature in all coreboot images. The suggested fix is to add a LAR header to the ROM image, I like that too. When an image is incorrectly identified, junk data used by flashrom typically causes flashrom to segfault. -- Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/102> coreboot <http://www.coreboot.org/>

2 20

Re: [coreboot] Spi flash
by Carl-Daniel Hailfinger 07 Dec '08

07 Dec '08

Hi Yves, please keep the list in CC so they know what's going on. Thanks. On 13.11.2008 18:51, Dupont Yves wrote: > here is the corresponding dump : > > Calibrating delay loop... 326M loops per second, 100 myus = 193 us. OK. > No coreboot table found. > Found chipset "Intel ICH7M", enabling flash write... > BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 > > Root Complex Register Block address = 0xfed1c000 > GCS = 0x460: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI) > [...] > SPI Read Configuration: prefetching disabled, caching enabled, OK. > [...] > Probing for Atmel AT25DF321, 4096 KB: Programming OPCODES... done > RDID returned ff ff ff. > The flash chip doesn't support RDID. > RDID byte 0 parity violation. > probe_spi_rdid_generic: id1 0xff, id2 0xffff > [...] > Probing for ST M25P40-old, 512 KB: RDID returned ff ff ff. > RES returned 13. > But the chip supports RES. > probe_spi_res: id 0x13 > [....] > No EEPROM/flash device found. > The big problem is that ~30 chips from different manufacturers with different sizes all have the same RES ID. I will try to cook up a patch checking REMS (which is more accurate). > It seems to bea SPI flash device but I don't want to open my laptop. > Any idea? > I will create a patch to improve detection, but that may take a week or so. If you don't hear anything back from me in the next 7 days, please ask me for a status. Regards, Carl-Daniel -- http://www.hailfinger.org/

2 4

testing patch and output
by FENG Yu Ning 07 Dec '08

07 Dec '08

Testing Output: Calibrating delay loop... 686M loops per second, 100 myus = 184 us. OK. No coreboot table found. Found chipset "Intel ICH7/ICH7R", enabling flash write... BIOS Lock Enable: enabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x2 tried to set 0xdc to 0x3 on Intel ICH7/ICH7R failed (WARNING ONLY) Root Complex Register Block address = 0xfed1c000 GCS = 0x464: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3020 0x00: 0x8004 (SPIS) 0x02: 0x4030 (SPIC) 0x04: 0x00000000 (SPIA) 0x08: 0x0000000e (SPID0) 0x0c: 0x00000000 (SPID0+4) 0x10: 0x00000000 (SPID1) 0x14: 0x00000000 (SPID1+4) 0x18: 0x00000000 (SPID2) 0x1c: 0x00000000 (SPID2+4) 0x20: 0x00000000 (SPID3) 0x24: 0x00000000 (SPID3+4) 0x28: 0x00000000 (SPID4) 0x2c: 0x00000000 (SPID4+4) 0x30: 0x00000000 (SPID5) 0x34: 0x00000000 (SPID5+4) 0x38: 0x00000000 (SPID6) 0x3c: 0x00000000 (SPID6+4) 0x40: 0x00000000 (SPID7) 0x44: 0x00000000 (SPID7+4) 0x50: 0x00f80000 (BBAR) 0x54: 0x5006 (PREOP) 0x56: 0x123b (OPTYPE) 0x58: 0x05200302 (OPMENU) 0x5c: 0x000100ab (OPMENU+4) 0x60: 0x00000000 (PBR0) 0x64: 0x00000000 (PBR1) 0x68: 0x00000000 (PBR2) 0x6c: 0x00000000 (PBR3) WARNING: SPI Configuration Lockdown activated. SPI Read Configuration: prefetching disabled, caching enabled, FAILED! Probing for SST SST25LF040A, 512 KB: Generating OPCODES... done SPIC before going: 0x4140 test_sst25lf040a: id1 0xbf, id2 0x44. SPIC before going: 0x4030 SPIC before going: 0x406c Transaction error! run OPCODE 0x01 failed SPIC before going: 0x4030 status register: old value = 0x0e, new value = 0x0e. test_sst25lf040a: *** TEST FAILED! *** Found chip "SST SST25LF040A" (512 KB) at physical address 0xfff80000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom(a)coreboot.org if any of the above operations work correctly for you with this flash part. Please include the full output from the program, including chipset found. Thank you for your help! === No operations were specified. -------------------------------------------------------------------------------- Comment on the above output: Despite the "TEST FAILED!" warning, the testing is actually successful, for - 1. The command '0x01'(WRSR) is executed. It is in the existing opmenu(see 0x5c in the well formatted ICH SPI registers) but not in the hardcoded O_ST_M25P. 2. The control register for the ready-to-go WRSR command is assembled correctly with the atomic bit and the index of its required preop EWSR set. See the 2nd "SPIC before going". The flash chip is probed at 0xfff80000, because the vendor BIOS has put the flash chip at the top of the 24-bit address space. -------------------------------------------------------------------------------- diff -uN flashrom/flashchips.c flashrom_test/flashchips.c --- flashrom/flashchips.c 2008-12-08 01:30:19.000000000 +0800 +++ flashrom_test/flashchips.c 2008-12-08 01:24:20.000000000 +0800 @@ -21,6 +21,9 @@ */ #include "flash.h" +#include "spi.h" + +struct preop_opcode_pair pop_sst25lf040a[]; /** * List of supported flash ROM chips. @@ -107,6 +110,7 @@ {"PMC", "Pm49FL004", PMC_ID_NOPREFIX,PMC_49FL004, 512, 64 * 1024, TEST_OK_PREW, probe_49fl00x, erase_49fl00x, write_49fl00x}, {"Sharp", "LHF00L04", SHARP_ID, SHARP_LHF00L04, 1024, 64 * 1024, TEST_UNTESTED, probe_lhf00l04, erase_lhf00l04, write_lhf00l04}, {"Spansion", "S25FL016A", SPANSION_ID, SPANSION_S25FL016A, 2048, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, + {"SST", "SST25LF040A", SST_ID, SST_25LF040A_REMS, 512, 256, TEST_UNTESTED, test_sst25lf040a, NULL, NULL, NULL, pop_sst25lf040a}, {"SST", "SST25VF016B", SST_ID, SST_25VF016B, 2048, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, {"SST", "SST25VF032B", SST_ID, SST_25VF032B, 4096, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, {"SST", "SST25VF040B", SST_ID, SST_25VF040B, 512, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, @@ -193,3 +197,13 @@ {NULL,} }; + +struct preop_opcode_pair pop_sst25lf040a[] = { + {JEDEC_WREN, JEDEC_BYTE_PROGRAM}, + {JEDEC_WREN, 0xaf}, /* AAI */ + {JEDEC_WREN, 0x20}, /* sector erase */ + {JEDEC_WREN, 0x52}, /* block erase */ + {JEDEC_WREN, 0x60}, /* chip erase */ + {JEDEC_EWSR, JEDEC_WRSR}, + {0,} +}; diff -uN flashrom/flash.h flashrom_test/flash.h --- flashrom/flash.h 2008-12-08 01:45:24.000000000 +0800 +++ flashrom_test/flash.h 2008-12-08 01:24:20.000000000 +0800 @@ -294,6 +294,7 @@ * byte of device ID is related to log(bitsize) at least for some chips. */ #define SST_ID 0xBF /* SST */ +#define SST_25LF040A_REMS 0x44 /* REMS or RES opcode */ #define SST_25WF512 0x2501 #define SST_25WF010 0x2502 #define SST_25WF020 0x2503 @@ -577,6 +578,9 @@ void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data); void protect_lhf00l04(volatile uint8_t *bios); +/* sst25lf040a.c */ +int test_sst25lf040a(struct flashchip *flash); + /* sst28sf040.c */ int probe_28sf040(struct flashchip *flash); int erase_28sf040(struct flashchip *flash); diff -uN flashrom/ichspi.c flashrom_test/ichspi.c --- flashrom/ichspi.c 2008-12-08 01:24:48.000000000 +0800 +++ flashrom_test/ichspi.c 2008-12-08 01:24:20.000000000 +0800 @@ -441,6 +441,9 @@ } } + /* DELETE ME! */ + printf_debug("SPIC before going: 0x%04x\n", temp16); + /* Start */ temp16 |= SPIC_SCGO; diff -uN flashrom/Makefile flashrom_test/Makefile --- flashrom/Makefile 2008-12-08 01:30:19.000000000 +0800 +++ flashrom_test/Makefile 2008-12-08 01:24:20.000000000 +0800 @@ -29,7 +29,7 @@ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o \ sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o \ flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \ - ichspi.o w39v040c.o sb600spi.o + ichspi.o w39v040c.o sb600spi.o sst25lf040a.o all: pciutils dep $(PROGRAM) diff -uN flashrom/sst25lf040a.c flashrom_test/sst25lf040a.c --- flashrom/sst25lf040a.c 1970-01-01 08:00:00.000000000 +0800 +++ flashrom_test/sst25lf040a.c 2008-12-08 01:12:47.000000000 +0800 @@ -0,0 +1,56 @@ +#include <stdio.h> +#include <stdint.h> +#include "flash.h" +#include "spi.h" + +int ich_check_opcodes(struct flashchip *flash); + +int test_sst25lf040a(struct flashchip *flash) +{ + uint8_t readarr[2]; + const uint8_t cmd[JEDEC_RES_OUTSIZE] = { JEDEC_RES, 0xf8, 0, 0 }; + const uint8_t cmd_rdsr[JEDEC_RDSR_OUTSIZE] = {JEDEC_RDSR}; + const uint8_t cmd_wrsr[JEDEC_WRSR_OUTSIZE] = {JEDEC_WRSR}; + + switch (flashbus) { + case BUS_TYPE_ICH7_SPI: + case BUS_TYPE_ICH9_SPI: + case BUS_TYPE_VIA_SPI: + + ich_check_opcodes(flash); /* example usage of ich_check_opcodes */ + + if (spi_command(sizeof(cmd), 2, cmd, readarr)) + return 0; + + printf_debug("%s: id1 0x%x, id2 0x%x.\n", __FUNCTION__, readarr[0], + readarr[1]); + + if (readarr[0] != flash->manufacture_id + || readarr[1] != flash->model_id) + return 0; + + /* read current status register */ + spi_command(sizeof(cmd_rdsr), 1, cmd_rdsr, readarr); + + /* try to change the status register */ + readarr[1] = readarr[0] ^ 0x80; /* BPL - block protection lock-down */ + spi_command(sizeof(cmd_wrsr), 1, cmd_wrsr, readarr + 1); + + /* read again */ + spi_command(sizeof(cmd_rdsr), 1, cmd_rdsr, readarr + 1); + + printf_debug("status register: old value = 0x%02x, new value = 0x%02x.\n", readarr[0], readarr[1]); + + printf_debug("%s: *** TEST ", __FUNCTION__); + if (readarr[0] == readarr[1]) + printf_debug("FAILED! ") + else + printf_debug("PASSED! "); + printf_debug("***\n"); + + return 1; + + default: + return 0; + } +} Common subdirectories: flashrom/.svn and flashrom_test/.svn

1 1

[PATCH] flashrom: generates OPCODES from the locked chipset
by FENG Yu Ning 07 Dec '08

07 Dec '08

Generates OPCODES struct from the ICH7/ICH9/VIA chipset if its SPI configuration is locked down. Signed-off-by: FENG yu ning <fengyuning1984(a)gmail.com> Index: flashrom/flash.h =================================================================== --- flashrom/flash.h (revision 3803) +++ flashrom/flash.h (working copy) @@ -51,6 +51,12 @@ #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) +/* for pairing opcodes with their required preop */ +struct preop_opcode_pair { + uint8_t preop; + uint8_t opcode; +}; + struct flashchip { const char *vendor; const char *name; @@ -76,6 +82,8 @@ int (*write) (struct flashchip *flash, uint8_t *buf); int (*read) (struct flashchip *flash, uint8_t *buf); + struct preop_opcode_pair *preop_opcode_pairs; + /* Some flash devices have an additional register space. */ volatile uint8_t *virtual_memory; volatile uint8_t *virtual_registers; Index: flashrom/chipset_enable.c =================================================================== --- flashrom/chipset_enable.c (revision 3803) +++ flashrom/chipset_enable.c (working copy) @@ -47,6 +47,8 @@ flashbus_t flashbus = BUS_TYPE_LPC; void *spibar = NULL; +extern int ichspi_lock; + static int enable_flash_ali_m1533(struct pci_dev *dev, const char *name) { uint8_t tmp; @@ -335,6 +337,7 @@ printf_debug("\n"); if ((*(uint16_t *) spibar) & (1 << 15)) { printf("WARNING: SPI Configuration Lockdown activated.\n"); + ichspi_lock = 1; } break; case BUS_TYPE_ICH9_SPI: Index: flashrom/ichspi.c =================================================================== --- flashrom/ichspi.c (revision 3803) +++ flashrom/ichspi.c (working copy) @@ -101,6 +101,9 @@ #define ICH7_REG_OPTYPE 0x56 /* 16 Bits */ #define ICH7_REG_OPMENU 0x58 /* 64 Bits */ +/* ICH SPI configuration lock-down. May be set during chipset enabling. */ +int ichspi_lock = 0; + typedef struct _OPCODE { uint8_t opcode; //This commands spi opcode uint8_t spi_type; //This commands spi type @@ -147,7 +150,11 @@ #define REGWRITE8(X,Y) (*(uint8_t *)((uint8_t *)spibar+X)=Y) /* Common SPI functions */ +static inline int find_opcode(OPCODES *op, uint8_t opcode); +static inline int find_preop(OPCODES *op, uint8_t preop); +static int generate_opcodes(struct flashchip * flash, OPCODES * op); static int program_opcodes(OPCODES * op); +int ich_check_opcodes(struct flashchip * flash); static int run_opcode(OPCODE op, uint32_t offset, uint8_t datalength, uint8_t * data); static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, @@ -171,6 +178,98 @@ } }; +OPCODES O_EXISTING = {}; + +static inline int find_opcode(OPCODES *op, uint8_t opcode) +{ + int a; + + for (a = 0; a < 8; a++) { + if (op->opcode[a].opcode == opcode) + return a; + } + + return -1; +} + +static inline int find_preop(OPCODES *op, uint8_t preop) +{ + int a; + + for (a = 0; a < 2; a++) { + if (op->preop[a] == preop) + return a; + } + + return -1; +} + +static int generate_opcodes(struct flashchip * flash, OPCODES * op) +{ + int a, b, i; + uint16_t preop, optype; + uint32_t opmenu[2]; + struct preop_opcode_pair *pair; + + if (op == NULL) { + printf_debug("\n%s: null OPCODES pointer!\n", __FUNCTION__); + return -1; + } + + switch (flashbus) { + case BUS_TYPE_ICH7_SPI: + case BUS_TYPE_VIA_SPI: + preop = REGREAD16(ICH7_REG_PREOP); + optype = REGREAD16(ICH7_REG_OPTYPE); + opmenu[0] = REGREAD32(ICH7_REG_OPMENU); + opmenu[1] = REGREAD32(ICH7_REG_OPMENU + 4); + break; + case BUS_TYPE_ICH9_SPI: + preop = REGREAD16(ICH9_REG_PREOP); + optype = REGREAD16(ICH9_REG_OPTYPE); + opmenu[0] = REGREAD32(ICH9_REG_OPMENU); + opmenu[1] = REGREAD32(ICH9_REG_OPMENU + 4); + break; + default: + printf_debug("%s: unsupported chipset\n", __FUNCTION__); + return -1; + } + + op->preop[0] = (uint8_t) preop; + op->preop[1] = (uint8_t) (preop >> 8); + + for (a = 0; a < 8; a++) { + op->opcode[a].spi_type = (uint8_t) (optype & 0x3); + optype >>= 2; + } + + for (a = 0; a < 4; a++) { + op->opcode[a].opcode = (uint8_t) (opmenu[0] & 0xff); + opmenu[0] >>= 8; + } + + for (a = 4; a < 8; a++) { + op->opcode[a].opcode = (uint8_t) (opmenu[1] & 0xff); + opmenu[1] >>= 8; + } + + /* atomic (link opcode with required pre-op) */ + for (a = 4; a < 8; a++) + op->opcode[a].atomic = 0; + + pair = flash->preop_opcode_pairs; + if (pair) { + for (i = 0; pair[i].opcode; i++) { + a = find_opcode(op, pair[i].opcode); + b = find_preop(op, pair[i].preop); + if ((a != -1) && (b != -1)) + op->opcode[a].atomic = (uint8_t) ++b; + } + } + + return 0; +} + int program_opcodes(OPCODES * op) { uint8_t a; @@ -224,6 +323,41 @@ return 0; } +/* This function generates OPCODES from or programs OPCODES to the chipset + * according to its SPI configuration lock. + * + * It should be called in the ICH7/ICH9/VIA part of each operation driver(i.e. + * probe, read, erase, write, etc.) before any command is sent. + */ +int ich_check_opcodes(struct flashchip * flash) +{ + int rc = 0; + OPCODES *curopcodes_done; + + if (curopcodes) + return 0; + + if (ichspi_lock) { + printf_debug("Generating OPCODES... "); + curopcodes_done = &O_EXISTING; + rc = generate_opcodes(flash, curopcodes_done); + } else { + printf_debug("Programming OPCODES... "); + curopcodes_done = &O_ST_M25P; + rc = program_opcodes(curopcodes_done); + } + + if (rc) { + curopcodes = NULL; + printf_debug("failed\n"); + return 1; + } else { + curopcodes = curopcodes_done; + printf_debug("done\n"); + return 0; + } +} + static int ich7_run_opcode(OPCODE op, uint32_t offset, uint8_t datalength, uint8_t * data, int maxdata) {

1 0

Dynamic detection of Parallel Port
by Joseph Smith 07 Dec '08

07 Dec '08

Hello, For the Paraflasher project I would like to setup a function to automatically detect the presence of the PC's parallel ports and their base addresses. This way it doesn't need to be hard-coded into the program. I was thinking of using /proc/ioports to do this but I am not really sure how to do this in C. Here is what I am thinking: 1. First use grep -c paraport /proc/ioports to check if we have multiple parallel ports and maybe setup loop for it. 2. Then grep paraport /proc/ioports again to get the base address of each parallel port detected. This is where I am stuck. I just need to turn the first 4 characters (base address) into a variable. Can anyone help??? -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

6 15

EPIA MII
by Tamas Szabo 07 Dec '08

07 Dec '08

Hello, Can someone point to a guide which helps me how to make my EPIA working with the latest coreboot and filo? Thx, /sza2

2 2

[RFC] coreboot image marker
by Carl-Daniel Hailfinger 07 Dec '08

07 Dec '08

I'd like to introduce a reasonably safe way to detect whether an image is a coreboot image. Goals: - Easy to implement - Good for visual inspection of a image file with hexdump - Fixed location to make detection easy - Independence of the format of the image data - Reusable even if we decide to change the image data format completely The existing solutions and approached do not fulfill all (or even any) of the goals above. Proposal: Use the top 8 bytes of an image to store a short signature and a pointer to the real data. If the signature is 4 bytes and the pointer is 4 bytes, they fit exactly into the range 0xfffffff8-0xffffffff. The reset vector lives at 0xfffffff0 and it is a jump instruction with immediate operand. The instruction is 1 byte, the operand is 2 bytes (well, 4 bytes in reality due to binutils workarounds, but as the code is 16bit, only the first two bytes are evaluated). The space after the reset vector is not usable for code because you could only fit ~2-3 instructions there before needing another jump and that would complicate things a lot. So anything from 0xfffffff3 onwards (0xfffffff5 onwards if you consider the binutils workaround) is fair game for a signature or any other helpful construct. The LAR utility stores the 32-bit length of the archive at 0xfffffff4. That means the space 0xfffffff8-0xffffffff is up for grabs. We could use the top 8 bytes for the following signature: 0xfffffff8-0xfffffffb: String (not NULL terminated) 'cb30' 0xfffffffc-0xffffffff: Relative location/pointer to a to-be-designed struct This has the advantage of separating the information storage format from locating the information. If the string is 'cb30', follow the pointer and try to understand the storage format. If you can't decipher the storage format, you know that it is a coreboot image with an unsupported/unknown information storage format and you can tell the user to upgrade flashrom or whatever tool he/she is using to work on that image. We could even use the pointer to point to existing image information in v2 (which is currently searched for with exceessively ugly heuristics) and point to a LAR entry in v3 as needed. Thoughts? Comments? The v3 patch below illustrates the idea, but it does not yet fill in the pointer. Index: arch/x86/stage0_common.S =================================================================== --- arch/x86/stage0_common.S (Revision 1065) +++ arch/x86/stage0_common.S (Arbeitskopie) @@ -156,10 +156,12 @@ * instead of the weird 16 bit relocations that binutils does not * handle consistenly between versions because they are used so rarely. */ -.byte 0 + /* 3 filler bytes to have the signature at 0xfffff8. */ +.byte 0,0,0 -/* Date? ID string? We might want to put something else in here. */ -.ascii DATE +/* Signature together with a pointer to a struct with more information. */ +.ascii "cb30" +.long 0 /* Checksum. */ /* .word 0 */ Regards, Carl-Daniel -- http://www.hailfinger.org/

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coreboot December 2008