coreboot November 2008

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490 discussions

[PATCH] v3: Fix parts of the Winbond W83627HF dts
by Uwe Hermann 17 Nov '08

17 Nov '08

See patch. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

4 5

Re: [coreboot] [patch] i82810 WIP for fixing VGA and 512MB
by z4ziggy＠gmail.com 17 Nov '08

17 Nov '08

On Nov 17, 2008 2:47pm, Joseph Smith <joe(a)settoplinux.org> wrote: > > > > > > > On Mon, 17 Nov 2008 06:13:16 +0200, "Elia Yehuda" > > wrote: > > > On Mon, Nov 17, 2008 at 5:30 AM, Joseph Smith > > wrote: > > > > > >> > > >> > > >> > > >> On Mon, 17 Nov 2008 04:25:34 +0200, "Elia Yehuda" > > >> wrote: > > >> > Those 2 patches are one step towards having a working Onboard-VGA > > >> > and 512MB (the max for i810). The raminit.c patch fixes some > > >> > misconfigurations and probes the DIMMs correctly (all dual-sided are > > >> > now recognized properly), and also set buffer_strength to handle 2 > > >> > DIMMs although atm this doesn't work. The i82810/northbridge.c patch > > >> > takes care of allocating Onboard-VGA memory. > > >> > > > >> > Signed-off-by: Elia Yehuda > > >> > > >> Sorry I'm going to have to nack your northbridge.patch. > > >> > > >> Your VGA memory has to be subtracted from tomk in kb,like this: > > >> > > >> #ifdef CONFIG_VIDEO_MB > > >> /* check for VGA reserved memory > > >> * possible CONFIG_VIDEO_MB values are 512(kb) and 1(mb) > > >> */ > > >> if (CONFIG_VIDEO_MB == 512) { > > >> tomk -= 512; > > >> } else if (CONFIG_VIDEO_MB == 1) { > > >> tomk -= 1024; > > >> } else { > > >> /* assume no vga if incorrect value */ > > >> tomk == tomk; > > >> #endif > > >> > > > > > > > > > the place ive added this is when tomk is still set as MBs. Ofcourse i can > > > move > > > this a few lines down after tomk is converted to KBs. Ive just put it > > > there > > > to be > > > before the printk_debug("Setting RAM size to %d MB\n", tomk) so we can > > see > > > how much MBs are subtracted from tomk. > > > > > You will have to do that to make the 512 work. Or, what is the point in > > showing it in MB's, just for user aesthetics? It would be much more > > accurate to show it in kb's correct? Especially if your only subtracting > > 512kb. I would recomend changing this to kb's in the first place, that is > > what tomk stands for (top of memory in kb's). > > > > tomk += ((unsigned long)(translate_i82810_to_mb[drp_value]) * 1024); k, i'll put that after tomk is converted to KBs, and report of the subtracted KBs with another printk_debug() - its too important to ignore (to make sure VGA memory is allocated). > > > > > > > > --------------------------------------------------------------------------------- > > > > > > /* set System Management RAM Control Register / Graphics Mode Select > > > */ > > > value = pci_read_config8(ctrl->d0, SMRAM); > > > /* Set size for Onboard-VGA framebuffer. */ > > > switch (CONFIG_VIDEO_MB) { > > > case 512: /* 512K of memory */ > > > val = 0x2; > > > break; > > > case 1: /* 1M of memory */ > > > val = 0x3; > > > break; > > > default: /* No VGA memory */ > > > /* Preserve bits except for GMS */ > > > value &= 0x3f; > > > pci_write_config16(ctrl->d0, SMRAM, value); > > > val = 0x0; > > > } > > > value |= val > > /* set AB segment Enabled as SMM RAM */ > > > value |= 0x0C; > > > pci_write_config8(ctrl->d0, SMRAM, value); > > > > > > > > Yup that looks good, of course I haven'ta chance to compaire it to the > > datasheet. So make sure you test it. This should go in raminit.c where you > > set the SMRAM register. yep, here is the revised and tested code : /* set System Management RAM Control Register / Graphics Mode Select */ value = pci_read_config8(ctrl->d0, SMRAM); /* Set size for Onboard-VGA framebuffer. */ switch (CONFIG_VIDEO_MB) { case 512: /* 512K of memory */ val = 0x2; break; case 1: /* 1M of memory */ val = 0x3; break; default: /* No VGA memory */ /* Preserve bits except for GMS */ value &= 0x3f; val = 0x0; break; } value |= val << 6; /* set AB segment Enabled as SMM RAM */ value |= 0x0C; pci_write_config8(ctrl->d0, SMRAM, value); many thanks for your advices. also, if someone else could test the patches or have any insight regarding the 2nd DIMM issue i'll appreciate it. Elia. > > > > -- > > Thanks, > > Joseph Smith > > Set-Top-Linux > > www.settoplinux.org > > >

1 0

r1037 - coreboot-v3/mainboard/artecgroup/dbe62
by svn＠coreboot.org 17 Nov '08

17 Nov '08

Author: mraudsepp Date: 2008-11-17 11:31:40 +0100 (Mon, 17 Nov 2008) New Revision: 1037 Modified: coreboot-v3/mainboard/artecgroup/dbe62/initram.c Log: artecgroup/dbe62: Remove old memory setup related commented out calls and touch up a comment. I see no reason to have these memory work related debug calls commented out in the code, everyone should know what to locally temporarily add to debug this. Signed-off-by: Mart Raudsepp <mart.raudsepp(a)artecdesign.ee> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: coreboot-v3/mainboard/artecgroup/dbe62/initram.c =================================================================== --- coreboot-v3/mainboard/artecgroup/dbe62/initram.c 2008-11-16 22:59:52 UTC (rev 1036) +++ coreboot-v3/mainboard/artecgroup/dbe62/initram.c 2008-11-17 10:31:40 UTC (rev 1037) @@ -116,15 +116,13 @@ } /** - * main for initram for the PC Engines Alix 1C. It might seem that you - * could somehow do these functions in, e.g., the cpu code, but the + * main for initram for the Artec Group ThinCan DBE62. It might seem that + * you could somehow do these functions in, e.g., the cpu code, but the * order of operations and what those operations are is VERY strongly * mainboard dependent. It's best to leave it in the mainboard code. */ int main(void) { - void dumplxmsrs(void); - printk(BIOS_DEBUG, "Hi there from stage1\n"); post_code(POST_START_OF_MAIN); @@ -149,13 +147,6 @@ sdram_enable(DIMM0, DIMM1); printk(BIOS_DEBUG, "done sdram enable\n"); - /*dumplxmsrs();*/ - /* Check low memory */ - /* The RAM is working now. Leave this test commented out but - * here for reference. - * Note that the range 0x87000 will fail; that's the stack! */ - /* ram_check(0x00000000, 640*1024);*/ - printk(BIOS_DEBUG, "stage1 returns\n"); return 0; }

1 0

[PATCH] artecgroup/dbe62: Remove a stale useless dumplxmsrs call and touch up a comment
by Mart Raudsepp 17 Nov '08

17 Nov '08

artecgroup/dbe62: Remove a stale useless dumplxmsrs call and touch up a comment The dumplxmsrs call, that this change removes, is done before raminit even sets those regs to something useful Signed-off-by: Mart Raudsepp <mart.raudsepp(a)artecdesign.ee> --- mainboard/artecgroup/dbe62/initram.c | 6 ++---- 1 files changed, 2 insertions(+), 4 deletions(-) diff --git a/mainboard/artecgroup/dbe62/initram.c b/mainboard/artecgroup/dbe62/initram.c index aebefc3..97b75bb 100644 --- a/mainboard/artecgroup/dbe62/initram.c +++ b/mainboard/artecgroup/dbe62/initram.c @@ -116,15 +116,13 @@ static void mb_gpio_init(void) } /** - * main for initram for the PC Engines Alix 1C. It might seem that you - * could somehow do these functions in, e.g., the cpu code, but the + * main for initram for the Artec Group ThinCan DBE62. It might seem that + * you could somehow do these functions in, e.g., the cpu code, but the * order of operations and what those operations are is VERY strongly * mainboard dependent. It's best to leave it in the mainboard code. */ int main(void) { - void dumplxmsrs(void); - printk(BIOS_DEBUG, "Hi there from stage1\n"); post_code(POST_START_OF_MAIN); -- 1.6.0.2

3 3

r1036 - in coreboot-v3: . arch/x86 lib util/x86emu/include/x86emu util/x86emu/x86emu
by svn＠coreboot.org 16 Nov '08

16 Nov '08

Author: hailfinger Date: 2008-11-16 23:59:52 +0100 (Sun, 16 Nov 2008) New Revision: 1036 Modified: coreboot-v3/Makefile coreboot-v3/arch/x86/Makefile coreboot-v3/arch/x86/coreboot_table.c coreboot-v3/lib/Makefile coreboot-v3/lib/console.c coreboot-v3/util/x86emu/include/x86emu/x86emu.h coreboot-v3/util/x86emu/x86emu/sys.c Log: Not a single file is being rebuilt in v3 if build.h changes. That means the console banner and the option table will never be updated with more recent build.h strings. Thanks to Mart Raudsepp for spotting this oddness. x86emu doesn't care about the contents of build.h, it just uses build.h to check whether it is compiled in conjunction with coreboot. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: coreboot-v3/Makefile =================================================================== --- coreboot-v3/Makefile 2008-11-16 16:09:09 UTC (rev 1035) +++ coreboot-v3/Makefile 2008-11-16 22:59:52 UTC (rev 1036) @@ -88,8 +88,7 @@ -I$(src)/include \ -I$(src)/include/arch/$(ARCH)/ \ -I$(src)/mainboard/$(MAINBOARDDIR)/ \ - -include $(obj)/config.h \ - -include $(obj)/build.h + -include $(obj)/config.h CC := $(CC_$(ARCH)) AS := $(AS_$(ARCH)) Modified: coreboot-v3/arch/x86/Makefile =================================================================== --- coreboot-v3/arch/x86/Makefile 2008-11-16 16:09:09 UTC (rev 1035) +++ coreboot-v3/arch/x86/Makefile 2008-11-16 22:59:52 UTC (rev 1036) @@ -248,6 +248,11 @@ # Build rules. # +$(obj)/arch/x86/coreboot_table.o: $(src)/arch/x86/coreboot_table.c $(obj)/build.h + $(Q)mkdir -p $(dir $@) + $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(CC) $(INITCFLAGS) -c $< -o $@ + $(obj)/arch/x86/%.o: $(src)/arch/x86/%.c $(Q)mkdir -p $(dir $@) $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" Modified: coreboot-v3/arch/x86/coreboot_table.c =================================================================== --- coreboot-v3/arch/x86/coreboot_table.c 2008-11-16 16:09:09 UTC (rev 1035) +++ coreboot-v3/arch/x86/coreboot_table.c 2008-11-16 22:59:52 UTC (rev 1036) @@ -31,6 +31,7 @@ //#include <pirq_routing.h> //#include <smp/mpspec.h> //#include <acpi.h> +#include <build.h> struct lb_header *lb_table_init(unsigned long addr) { Modified: coreboot-v3/lib/Makefile =================================================================== --- coreboot-v3/lib/Makefile 2008-11-16 16:09:09 UTC (rev 1035) +++ coreboot-v3/lib/Makefile 2008-11-16 22:59:52 UTC (rev 1036) @@ -44,6 +44,11 @@ nrv2b: endif +$(obj)/lib/console.o: $(src)/lib/console.c $(obj)/build.h + $(Q)mkdir -p $(dir $@) + $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(CC) $(INITCFLAGS) -c $< -o $@ + $(obj)/lib/%.o: $(src)/lib/%.c $(Q)mkdir -p $(dir $@) $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" Modified: coreboot-v3/lib/console.c =================================================================== --- coreboot-v3/lib/console.c 2008-11-16 16:09:09 UTC (rev 1035) +++ coreboot-v3/lib/console.c 2008-11-16 22:59:52 UTC (rev 1036) @@ -6,6 +6,7 @@ #include <stdarg.h> #include <string.h> #include <globalvars.h> +#include <build.h> int vtxprintf(void (*)(unsigned char, void *arg), void *arg, const char *, va_list); Modified: coreboot-v3/util/x86emu/include/x86emu/x86emu.h =================================================================== --- coreboot-v3/util/x86emu/include/x86emu/x86emu.h 2008-11-16 16:09:09 UTC (rev 1035) +++ coreboot-v3/util/x86emu/include/x86emu/x86emu.h 2008-11-16 22:59:52 UTC (rev 1036) @@ -43,7 +43,7 @@ #define __X86EMU_X86EMU_H /* FIXME: undefine printk for the moment */ -#ifdef COREBOOT_VERSION +#if 1 /* Coreboot needs to map prinkf to printk. */ #include <console.h> #define printk(x...) printk(BIOS_DEBUG, x) #else Modified: coreboot-v3/util/x86emu/x86emu/sys.c =================================================================== --- coreboot-v3/util/x86emu/x86emu/sys.c 2008-11-16 16:09:09 UTC (rev 1035) +++ coreboot-v3/util/x86emu/x86emu/sys.c 2008-11-16 22:59:52 UTC (rev 1036) @@ -45,7 +45,7 @@ #include <x86emu/regs.h> #include "debug.h" #include "prim_ops.h" -#ifdef COREBOOT_VERSION +#if 1 /* Coreboot needs to map prinkf to printk. */ #include "io.h" #else #include <sys/io.h>

1 0

ubuntu help!
by ron minnich 16 Nov '08

16 Nov '08

we're getting lots of good emails from the help ubuntu post. I am worried we're going to lose those people in the daily traffic. Would someone or someones be weilling to be our ubuntu contact/ambassador? The goal is to make sure the people contributing feel welcome and continue the dialogue with ubuntu. thanks ron

5 6

Build tutorials in the wiki
by Carl-Daniel Hailfinger 16 Nov '08

16 Nov '08

Hi, I noticed that we have lots of pages in the wiki called "xyz Build Tutorial", but most of them are only incomplete status pages and don't even mention which target to use. I'm proposing a mass rename of these pages to "yxz Status" to reflect their contents more accurately. Pages which contain real build intructions will of course keep their name. Regards, Carl-Daniel -- http://www.hailfinger.org/

3 2

[PATCH] v3: Fix Gigabyte M57SLI compilation
by Carl-Daniel Hailfinger 16 Nov '08

16 Nov '08

Gigabyte M57SLI compilation is broken in v3. With a small makefile and dts change, the target compiles again. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: corebootv3-m57sli_compilefix/mainboard/gigabyte/m57sli/dts =================================================================== --- corebootv3-m57sli_compilefix/mainboard/gigabyte/m57sli/dts (Revision 1032) +++ corebootv3-m57sli_compilefix/mainboard/gigabyte/m57sli/dts (Arbeitskopie) @@ -55,5 +55,9 @@ /config/("southbridge/nvidia/mcp55/sata.dts"); }; }; + ioport@2e { + /config/("superio/ite/it8716f/dts"); + com1enable = "1"; + }; }; }; Index: corebootv3-m57sli_compilefix/mainboard/gigabyte/m57sli/Makefile =================================================================== --- corebootv3-m57sli_compilefix/mainboard/gigabyte/m57sli/Makefile (Revision 1032) +++ corebootv3-m57sli_compilefix/mainboard/gigabyte/m57sli/Makefile (Arbeitskopie) @@ -21,6 +21,7 @@ STAGE0_MAINBOARD_SRC := $(src)/lib/clog2.c \ $(src)/mainboard/$(MAINBOARDDIR)/stage1.c \ + $(src)/arch/x86/resourcemap.c \ $(src)/arch/x86/stage1_mtrr.c \ $(src)/arch/x86/amd/model_fxx/dualcore_id.c \ $(src)/arch/x86/amd/model_fxx/stage1.c \ -- http://www.hailfinger.org/

2 2

r1035 - coreboot-v3/mainboard/gigabyte/m57sli
by svn＠coreboot.org 16 Nov '08

16 Nov '08

Author: hailfinger Date: 2008-11-16 17:09:09 +0100 (Sun, 16 Nov 2008) New Revision: 1035 Modified: coreboot-v3/mainboard/gigabyte/m57sli/Makefile coreboot-v3/mainboard/gigabyte/m57sli/dts Log: Gigabyte M57SLI compilation is broken in v3. With a small makefile and dts change, the target compiles again. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: coreboot-v3/mainboard/gigabyte/m57sli/Makefile =================================================================== --- coreboot-v3/mainboard/gigabyte/m57sli/Makefile 2008-11-16 13:45:53 UTC (rev 1034) +++ coreboot-v3/mainboard/gigabyte/m57sli/Makefile 2008-11-16 16:09:09 UTC (rev 1035) @@ -21,6 +21,7 @@ STAGE0_MAINBOARD_SRC := $(src)/lib/clog2.c \ $(src)/mainboard/$(MAINBOARDDIR)/stage1.c \ + $(src)/arch/x86/resourcemap.c \ $(src)/arch/x86/stage1_mtrr.c \ $(src)/arch/x86/amd/model_fxx/dualcore_id.c \ $(src)/arch/x86/amd/model_fxx/stage1.c \ Modified: coreboot-v3/mainboard/gigabyte/m57sli/dts =================================================================== --- coreboot-v3/mainboard/gigabyte/m57sli/dts 2008-11-16 13:45:53 UTC (rev 1034) +++ coreboot-v3/mainboard/gigabyte/m57sli/dts 2008-11-16 16:09:09 UTC (rev 1035) @@ -55,5 +55,9 @@ /config/("southbridge/nvidia/mcp55/sata.dts"); }; }; + ioport@2e { + /config/("superio/ite/it8716f/dts"); + com1enable = "1"; + }; }; };

1 0

r1034 - coreboot-v3/superio/winbond/w83627hf
by svn＠coreboot.org 16 Nov '08

16 Nov '08

Author: uwe Date: 2008-11-16 14:45:53 +0100 (Sun, 16 Nov 2008) New Revision: 1034 Modified: coreboot-v3/superio/winbond/w83627hf/dts Log: Fix some incorrect entries in superio/winbond/w83627hf/dts. The hardware monitor defaults as per datasheet are 0x0000 / 0, but on hardware that uses this functionality it seems to be 0x290 / 5 often, thus use those values in the dts. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: coreboot-v3/superio/winbond/w83627hf/dts =================================================================== --- coreboot-v3/superio/winbond/w83627hf/dts 2008-11-16 13:41:15 UTC (rev 1033) +++ coreboot-v3/superio/winbond/w83627hf/dts 2008-11-16 13:45:53 UTC (rev 1034) @@ -20,18 +20,20 @@ { device_operations = "w83627hf_ops"; + /* To override any of these, put the over-ride in mainboard dts. */ /* Floppy */ floppyenable = "0"; floppyio = "0x3f0"; - floppyirq = "0x60"; - floppydrq = "0x02"; + floppyirq = "6"; + floppydrq = "2"; /* Parallel port */ ppenable = "0"; ppio = "0x378"; ppirq = "7"; + ppdrq = "4"; /* COM1 */ com1enable = "0"; @@ -43,23 +45,23 @@ com2io = "0x2f8"; com2irq = "3"; - /* Keyboard */ + /* PS/2 keyboard + PS/2 mouse */ kbenable = "0"; kbio = "0x60"; - kbio2 = "0x62"; + kbio2 = "0x64"; kbirq = "1"; kbirq2 = "12"; /* Consumer IR */ cirenable = "0"; - /* Game port */ + /* Game port, MIDI port, GPIO1 */ gameenable = "0"; - gameio = "0x220"; - gameio2 = "0x400"; + gameio = "0x201"; + gameio2 = "0x330"; gameirq = "9"; - /* GPIO2 */ + /* GPIO2, watchdog timer */ gpio2enable = "0"; /* GPIO3 */

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coreboot November 2008