Hello,
MSI MS-7250 VER:2.2 (K9N Ultra) motherboard is not detecting
SST49LF004A/B chip.
I am attaching the following files,
flashrom.log -- Which contains flashrom --verbose output
lspci.log -- Which contains lspci output
Thanks,
Kiran.
Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer "hailfinger" checked in revision 3029 to
the LinuxBIOS source repository and caused the following
changes:
Change Log:
This fixes a few vendor IDs to conform with JEDEC publication 106W
(JEP106W), adds some device IDs and provides information about
non-conforming IDs.
The EON change is left to the patch adding EON chips.
This patch should have no effect on code generation.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Acked-by: Corey Osgood <corey.osgood(a)gmail.com>
Build Log:
Compilation of amd:serengeti_cheetah_fam10 is still broken
See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=3029&device=serengeti_che…
If something broke during this checkin please be a pain
in hailfinger's neck until the issue is fixed.
If this issue is not fixed within 24h the revision should
be backed out.
Best regards,
LinuxBIOS automatic build system
Author: hailfinger
Date: 2007-12-31 02:49:00 +0100 (Mon, 31 Dec 2007)
New Revision: 3030
Added:
trunk/util/flashrom/en29f002a.c
Modified:
trunk/util/flashrom/flash.h
trunk/util/flashrom/flashchips.c
trunk/util/flashrom/jedec.c
Log:
Add continuation ID support to jedec.c
The continuation ID code does not go further than checking for IDs of
the type 0x7fXX, but does this for vendor and product ID. The current
published JEDEC spec has a list where the largest vendor ID is 7 bytes
long, but all leading bytes are 0x7f. The list will grow in the future,
and using a 64bit variable will not be enough anymore.
Besides that, it seems that the location of the ID byte after the first
continuation ID byte is very vendor specific, so we may have to revisit
that code some time in the future.
(Suggestion for a new encoding:
Use a two-byte data type for the ID, the lower byte contains the only
non-0x7f byte, the upper byte contains the number of 0x7f bytes used as
prefix, which is the bank number minus 1 the vendor ID appears in.)
Add support for EON EN29F002AT.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Acked-by: Corey Osgood <corey.osgood(a)gmail.com>
Added: trunk/util/flashrom/en29f002a.c
===================================================================
--- trunk/util/flashrom/en29f002a.c (rev 0)
+++ trunk/util/flashrom/en29f002a.c 2007-12-31 01:49:00 UTC (rev 3030)
@@ -0,0 +1,85 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2007 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/*
+ EN29F512 has 1C,21
+ EN29F010 has 1C,20
+ EN29F040A has 1C,04
+ EN29LV010 has 1C,6E and uses short F0 reset sequence
+ EN29LV040(A) has 1C,4F and uses short F0 reset sequence
+ */
+int probe_en29f512(struct flashchip *flash)
+{
+ volatile uint8_t *bios = flash->virtual_memory;
+ uint8_t id1, id2;
+
+ *(volatile uint8_t *)(bios + 0x555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x555) = 0x90;
+
+ myusec_delay(10);
+
+ id1 = *(volatile uint8_t *)(bios + 0x100);
+ id2 = *(volatile uint8_t *)(bios + 0x101);
+
+ /* exit by writing F0 anywhere? or the code below */
+ *(volatile uint8_t *)(bios + 0x555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x555) = 0xF0;
+
+ printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2);
+
+ if (id1 == flash->manufacture_id && id2 == flash->model_id)
+ return 1;
+
+ return 0;
+}
+
+/*
+ EN29F002AT has 1C,92
+ EN29F002AB has 1C,97
+ */
+int probe_en29f002a(struct flashchip *flash)
+{
+ volatile uint8_t *bios = flash->virtual_memory;
+ uint8_t id1, id2;
+
+ *(volatile uint8_t *)(bios + 0x555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x555) = 0x90;
+
+ myusec_delay(10);
+
+ id1 = *(volatile uint8_t *)(bios + 0x100);
+ id2 = *(volatile uint8_t *)(bios + 0x101);
+
+ /* exit by writing F0 anywhere? or the code below */
+ *(volatile uint8_t *)(bios + 0x555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x555) = 0xF0;
+
+ printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2);
+
+ if (id1 == flash->manufacture_id && id2 == flash->model_id)
+ return 1;
+
+ return 0;
+}
+
Modified: trunk/util/flashrom/flash.h
===================================================================
--- trunk/util/flashrom/flash.h 2007-12-31 01:18:26 UTC (rev 3029)
+++ trunk/util/flashrom/flash.h 2007-12-31 01:49:00 UTC (rev 3030)
@@ -32,8 +32,12 @@
struct flashchip {
const char *name;
- int manufacture_id;
- int model_id;
+ /* With 32bit manufacture_id and model_id we can cover IDs up to
+ * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
+ * Identification code.
+ */
+ uint32_t manufacture_id;
+ uint32_t model_id;
int total_size;
int page_size;
@@ -85,8 +89,14 @@
/*
* EN25 chips are SPI, first byte of device ID is memory type,
* second byte of device ID is log(bitsize)-9.
+ * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
+ * is the continuation code for IDs in bank 2.
+ * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
+ * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
+ * Let's hope they are not manufacturing SPI flash chips as well.
*/
-#define EON_ID 0x1C /* EON Silicon Devices */
+#define EON_ID 0x7F1C /* EON Silicon Devices */
+#define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
#define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
#define EN_25B10 0x2011
#define EN_25B20 0x2012
@@ -94,6 +104,13 @@
#define EN_25B80 0x2014
#define EN_25B16 0x2015
#define EN_25B32 0x2016
+#define EN_29F512 0x7F21
+#define EN_29F010 0x7F20
+#define EN_29F040A 0x7F04
+#define EN_29LV010 0x7F6E
+#define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
+#define EN_29F002AT 0x7F92
+#define EN_29F002AB 0x7F97
#define FUJITSU_ID 0x04 /* Fujitsu */
/* MBM29F400TC_STRANGE has a value not mentioned in the data sheet and we
Modified: trunk/util/flashrom/flashchips.c
===================================================================
--- trunk/util/flashrom/flashchips.c 2007-12-31 01:18:26 UTC (rev 3029)
+++ trunk/util/flashrom/flashchips.c 2007-12-31 01:49:00 UTC (rev 3030)
@@ -42,6 +42,9 @@
probe_jedec, erase_chip_jedec, write_jedec},
{"At49F002(N)T",ATMEL_ID, AT_49F002NT, 256, 256,
probe_jedec, erase_chip_jedec, write_jedec},
+ /* The EN29F002AT can do byte program at arbitrary boundaries. */
+ {"EN29F002AT", EON_ID, EN_29F002AT, 256, 256,
+ probe_jedec, erase_chip_jedec, write_jedec},
{"MBM29F400TC", FUJITSU_ID, MBM29F400TC_STRANGE, 512, 64 * 1024,
probe_m29f400bt, erase_m29f400bt, write_linuxbios_m29f400bt},
{"MX29F002", MX_ID, MX_29F002, 256, 64 * 1024,
Modified: trunk/util/flashrom/jedec.c
===================================================================
--- trunk/util/flashrom/jedec.c 2007-12-31 01:18:26 UTC (rev 3029)
+++ trunk/util/flashrom/jedec.c 2007-12-31 01:49:00 UTC (rev 3030)
@@ -4,6 +4,7 @@
* Copyright (C) 2000 Silicon Integrated System Corporation
* Copyright (C) 2006 Giampiero Giancipoli <gianci(a)email.it>
* Copyright (C) 2006 coresystems GmbH <info(a)coresystems.de>
+ * Copyright (C) 2007 Carl-Daniel Hailfinger
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -82,6 +83,7 @@
{
volatile uint8_t *bios = flash->virtual_memory;
uint8_t id1, id2;
+ uint32_t largeid1, largeid2;
/* Issue JEDEC Product ID Entry command */
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
@@ -98,7 +100,21 @@
/* Read product ID */
id1 = *(volatile uint8_t *)bios;
id2 = *(volatile uint8_t *)(bios + 0x01);
+ largeid1 = id1;
+ largeid2 = id2;
+ /* Check if it is a continuation ID, this should be a while loop. */
+ if (id1 == 0x7F) {
+ largeid1 <<= 8;
+ id1 = *(volatile uint8_t *)(bios + 0x100);
+ largeid1 |= id1;
+ }
+ if (id2 == 0x7F) {
+ largeid2 <<= 8;
+ id2 = *(volatile uint8_t *)(bios + 0x101);
+ largeid2 |= id2;
+ }
+
/* Issue JEDEC Product ID Exit command */
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
@@ -107,8 +123,8 @@
*(volatile uint8_t *)(bios + 0x5555) = 0xF0;
myusec_delay(40);
- printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2);
- if (id1 == flash->manufacture_id && id2 == flash->model_id)
+ printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, largeid1, largeid2);
+ if (largeid1 == flash->manufacture_id && largeid2 == flash->model_id)
return 1;
return 0;
can somebody please ack this ?
> Signed-off-by: Reinder E.N. de Haan lb_reha(a)mveas.com
>
> This patch fixes non working erasing of Pm49fl002/4
> The erasing part of writing did work because it uses erase_block_jedec
> and not erase_chip_jedec
> datasheets says: "Chip erase is available in A/A Mux Mode only."
>
> this patch needs the patch from:
> http://www.linuxbios.org/pipermail/linuxbios/2007-November/027287.html
> to be inserted first.
>
> Greetings,
> Reinder
>
>
>
>
> ------------------------------------------------------------------------
> Express yourself instantly with MSN Messenger! MSN Messenger
>
>
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When i execute this instruction in the bios code:
"movd %eax,%xmm0" produces an exception.
when i execute "movd %eax,%mm0" works.
Wise any, how to activate the SSE 128bit registers for
the VIA C7?
In another computers with another BIOS, the code works
fine, and not makes any exception, but in the VIA C7
yes.
Can one help me?
Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer "hailfinger" checked in revision 3028 to
the LinuxBIOS source repository and caused the following
changes:
Change Log:
The following mainboards had a file named microcode_updates.c in their
mainboard directories, but the code was not referenced anywhere.
intel/jarrell
dell/s1850
supermicro/x6dhr_ig2
supermicro/x6dhr_ig
supermicro/x6dhe_g2
supermicro/x6dhe_g
Besides that, the contents of these files were either duplicates of
src/cpu/intel/model_f3x/microcode_M1DF340E.h or
src/cpu/intel/model_f3x/microcode_M1DF3413.h.
svn remove the following files:
src/mainboard/supermicro/x6dhe_g/microcode_updates.c
src/mainboard/supermicro/x6dhe_g2/microcode_updates.c
src/mainboard/supermicro/x6dhr_ig/microcode_updates.c
src/mainboard/supermicro/x6dhr_ig2/microcode_updates.c
src/mainboard/dell/s1850/microcode_updates.c
src/mainboard/intel/jarrell/microcode_updates.c
Abuild tested, as expected no failures.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Acked-by: Corey Osgood <corey.osgood(a)gmail.com>
Build Log:
Compilation of amd:serengeti_cheetah_fam10 is still broken
See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=3028&device=serengeti_che…
If something broke during this checkin please be a pain
in hailfinger's neck until the issue is fixed.
If this issue is not fixed within 24h the revision should
be backed out.
Best regards,
LinuxBIOS automatic build system