When i execute this instruction in the bios code: "movd %eax,%xmm0" produces an exception. when i execute "movd %eax,%mm0" works.
Wise any, how to activate the SSE 128bit registers for the VIA C7?
In another computers with another BIOS, the code works fine, and not makes any exception, but in the VIA C7 yes.
Can one help me?
Hi,
You need to have CPU of model 9.
What cat /proc/cpuinfo says?
(or apt-get install cpuid; cpuid )
Thanks, Rudolf
Thanks for answer Rudolf, the CPU can SSE and SSE2, when runs with normal BIOS the instruction "movd %eax,%xmm0" works in, but if the linuxbios need working with sse and sse2 with a microKernel for example, this instruction produces a exception.
My contents of the /proc/cpuinfo says:
processor : 0 vendor_id : CentaurHauls cpu family : 6 model : 10 model name : VIA Esther processor 1000MHz stepping : 9 cpu MHz : 65535.000 cache size : 128 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu vme de pse tsc msr pae mce sep mtrr pge cmov pat clflush acpi mmx fxsr sse sse2 tm up pni est tm2 rng rng_en ace ace_en ace2 ace2_en phe phe_en pmm pmm_en bogomips : 1598.31 clflush size : 64
The problem is that the BIOS must enable XMM registers or the flags from CR4? if not only works MMX registers with SSE and SSE2 integer addons.
And i not known what must this CPU for enable it, or all CPU's.
Lots of thanks if one can help me!.
El vie, 28-12-2007 a las 21:24 +0100, Rudolf Marek escribió:
Hi,
You need to have CPU of model 9.
What cat /proc/cpuinfo says?
(or apt-get install cpuid; cpuid )
Thanks, Rudolf
Urbez Santana Roma wrote:
Thanks for answer Rudolf, the CPU can SSE and SSE2, when runs with normal BIOS the instruction "movd %eax,%xmm0" works in, but if the linuxbios need working with sse and sse2 with a microKernel for example, this instruction produces a exception.
My contents of the /proc/cpuinfo says:
processor : 0 vendor_id : CentaurHauls cpu family : 6 model : 10 model name : VIA Esther processor 1000MHz stepping : 9 cpu MHz : 65535.000
Huh? This is in LB or factory bios?
cache size : 128 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu vme de pse tsc msr pae mce sep mtrr pge cmov pat clflush acpi mmx fxsr sse sse2 tm up pni est tm2 rng rng_en ace ace_en ace2 ace2_en phe phe_en pmm pmm_en bogomips : 1598.31 clflush size : 64
The problem is that the BIOS must enable XMM registers or the flags from CR4? if not only works MMX registers with SSE and SSE2 integer addons.
And i not known what must this CPU for enable it, or all CPU's.
Lots of thanks if one can help me!.
Hmm, I'm looking at the datasheet right now, and there doesn't seem to be any MMX control in the CR4 register, however bit 10 is this: OSXMMEXCPT: OS Unmasked exception support
and it can be set to 1 to enable. This is the only mention of XMM in the entire datasheet.
Hope this helps, Corey
El vie, 28-12-2007 a las 21:24 +0100, Rudolf Marek escribió:
Hi,
You need to have CPU of model 9.
What cat /proc/cpuinfo says?
(or apt-get install cpuid; cpuid )
Thanks, Rudolf
Thanks, Corey, you have open my eyes :)))
The problem is not the bit 10 (OSXMMEXCPT) in CR4. i have found more information, searching this word in Google and have found that in some CPU's must be enabled the bit 9 (OSFXSR) with that SSE and xmm registers work, and not makes the exception, that afects me.
I have write a 1 in this bit, and SSE works fine. This /proc/cpuinfo is obtained with factory BIOS. It writes a bugous CPU speed.
I ask us, if one are interessed in one tool that i have make that makes possible compile C code, with GCC, and eliminate the use of the Stack, and use the registers of MMX or XMM if have it. It is transparent, and only have the limitations of the virtual stack that are small, 128 bytes with XMM or 64 with MMX. Your C code must not use more stack.
I have compiled complex programs, for test the CPU and the RAM init, through rs232, and it works :) with the tool. The pay are that programs work a slowly. I have writen it for make tools for test CPU's and Mainboards without continuously writen the EPROM, and romcc cannot compile the code or the code compiled not works with these codes.
Sorry all, with my ugly english.
El sáb, 29-12-2007 a las 05:56 -0500, Corey Osgood escribió:
Urbez Santana Roma wrote:
Thanks for answer Rudolf, the CPU can SSE and SSE2, when runs with normal BIOS the instruction "movd %eax,%xmm0" works in, but if the linuxbios need working with sse and sse2 with a microKernel for example, this instruction produces a exception.
My contents of the /proc/cpuinfo says:
processor : 0 vendor_id : CentaurHauls cpu family : 6 model : 10 model name : VIA Esther processor 1000MHz stepping : 9 cpu MHz : 65535.000
Huh? This is in LB or factory bios?
cache size : 128 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu vme de pse tsc msr pae mce sep mtrr pge cmov pat clflush acpi mmx fxsr sse sse2 tm up pni est tm2 rng rng_en ace ace_en ace2 ace2_en phe phe_en pmm pmm_en bogomips : 1598.31 clflush size : 64
The problem is that the BIOS must enable XMM registers or the flags from CR4? if not only works MMX registers with SSE and SSE2 integer addons.
And i not known what must this CPU for enable it, or all CPU's.
Lots of thanks if one can help me!.
Hmm, I'm looking at the datasheet right now, and there doesn't seem to be any MMX control in the CR4 register, however bit 10 is this: OSXMMEXCPT: OS Unmasked exception support
and it can be set to 1 to enable. This is the only mention of XMM in the entire datasheet.
Hope this helps, Corey
El vie, 28-12-2007 a las 21:24 +0100, Rudolf Marek escribió:
Hi,
You need to have CPU of model 9.
What cat /proc/cpuinfo says?
(or apt-get install cpuid; cpuid )
Thanks, Rudolf
dunno if it helps but this is what i got.
:~$ cat /proc/cpuinfo processor : 0 vendor_id : CentaurHauls cpu family : 6 model : 10 model name : VIA Esther processor 1500MHz stepping : 9 cpu MHz : 1500.085 cache size : 128 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge cmov pat clflush acpi mmx fxsr sse sse2 tm nx pni rng rng_en ace ace_en ace2 ace2_en phe phe_en pmm pmm_en bogomips : 3003.62 clflush size : 64
On 30.12.2007 15:08, Urbez Santana Roma wrote:
I ask us, if one are interessed in one tool that i have make that makes possible compile C code, with GCC, and eliminate the use of the Stack, and use the registers of MMX or XMM if have it. It is transparent, and only have the limitations of the virtual stack that are small, 128 bytes with XMM or 64 with MMX. Your C code must not use more stack.
That is very interesting.
I have compiled complex programs, for test the CPU and the RAM init, through rs232, and it works :) with the tool. The pay are that programs work a slowly. I have writen it for make tools for test CPU's and Mainboards without continuously writen the EPROM, and romcc cannot compile the code or the code compiled not works with these codes.
ROMCC uses a very similar technique to store variables inside MMX/SSE registers. However, it is a standalone compiler. How did you extend gcc to achieve memory-free operation?
Regards, Carl-Daniel
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Carl-Daniel Hailfinger -
Corey Osgood -
Forest Dean Feighner -
Rudolf Marek -
Urbez Santana Roma