coreboot July 2017

coreboot@coreboot.org

54 participants
131 discussions

ASUS KGPE-D16 Automated Test Failure [master]
by Raptor Engineering Automated Coreboot Test Stand 26 Jul '17

26 Jul '17

The ASUS KGPE-D16 fails verification for branch master as of commit ab94ba309e13b14334ed4dcf443d11e0e5baeb61 The following tests failed: BOOT_FAILURE Commits since last successful test: ab94ba3 intel/common/block/itss: Extend itss_irq_init() to handle IOSF 1.0 See attached log for details This message was automatically generated from Raptor Engineering's ASUS KGPE-D16 test stand Want to test on your own equipment? Check out https://www.raptorengineering.com/content/REACTS/intro.html Raptor Engineering also offers coreboot consulting services! Please visit https://www.raptorengineering.com for more information Please contact Timothy Pearson at Raptor Engineering <tpearson(a)raptorengineering.com> regarding any issues stemming from this notification

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New Defects reported by Coverity Scan for coreboot
by scan-admin＠coverity.com 25 Jul '17

25 Jul '17

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 1 new defect(s) introduced to coreboot found with Coverity Scan. 1 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 1378270: Error handling issues (CHECKED_RETURN) /src/soc/intel/skylake/igd.c: 147 in write_acpi_igd_opregion() ________________________________________________________________________________________________________ *** CID 1378270: Error handling issues (CHECKED_RETURN) /src/soc/intel/skylake/igd.c: 147 in write_acpi_igd_opregion() 141 /* If IGD is disabled, exit here */ 142 if (pci_read_config16(device, PCI_VENDOR_ID) == 0xFFFF) 143 return current; 144 145 printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n"); 146 opregion = (igd_opregion_t *)current; >>> CID 1378270: Error handling issues (CHECKED_RETURN) >>> Calling "init_igd_opregion" without checking return value (as is done elsewhere 5 out of 6 times). 147 init_igd_opregion(opregion); 148 update_igd_opregion(opregion); 149 current += sizeof(igd_opregion_t); 150 current = acpi_align_current(current); 151 152 printk(BIOS_DEBUG, "current = %lx\n", current); ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u2389337.ct.sendgrid.net/wf/click?upn=08onrYu34A-2BWcWUl-2F-2BfV0V0… To manage Coverity Scan email notifications for "coreboot(a)coreboot.org", click https://u2389337.ct.sendgrid.net/wf/click?upn=08onrYu34A-2BWcWUl-2F-2BfV0V0…

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An introduction..
by Goat 25 Jul '17

25 Jul '17

Hey folks, I'm relatively new to this mailing list (it's actually the first mailing list I've joined). So, I thought I'd introduce myself. I'm not sure if using an alias is proper on this mailing list (??); but, I arrive with one. Hopefully, my etiquette is in line. I was turned on to Coreboot, through Libreboot and their work, I believe, probably somewhere around 2 maybe 3 years back. I'm a GNU/Linux fan and free software enthusiast. I can speak C, but not fluently, or probably very well. If my knowledge of the history of this project and it's current state serves me correct, there are a lot of serious heavyweights and professionals in the crowd. I could not count myself among you; but, do share a love for computing. I'm somewhat familiar with the build environment for the official Coreboot releases. I've successfully built and flashed roms for the KGPE-D16, M57SLI-S4, F2A85M, and of course the Lenovo X60. Though there are several out there already supplying Coreboot/Libreboot systems for fees (very nice ones), it has been a goal of mine to count myself among them and be able to provide liberated systems. Hopefully, I can contribute to the project and more boards continue to be liberated. Also, many thanks to everyone who has contributed to this project. -goat

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GPLv3 80186 SoC
by Peter Stuge 24 Jul '17

24 Jul '17

Just came across this. Working HDL for the architecture we all love to hate. Amazing study material, for learning PC. Complete with GPL system and VGA BIOS. https://github.com/marmolejo/zet Apparently it runs Lemmings, Doom and Windows. If you ever wondered what all those weird legacy register writes mean and do, you can find the answer here. //Peter

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T530: Cleaning Intel ME currently does not work <--> CPU fan won't start
by David Hobach 24 Jul '17

24 Jul '17

Dear all, just tested two coreboot + SeaBios images on a T530 that were identical except one time with ME and one time without (using the compile option, rev 54db255529ce8afc689ae425c24b7fb1d45654e8). Unfortunately it seems that ME does some CPU fan initialization (ACPI?) that coreboot doesn't, i.e. on the image without ME the CPU fan didn't start anymore = not usable. I tested with Fedora 26 and ubuntu 14.02 LTS up to temperatures of 98 degrees celsius, but it wouldn't start. I didn't test manual fan control. What is interesting: After re-trying the cleaned ME build right after the one with ME, the CPU fan did start at first. Then however I did a hard reset (remove power except for CMOS battery, press and hold the power button multiple times for some seconds, attach power and boot) and the CPU fan wouldn't work anymore (it actually spins a couple of times before SeaBios pops up, but after that it's dead). So maybe ME writes something to NVram or whatever that makes it work and the NVram is cleaned upon hard reset? I don't know that topic well enough... @other users: Be warned to do a hard reset on a T530 with ME removed - your laptop might die soon... ;-) Anyway in case someone has an idea or got it working contrary to my statement, happy to hear from you! I guess I'll also file a bug with the ME cleaner author. Kind Regards David ------------------------------------- # # Automatically generated file; DO NOT EDIT. # coreboot configuration # # # General setup # CONFIG_COREBOOT_BUILD=y CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_USE_OPTION_TABLE=y # CONFIG_STATIC_OPTION_TABLE is not set CONFIG_COMPRESS_RAMSTAGE=y CONFIG_INCLUDE_CONFIG_FILE=y # CONFIG_COLLECT_TIMESTAMPS is not set # CONFIG_USE_BLOBS is not set # CONFIG_COVERAGE is not set # CONFIG_UBSAN is not set CONFIG_RELOCATABLE_RAMSTAGE=y # CONFIG_UPDATE_IMAGE is not set # CONFIG_BOOTSPLASH_IMAGE is not set # # Mainboard # # # Important: Run 'make distclean' before switching boards # # CONFIG_VENDOR_A_TREND is not set # CONFIG_VENDOR_AAEON is not set # CONFIG_VENDOR_ABIT is not set # CONFIG_VENDOR_ADI is not set # CONFIG_VENDOR_ADLINK is not set # CONFIG_VENDOR_ADVANSUS is not set # CONFIG_VENDOR_AMD is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set # CONFIG_VENDOR_ARTECGROUP is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_AVALUE is not set # CONFIG_VENDOR_AZZA is not set # CONFIG_VENDOR_BACHMANN is not set # CONFIG_VENDOR_BAP is not set # CONFIG_VENDOR_BCOM is not set # CONFIG_VENDOR_BIOSTAR is not set # CONFIG_VENDOR_BROADCOM is not set # CONFIG_VENDOR_COMPAQ is not set # CONFIG_VENDOR_CUBIETECH is not set # CONFIG_VENDOR_DIGITALLOGIC is not set # CONFIG_VENDOR_DMP is not set # CONFIG_VENDOR_ECS is not set # CONFIG_VENDOR_ELMEX is not set # CONFIG_VENDOR_EMULATION is not set # CONFIG_VENDOR_ESD is not set # CONFIG_VENDOR_FOXCONN is not set # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GIZMOSPHERE is not set # CONFIG_VENDOR_GOOGLE is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IEI is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_IWAVE is not set # CONFIG_VENDOR_IWILL is not set # CONFIG_VENDOR_JETWAY is not set # CONFIG_VENDOR_KONTRON is not set # CONFIG_VENDOR_LANNER is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LINUTOP is not set # CONFIG_VENDOR_LIPPERT is not set # CONFIG_VENDOR_LOWRISC is not set # CONFIG_VENDOR_MITAC is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_NEC is not set # CONFIG_VENDOR_NOKIA is not set # CONFIG_VENDOR_NVIDIA is not set # CONFIG_VENDOR_PACKARDBELL is not set # CONFIG_VENDOR_PCENGINES is not set # CONFIG_VENDOR_PURISM is not set # CONFIG_VENDOR_RCA is not set # CONFIG_VENDOR_RODA is not set # CONFIG_VENDOR_SAMSUNG is not set # CONFIG_VENDOR_SAPPHIRE is not set # CONFIG_VENDOR_SIEMENS is not set # CONFIG_VENDOR_SOYO is not set # CONFIG_VENDOR_SUNW is not set # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_TECHNEXION is not set # CONFIG_VENDOR_THOMSON is not set # CONFIG_VENDOR_TI is not set # CONFIG_VENDOR_TRAVERSE is not set # CONFIG_VENDOR_TYAN is not set # CONFIG_VENDOR_VIA is not set # CONFIG_VENDOR_WINENT is not set # CONFIG_VENDOR_WYSE is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_DIR="lenovo/t530" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T530" CONFIG_MAINBOARD_VENDOR="LENOVO" CONFIG_MAX_CPUS=8 CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0 CONFIG_CBFS_SIZE=0x600000 CONFIG_PAYLOAD_CONFIGFILE="" CONFIG_VGA_BIOS_ID="8086,0166" CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_DIMM_SPD_SIZE=256 CONFIG_VGA_BIOS=y CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_VGA_BIOS_FILE="/root/ROMs/VGA_BIOS/pci8086,0166.rom" CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x17aa CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x21fa CONFIG_HAVE_IFD_BIN=y CONFIG_HAVE_ME_BIN=y CONFIG_MMCONF_BASE_ADDRESS=0xf8000000 CONFIG_DRAM_RESET_GATE_GPIO=10 # CONFIG_POST_IO is not set CONFIG_DEVICETREE="devicetree.cb" CONFIG_MAX_REBOOT_CNT=3 CONFIG_ID_SECTION_OFFSET=0x80 CONFIG_POST_DEVICE=y CONFIG_USBDEBUG_HCD_INDEX=2 # CONFIG_VBOOT is not set CONFIG_TPM_PIRQ=0x0 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 # CONFIG_DRIVERS_UART_8250IO is not set CONFIG_FMDFILE="" CONFIG_IFD_BIN_PATH="/root/ROMs/factory_BIOS/T530_all/flashregion_0_flashdescriptor.bin" CONFIG_ME_BIN_PATH="/root/ROMs/factory_BIOS/T530_all/flashregion_2_intel_me.bin" CONFIG_HAVE_GBE_BIN=y # CONFIG_BOARD_LENOVO_G505S is not set # CONFIG_BOARD_LENOVO_L520 is not set # CONFIG_BOARD_LENOVO_R400 is not set # CONFIG_BOARD_LENOVO_S230U is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T420 is not set # CONFIG_BOARD_LENOVO_T420S is not set # CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set # CONFIG_BOARD_LENOVO_T430S is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_T520 is not set CONFIG_BOARD_LENOVO_T530=y # CONFIG_BOARD_LENOVO_T60 is not set # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set # CONFIG_BOARD_LENOVO_X200 is not set # CONFIG_BOARD_LENOVO_X201 is not set # CONFIG_BOARD_LENOVO_X220 is not set # CONFIG_BOARD_LENOVO_X220I is not set # CONFIG_BOARD_LENOVO_X230 is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_CPU_ADDR_BITS=36 CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 # CONFIG_USBDEBUG is not set CONFIG_DRIVERS_PS2_KEYBOARD=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_NO_POST is not set CONFIG_BOARD_ROMSIZE_KB_12288=y # CONFIG_COREBOOT_ROMSIZE_KB_64 is not set # CONFIG_COREBOOT_ROMSIZE_KB_128 is not set # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set # CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set # CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set # CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set CONFIG_COREBOOT_ROMSIZE_KB_12288=y # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set CONFIG_COREBOOT_ROMSIZE_KB=12288 CONFIG_ROM_SIZE=0xc00000 # CONFIG_MAINBOARD_HAS_TPM2 is not set CONFIG_SYSTEM_TYPE_LAPTOP=y # CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set # # Chipset # # # SoC # CONFIG_CPU_SPECIFIC_OPTIONS=y CONFIG_RAMTOP=0x200000 CONFIG_HEAP_SIZE=0x4000 CONFIG_RAMBASE=0x100000 CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/bd82x6x/bootblock.c" CONFIG_EHCI_BAR=0xfef00000 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_SMM_TSEG_SIZE=0x800000 # CONFIG_SOC_BROADCOM_CYGNUS is not set CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/model_206ax/bootblock.c" CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0 # CONFIG_BUILD_WITH_FAKE_IFD is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_COMMON_CLOCK=y # CONFIG_PCIEXP_CLK_PM is not set CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/sandybridge/bootblock.c" CONFIG_CACHE_MRC_SIZE_KB=512 CONFIG_CONSOLE_CBMEM=y CONFIG_UART_PCI_ADDR=0x0 CONFIG_HPET_MIN_TICKS=0x80 # CONFIG_SOC_INTEL_KABYLAKE is not set # CONFIG_SOC_LOWRISC_LOWRISC is not set # CONFIG_SOC_MARVELL_MVMAP2315 is not set # CONFIG_SOC_MEDIATEK_MT8173 is not set # CONFIG_SOC_NVIDIA_TEGRA124 is not set # CONFIG_SOC_NVIDIA_TEGRA210 is not set # CONFIG_SOC_QC_IPQ40XX is not set # CONFIG_SOC_QC_IPQ806X is not set # CONFIG_SOC_ROCKCHIP_RK3288 is not set # CONFIG_SOC_ROCKCHIP_RK3399 is not set # CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set # CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set # CONFIG_SOC_UCB_RISCV is not set # # CPU # # CONFIG_CPU_ALLWINNER_A10 is not set CONFIG_SOCKET_SPECIFIC_OPTIONS=y CONFIG_XIP_ROM_SIZE=0x20000 CONFIG_NUM_IPI_STARTS=2 # CONFIG_CPU_AMD_AGESA is not set # CONFIG_CPU_AMD_PI is not set # CONFIG_CPU_ARMLTD_CORTEX_A9 is not set CONFIG_CPU_INTEL_MODEL_306AX=y CONFIG_SSE2=y CONFIG_CPU_INTEL_SOCKET_RPGA989=y # CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set # CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set CONFIG_CPU_INTEL_COMMON=y CONFIG_ENABLE_VMX=y CONFIG_SET_VMX_LOCK_BIT=y # CONFIG_CPU_TI_AM335X is not set # CONFIG_PARALLEL_CPU_INIT is not set # CONFIG_PARALLEL_MP is not set # CONFIG_UDELAY_IO is not set # CONFIG_UDELAY_LAPIC is not set CONFIG_UDELAY_TSC=y CONFIG_TSC_CONSTANT_RATE=y CONFIG_TSC_MONOTONIC_TIMER=y # CONFIG_UDELAY_TIMER2 is not set # CONFIG_TSC_SYNC_LFENCE is not set CONFIG_TSC_SYNC_MFENCE=y # CONFIG_NO_FIXED_XIP_ROM_SIZE is not set CONFIG_LOGICAL_CPUS=y CONFIG_SMM_TSEG=y CONFIG_SMM_MODULE_HEAP_SIZE=0x4000 # CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set # CONFIG_SERIALIZED_SMM_INITIALIZATION is not set # CONFIG_X86_AMD_FIXED_MTRRS is not set # CONFIG_PLATFORM_USES_FSP1_0 is not set # CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set # CONFIG_SOC_SETS_MSRS is not set CONFIG_CACHE_AS_RAM=y # CONFIG_NO_CAR_GLOBAL_MIGRATION is not set CONFIG_SMP=y CONFIG_AP_SIPI_VECTOR=0xfffff000 CONFIG_MMX=y CONFIG_SSE=y CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y # CONFIG_USES_MICROCODE_HEADER_FILES is not set CONFIG_CPU_MICROCODE_CBFS_GENERATE=y # CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set # CONFIG_CPU_MICROCODE_CBFS_NONE is not set # CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set CONFIG_CPU_UCODE_BINARIES="" # # Northbridge # # CONFIG_NORTHBRIDGE_AMD_AGESA is not set CONFIG_S3_VGA_ROM_RUN=y # CONFIG_NO_MMCONF_SUPPORT is not set # CONFIG_AMD_NB_CIMX is not set # CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set # CONFIG_NORTHBRIDGE_AMD_PI is not set CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE=y CONFIG_NORTHBRIDGE_INTEL_COMMON_GMA_OPREGION=y CONFIG_MRC_CACHE_SIZE=0x10000 CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE=y CONFIG_USE_NATIVE_RAMINIT=y CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS=y CONFIG_HPET_ADDRESS=0xfed00000 CONFIG_MAX_PIRQ_LINKS=4 # # Southbridge # # CONFIG_AMD_SB_CIMX is not set # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set CONFIG_SOUTHBRIDGE_INTEL_C216=y CONFIG_SOUTH_BRIDGE_OPTIONS=y # CONFIG_LOCK_SPI_ON_RESUME_NONE is not set CONFIG_LOCK_SPI_ON_RESUME_RO=y # CONFIG_LOCK_SPI_ON_RESUME_NO_ACCESS is not set CONFIG_SOUTHBRIDGE_INTEL_COMMON=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y # CONFIG_LOCK_MANAGEMENT_ENGINE is not set # # Super I/O # # CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set # # Embedded Controllers # CONFIG_EC_ACPI=y CONFIG_EC_LENOVO_H8=y CONFIG_SEABIOS_PS2_TIMEOUT=3000 CONFIG_EC_LENOVO_PMH7=y CONFIG_HAVE_INTEL_FIRMWARE=y # # Intel Firmware # # CONFIG_EM100 is not set CONFIG_CHECK_ME=y CONFIG_USE_ME_CLEANER=y # # Please test the modified ME/TXE firmware and coreboot in two steps # CONFIG_GBE_BIN_PATH="/root/ROMs/factory_BIOS/T530_all/flashregion_3_gbe.bin" # CONFIG_HAVE_EC_BIN is not set # # Verified Boot (vboot) # # CONFIG_MAINBOARD_HAS_CHROMEOS is not set # CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set # CONFIG_UEFI_2_4_BINDING is not set # CONFIG_UDK_2015_BINDING is not set # CONFIG_USE_SIEMENS_HWILIB is not set # CONFIG_ARCH_ARM is not set # CONFIG_ARCH_BOOTBLOCK_ARM is not set # CONFIG_ARCH_VERSTAGE_ARM is not set # CONFIG_ARCH_ROMSTAGE_ARM is not set # CONFIG_ARCH_RAMSTAGE_ARM is not set # CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set # CONFIG_ARCH_VERSTAGE_ARMV4 is not set # CONFIG_ARCH_ROMSTAGE_ARMV4 is not set # CONFIG_ARCH_RAMSTAGE_ARMV4 is not set # CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set # CONFIG_ARCH_VERSTAGE_ARMV7 is not set # CONFIG_ARCH_ROMSTAGE_ARMV7 is not set # CONFIG_ARCH_RAMSTAGE_ARMV7 is not set # CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set # CONFIG_ARCH_VERSTAGE_ARMV7_M is not set # CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set # CONFIG_ARCH_VERSTAGE_ARMV7_R is not set # CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set # CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set # CONFIG_ARM_LPAE is not set # CONFIG_ARCH_ARM64 is not set # CONFIG_ARCH_BOOTBLOCK_ARM64 is not set # CONFIG_ARCH_VERSTAGE_ARM64 is not set # CONFIG_ARCH_ROMSTAGE_ARM64 is not set # CONFIG_ARCH_RAMSTAGE_ARM64 is not set # CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set # CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set # CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set # CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set # CONFIG_ARM64_A53_ERRATUM_843419 is not set # CONFIG_ARCH_MIPS is not set # CONFIG_ARCH_BOOTBLOCK_MIPS is not set # CONFIG_ARCH_VERSTAGE_MIPS is not set # CONFIG_ARCH_ROMSTAGE_MIPS is not set # CONFIG_ARCH_RAMSTAGE_MIPS is not set # CONFIG_ARCH_POWER8 is not set # CONFIG_ARCH_BOOTBLOCK_POWER8 is not set # CONFIG_ARCH_VERSTAGE_POWER8 is not set # CONFIG_ARCH_ROMSTAGE_POWER8 is not set # CONFIG_ARCH_RAMSTAGE_POWER8 is not set # CONFIG_ARCH_RISCV is not set # CONFIG_ARCH_BOOTBLOCK_RISCV is not set # CONFIG_ARCH_VERSTAGE_RISCV is not set # CONFIG_ARCH_ROMSTAGE_RISCV is not set # CONFIG_ARCH_RAMSTAGE_RISCV is not set CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_ROMSTAGE_X86_32=y CONFIG_ARCH_RAMSTAGE_X86_32=y # CONFIG_ARCH_BOOTBLOCK_X86_64 is not set # CONFIG_ARCH_VERSTAGE_X86_64 is not set # CONFIG_ARCH_ROMSTAGE_X86_64 is not set # CONFIG_ARCH_RAMSTAGE_X86_64 is not set # CONFIG_USE_MARCH_586 is not set # CONFIG_AP_IN_SIPI_WAIT is not set # CONFIG_SIPI_VECTOR_IN_ROM is not set # CONFIG_ROMCC is not set # CONFIG_CBMEM_TOP_BACKUP is not set # CONFIG_LATE_CBMEM_INIT is not set CONFIG_PC80_SYSTEM=y # CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set # CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set # CONFIG_POSTCAR_STAGE is not set # CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set # CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set CONFIG_BOOTBLOCK_SIMPLE=y # CONFIG_BOOTBLOCK_NORMAL is not set CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c" # # Devices # CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y CONFIG_HAVE_VBE_LINEAR_FRAMEBUFFER=y CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y # CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT is not set # CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set # CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT is not set CONFIG_VGA_ROM_RUN=y # CONFIG_NO_GFX_INIT is not set # CONFIG_ALWAYS_LOAD_OPROM is not set # CONFIG_ON_DEVICE_ROM_LOAD is not set CONFIG_PCI_OPTION_ROM_RUN_REALMODE=y # CONFIG_PCI_OPTION_ROM_RUN_YABEL is not set # CONFIG_MULTIPLE_VGA_ADAPTERS is not set # # Display # CONFIG_FRAMEBUFFER_SET_VESA_MODE=y # CONFIG_FRAMEBUFFER_VESA_MODE_100 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_101 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_102 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_103 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_104 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_105 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_106 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_107 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_108 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_109 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_10A is not set # CONFIG_FRAMEBUFFER_VESA_MODE_10B is not set # CONFIG_FRAMEBUFFER_VESA_MODE_10C is not set # CONFIG_FRAMEBUFFER_VESA_MODE_10D is not set # CONFIG_FRAMEBUFFER_VESA_MODE_10E is not set # CONFIG_FRAMEBUFFER_VESA_MODE_10F is not set # CONFIG_FRAMEBUFFER_VESA_MODE_110 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_111 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_112 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_113 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_114 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_115 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_116 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_117 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_118 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_119 is not set # CONFIG_FRAMEBUFFER_VESA_MODE_11A is not set CONFIG_FRAMEBUFFER_VESA_MODE_11B=y # CONFIG_FRAMEBUFFER_VESA_MODE_USER is not set CONFIG_FRAMEBUFFER_VESA_MODE=0x11B # CONFIG_BOOTSPLASH is not set # CONFIG_VGA_TEXT_FRAMEBUFFER is not set CONFIG_VBE_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_SMBUS_HAS_AUX_CHANNELS is not set CONFIG_PCI=y CONFIG_MMCONF_SUPPORT=y # CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set CONFIG_PCIX_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y # CONFIG_AZALIA_PLUGIN_SUPPORT is not set CONFIG_PCIEXP_PLUGIN_SUPPORT=y # CONFIG_EARLY_PCI_BRIDGE is not set CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 # CONFIG_SOFTWARE_I2C is not set # # Generic Drivers # # CONFIG_DRIVERS_AS3722_RTC is not set # CONFIG_GIC is not set # CONFIG_IPMI_KCS is not set # CONFIG_DRIVERS_LENOVO_WACOM is not set CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS=y CONFIG_HYBRID_GRAPHICS_GPIO_NUM=52 # CONFIG_RT8168_GET_MAC_FROM_VPD is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y # CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set # CONFIG_SPI_FLASH_SMM is not set # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_SPI_FLASH_ADESTO=y CONFIG_SPI_FLASH_AMIC=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set # CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set # CONFIG_DRIVERS_UART is not set CONFIG_NO_UART_ON_SUPERIO=y # CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set # CONFIG_UART_OVERRIDE_REFCLK is not set # CONFIG_DRIVERS_UART_8250MEM is not set # CONFIG_DRIVERS_UART_8250MEM_32 is not set # CONFIG_HAVE_UART_SPECIAL is not set # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_DRIVERS_UART_PL011 is not set # CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y CONFIG_SMBIOS_PROVIDED_BY_MOBO=y # CONFIG_DRIVERS_I2C_MAX98927 is not set # CONFIG_DRIVERS_I2C_PCF8523 is not set # CONFIG_DRIVERS_I2C_RTD2132 is not set # CONFIG_DRIVERS_I2C_RX6110SA is not set # CONFIG_RX6110SA_USE_SMBUS is not set # CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set # CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set # CONFIG_INTEL_DDI is not set # CONFIG_INTEL_EDID is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y # CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set # CONFIG_DRIVER_INTEL_I210 is not set # CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set CONFIG_DRIVERS_INTEL_WIFI=y # CONFIG_USE_SAR is not set # CONFIG_DRIVER_MAXIM_MAX77686 is not set # CONFIG_DRIVER_PARADE_PS8625 is not set # CONFIG_DRIVER_PARADE_PS8640 is not set CONFIG_DRIVERS_MC146818=y CONFIG_MAINBOARD_HAS_LPC_TPM=y CONFIG_LPC_TPM=y CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 # CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set # CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set # CONFIG_TPM_DEACTIVATE is not set CONFIG_VGA=y # CONFIG_DRIVERS_RICOH_RCE822 is not set # CONFIG_DRIVER_SIEMENS_NC_FPGA is not set # CONFIG_DRIVERS_SIL_3114 is not set # CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set # CONFIG_DRIVER_TI_TPS65090 is not set # CONFIG_DRIVERS_TI_TPS65913 is not set # CONFIG_DRIVERS_TI_TPS65913_RTC is not set # CONFIG_DRIVER_XPOWERS_AXP209 is not set # CONFIG_COMMONLIB_STORAGE is not set CONFIG_ACPI_SATA_GENERATOR=y CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y # CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set CONFIG_BOOT_DEVICE_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y # CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set CONFIG_RTC=y # CONFIG_TPM is not set # CONFIG_MAINBOARD_HAS_TPM_CR50 is not set CONFIG_STACK_SIZE=0x1000 # # Console # CONFIG_SQUELCH_EARLY_SMP=y # CONFIG_SPKMODEM is not set # CONFIG_CONSOLE_NE2K is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set # CONFIG_CONSOLE_SPI_FLASH is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set # CONFIG_CMOS_POST is not set CONFIG_CONSOLE_POST=y CONFIG_POST_DEVICE_NONE=y # CONFIG_POST_DEVICE_LPC is not set # CONFIG_POST_DEVICE_PCI_PCIE is not set # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set CONFIG_HWBASE_DEBUG_CB=y CONFIG_HAVE_ACPI_RESUME=y # CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set CONFIG_RESUME_PATH_SAME_AS_BOOT=y CONFIG_HAVE_HARD_RESET=y # CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set # CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set # CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set CONFIG_HAVE_MONOTONIC_TIMER=y # CONFIG_GENERIC_UDELAY is not set # CONFIG_TIMER_QUEUE is not set CONFIG_HAVE_OPTION_TABLE=y # CONFIG_PIRQ_ROUTE is not set CONFIG_HAVE_SMI_HANDLER=y # CONFIG_PCI_IO_CFG_EXT is not set CONFIG_IOAPIC=y CONFIG_USE_WATCHDOG_ON_BOOT=y # CONFIG_GFXUMA is not set CONFIG_HAVE_ACPI_TABLES=y CONFIG_COMMON_FADT=y # CONFIG_ACPI_NHLT is not set # # System tables # # CONFIG_GENERATE_MP_TABLE is not set # CONFIG_GENERATE_PIRQ_TABLE is not set CONFIG_GENERATE_SMBIOS_TABLES=y # # Payload # # CONFIG_PAYLOAD_NONE is not set # CONFIG_PAYLOAD_ELF is not set # CONFIG_PAYLOAD_BAYOU is not set # CONFIG_PAYLOAD_FILO is not set # CONFIG_PAYLOAD_GRUB2 is not set CONFIG_PAYLOAD_SEABIOS=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set CONFIG_PAYLOAD_FILE="payloads/external/SeaBIOS/seabios/out/bios.bin.elf" CONFIG_SEABIOS_STABLE=y # CONFIG_SEABIOS_MASTER is not set # CONFIG_SEABIOS_REVISION is not set # CONFIG_SEABIOS_THREAD_OPTIONROMS is not set CONFIG_SEABIOS_BOOTORDER_FILE="" CONFIG_SEABIOS_DEBUG_LEVEL=-1 # # Using default SeaBIOS log level # CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y # CONFIG_PAYLOAD_IS_FLAT_BINARY is not set # # Secondary Payloads # # CONFIG_COREINFO_SECONDARY_PAYLOAD is not set # CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set # CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set # CONFIG_TINT_SECONDARY_PAYLOAD is not set # # Debugging # # CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set # CONFIG_HAVE_DEBUG_CAR is not set # CONFIG_HAVE_DEBUG_SMBUS is not set # CONFIG_DEBUG_SMI is not set # CONFIG_DEBUG_SMM_RELOCATION is not set # CONFIG_DEBUG_MALLOC is not set CONFIG_DEBUG_ACPI=y # CONFIG_REALMODE_DEBUG is not set # CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_TRACE is not set # CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_ADA_CODE is not set CONFIG_NO_EDID_FILL_FB=y # CONFIG_ENABLE_APIC_EXT_ID is not set CONFIG_WARNINGS_ARE_ERRORS=y # CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set # CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set # CONFIG_POWER_BUTTON_FORCE_ENABLE is not set # CONFIG_POWER_BUTTON_FORCE_DISABLE is not set # CONFIG_POWER_BUTTON_IS_OPTIONAL is not set # CONFIG_REG_SCRIPT is not set # CONFIG_CREATE_BOARD_CHECKLIST is not set # CONFIG_MAKE_CHECKLIST_PUBLIC is not set # CONFIG_RAMSTAGE_ADA is not set # CONFIG_RAMSTAGE_LIBHWBASE is not set CONFIG_HWBASE_DYNAMIC_MMIO=y # CONFIG_NO_XIP_EARLY_STAGES is not set CONFIG_EARLY_CBMEM_INIT=y # CONFIG_EARLY_CBMEM_LIST is not set CONFIG_RELOCATABLE_MODULES=y # CONFIG_BOARD_ID_AUTO is not set # CONFIG_BOARD_ID_MANUAL is not set CONFIG_BOOTBLOCK_CUSTOM=y

3 7

Re: [coreboot] A question about qemu develop environment
by ron minnich 24 Jul '17

24 Jul '17

On Mon, Jul 24, 2017 at 11:24 AM ingegneriaforense(a)alice.it < ingegneriaforense(a)alice.it> wrote: > Dear Ron, > > please a question ... i remember i used qemu during the years i was an > engineering student. I need to search in my far memory. > I'm writing i'm installing qemu. > > 1- If i'm not mistaken, qemu gives a virtual machine where check coreboot. > In which way i need to instruct qemu about the dedicated hardware on which > i want test coreboot ? > you can't. You can test qemu on the q35 chipset. That will at least let you learn about coreboot. > > 2- Is it a bootable version of superiotool that allows me to check the > hardware of a PC without install it ? > > not that I know of.

1 0

ASUS KGPE-D16 Automated Test Failure [master]
by Raptor Engineering Automated Coreboot Test Stand 24 Jul '17

24 Jul '17

The ASUS KGPE-D16 fails verification for branch master as of commit e1695e2cd4c7d142b91b90cf593a26d9e7948650 The following tests failed: BOOT_FAILURE Commits since last successful test: e1695e2 nb/intel/i440bx: Add final newline to raminit.c See attached log for details This message was automatically generated from Raptor Engineering's ASUS KGPE-D16 test stand Want to test on your own equipment? Check out https://www.raptorengineering.com/content/REACTS/intro.html Raptor Engineering also offers coreboot consulting services! Please visit https://www.raptorengineering.com for more information Please contact Timothy Pearson at Raptor Engineering <tpearson(a)raptorengineering.com> regarding any issues stemming from this notification

1 0

Is Coreboot architecture dipendent ?
by ingegneriaforense＠alice.it 23 Jul '17

23 Jul '17

Hello everybody, It's the time for me to install Coreboot on one of my machine. It seems a very big design ! Please, can you tell me if Coreboot is motherboard architecture dependent or simply I can download it, compile and flash the .rom file in the Bios chip ? I will do the first test on a PC with motherboard: MSI MS-7168 ver. 1C mounting an AMD Athlon 64 Processor. Is it necessary I compile Coreboot on the PC where I want to install it ? Is Coreboot RAM dependent ? That is, can I start-up the PC with only the Processor and the BIOS chip, without RAM and hard-disk ? Thanks in advance. I hope to hear you soon. Best Regards. Vincenzo. Forensic Consultant Tribunale di Lecce Studio: Strada di Garibaldi - Contrada Paradisi 73010 Lequile (LE) cell: 339.7968555 skype: vincenzo.di_salvo

3 2

Re: [coreboot] Hi-DPI displays and showing text information for kevin in depthcharge
by Paul Kocialkowski 23 Jul '17

23 Jul '17

Le lundi 17 juillet 2017 à 22:11 +0200, Patrick Georgi via coreboot a écrit : > I wouldn't scale at compile time (as said, storage constrained > payloads might not be happy about that). > > I wouldn't scale each character up on each access though (we won't > hardware accelerate the scaling, and yes, that does get slow - > framebuffers aren't always the fastest type of memory and that way the > access pattern is the same set of memcpy()s as for any other huge > font, so we won't need to deal with "fast fonts" and "slow fonts" > beyond basic geometry characteristics), but synthesize a new font in > the regular font table at init-time and then use it like any pre- > existing font (just that it happened to be added after load). As it turns out, no scaling in memory is required, either at build time or run time. This is thanks to the fact that the font is coded with each bit representing a filled or blank pixel, so the font has to be accessed bit-by-bit to draw it. I simply modified the access logic to use a scale factor and I don't think it will impact performance much (that's still two extra divisions for each pixel though). The changes are up for review at: https://review.coreboot.org/#/c/20708/ https://review.coreboot.org/#/c/20709/ https://review.coreboot.org/#/c/20710/ Thanks everyone for the feedback and happy review! > 2017-07-17 21:47 GMT+02:00 Julius Werner <jwerner(a)chromium.org>: > > I agree with most of what Patrick said, I think dynamic scaling to > > integer multiples may be best. Scaling the font up at compile-time > > seems like unnecessary bloat to the binary (although I'm not sure, > > how big are these fonts?). If you do want to include them at compile > > time, you may as well include a real larger font rather than just a > > scaled one. -- Paul Kocialkowski, developer of free digital technology and hardware support. Website: https://www.paulk.fr/ Coding blog: https://code.paulk.fr/ Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/

1 1

Re: [coreboot] Problem with implementing workaround from errata
by Łukasz Dobrowolski 23 Jul '17

23 Jul '17

On 07/23/2017 01:29 PM, Kyösti Mälkki wrote: > Hi > > Please mention the errata document number, looks like the attachment > was dropped. It's 47792 (AMD A45/A50M/A55E Errata). > Also you can just post your work-in-progress source to gerrit, > including the workaround you have implemented. I don't know where to start with the workaround. I'll clean up the code and submit it later today. > Kyösti > > On Sun, Jul 23, 2017 at 10:10 AM, Łukasz Dobrowolski > <lukasz(a)dobrowolski.io> wrote: >> Hi! >> I've resumed my work non ThinkPad X120e. >> >> I have a problem with random hangs during boot. >> The hang occurs in vendorcode/amd/cimx/sb800/SBPort.c:296. >> >> After a long fight I was able to diagnose the issue. It's described in >> errata (attached) on page 13. There is a suggested workaround, however >> the description is not verbose enough for me. >> >> Could somebody give me some hints? >> >> The functions are entered in this order: >> (?) >> cache_as_ram_setup: //cpu/amd/agesa/cache_as_ram.inc >> void * asmlinkage romstage_main(unsigned long bist) >> //cpu/amd/agesa/romstage.c >> void platform_once(struct sysinfo *cb) //cpu/amd/agesa/family14/romstage.c >> void sb_Poweron_Init(void) //southbridge/amd/cimx/sb800/early.c >> VOID sbPowerOnInit(IN AMDSBCFG* pConfig) >> //vendorcode/amd/cimx/sb800/SBPort.c (hang!) >> >> Where should I put the workaround if I can't pollute the shared code? >> >> The code for the port is based on asrock/e350m1. I can upload it to >> gerrit if needed but not much was changed. >> >> -- >> Łukasz Dobrowolski >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://mail.coreboot.org/mailman/listinfo/coreboot -- Łukasz Dobrowolski

2 1

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coreboot July 2017