coreboot March 2015

coreboot@coreboot.org

62 participants
166 discussions

Re: [coreboot] Legacy BIOS
by ron minnich 09 Mar '15

09 Mar '15

I don't understand why you think we need a "legacy BIOS for minnowboard" given what this group has been doing for the last 15 years. On Mon, Mar 9, 2015 at 4:24 AM Corey Osgood <corey.osgood(a)gmail.com> wrote: > He's trying to advertise his company's legacy BIOS solution. > > -Corey >

1 0

Re: [coreboot] Legacy BIOS
by Corey Osgood 09 Mar '15

09 Mar '15

He's trying to advertise his company's legacy BIOS solution. -Corey

1 0

Legacy BIOS
by Berth-Olof Bergman 09 Mar '15

09 Mar '15

Hi, Seems you need a legacy BIOS for minnow board max. With legacy BIOS you can run 16, 32 and 64 bit operating systems. We have the fastest booting BIOS for the Bay Trail architecture and it’s pure legacy. Our Bay Trail BIOS will soon be available for Minnow Board Max. Best regards, B-O Bergman Winzent Technologies

2 1

Fwd: lowRISC in Google Summer of Code 2015
by ron minnich 09 Mar '15

09 Mar '15

---------- Forwarded message --------- From: lowRISC Announcements <list(a)ann.lowrisc.org> Date: Sun, Mar 8, 2015 at 1:52 PM Subject: lowRISC in Google Summer of Code 2015 To: <rminnich(a)gmail.com> We're pleased to announce that lowRISC is taking part in Google Summer of Code as a mentoring organisation. We're working with a number of our friends in the wider free and open source software and hardware communities to provide a range of project ideas in a number of different implementation languages covering every level of the hardware/software stack. GSoC provides a stipend of $5500 for selected students to work on open source over the summer. Student applications open on Monday 16th March. For more information, see the GSoC FAQ <https://www.google-melange.com/gsoc/document/show/gsoc_ program/google/gsoc2015/help_page>. The full lowRISC ideas list is available here <http://www.lowrisc.org/docs/gsoc-2015-ideas/>, and the titles are listed below. We're also very interested in student-proposed ideas. Massive thanks are due to everyone who has volunteered to mentor. * A fully open source FPGA compilation flow using Yosys * Accessing the OpenCores ecosystem (implementing a Wishbone to TileLink bridge) * jor1k port to RISC-V * Extend Tavor to support directed generation of assembly test cases * Constrained randomised testing with coverage tracking in Cocotb * TCP offload to minion cores using rump kernels * Schematic Viewer for Netlists (SVG/JavaScript) * Porting Icarus Verilog to JavaScript using Emscripten * Optimized ray tracer for Nyuzi parallel processor * Porting musl libc to RISC-V * LLVM pass for control-flow hijacking protection using lowRISC’s tagged memory * Porting L4/FIASCO.OC to RISC-V * Adding Chisel support to FuseSoC * Trace Debugging Infrastructure for lowRISC * OCaml native code port to RISC-V * JTAG hardware debugging support for Nyuzi Even if you're not a student, we'd appreciate your help in spreading the word to ensure we get the best possible applicants. As ever, we invite you to subscribe to the lowrisc-dev discussion list <http://listmaster.pepperfish.net/cgi-bin/mailman/listinfo/ lowrisc-dev-lists.lowrisc.org>, idle on #lowRISC on irc.oftc.net, and follow @lowRISC on Twitter. -- The lowRISC team ------ If you wish to unsubscribe, click http://subscribe.lowrisc.org/ unsubscribe?email=rminnich%40gmail.com&secret=e66ba8262f518ffbe2fb50edd82c61 f0ed8f5c6a

1 0

Re: [coreboot] [GSoC-2015] Interested in Participating - Discussing Ideas
by Peter Stuge 08 Mar '15

08 Mar '15

Hi, Marc Jones wrote: > > I recently tried running coreboot + SeaBIOS + SYSLINUX under QEMU (as > > suggested on the Easy tasks page [5]), and it seems to work alright - > > but is it possible to find a SYSLINUX ELF image so I can eliminate > > SeaBIOS? > > I don't know if anyone has made a SYSLINUX elf. It's not possible to use SYSLINUX without SeaBIOS. SYSLINUX is by design and very much on purpose tightly coupled with legacy BIOS interrupt services and legacy BIOS data structures. The SYSLINUX author is also outspoken against coreboot, the principal argument being that coreboot is bad because it works diferently than legacy BIOS. //Peter

1 0

Re: [coreboot] ITE IT8718F support status
by Kyösti Mälkki 08 Mar '15

08 Mar '15

On Sun, 2015-03-08 at 20:26 +0700, Darmawan Salihun wrote: > Hi, > > I just want to verify has anyone tested the ITE IT8718F superio support? > Over at: http://www.coreboot.org/Supported_Motherboards > all motherboards mentioned are in the unknown status at the moment. > Hi, key features of this superio were tested around 2010 when the first boards with it got their coreboot port completed. By 2014, when our supported boards wikipage was changed to collect reports of working builds, this small selection of boards had already become obsolete enough so that nobody has bothered to test and report. To have a working superio depends on a couple of external parameters. One is to route all the required IO ranges (including 2e/4e) to LPC bus, second is to confirm superio has 24/48 MHz clock input. In some cases 48MHz clock requires GPIO programming on southbridge. Kyösti

2 1

Re: [coreboot] ITE IT8718F support status
by boss Gonzales 08 Mar '15

08 Mar '15

Can I subscribe On Mar 8, 2015 7:05 AM, "Darmawan Salihun" <darmawan.salihun(a)gmail.com> wrote: > > Hi, > > I just want to verify has anyone tested the ITE IT8718F superio support? > Over at: http://www.coreboot.org/Supported_Motherboards > all motherboards mentioned are in the unknown status at the moment. > > I'm currently porting to motherboard with this specific superIO chip. > > There's nothing particularly stand out from reading the code at > src/superio/ite/it8718f though. > > Kind Regards, > > Darmawan > -------------------------------------------------------------------- > -= Знания людей принадлежат миру =- > [-Human knowledge belongs to the world-] > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot

1 0

ITE IT8718F support status
by Darmawan Salihun 08 Mar '15

08 Mar '15

Hi, I just want to verify has anyone tested the ITE IT8718F superio support? Over at: http://www.coreboot.org/Supported_Motherboards all motherboards mentioned are in the unknown status at the moment. I'm currently porting to motherboard with this specific superIO chip. There's nothing particularly stand out from reading the code at src/superio/ite/it8718f though. Kind Regards, Darmawan -------------------------------------------------------------------- -= Знания людей принадлежат миру =- [-Human knowledge belongs to the world-]

1 0

(no subject)
by vin ben 08 Mar '15

08 Mar '15

Hi , I am Vinamra. I am an Electronics undergraduate at IIIT-Hyderabad in India. I want to contribute to the FPGA-based flash chip emulator project (Flashrom) in the summer of code program. I have good experience with digital design and VHDL . Can you please get me started. many thanks -Vinamra.

1 0

AMD Trinity graphics test failure.
by 유택연 08 Mar '15

08 Mar '15

Hello Guys, I have ported Coreboot + SeaBIOS to my custom board with Trinity APU with their A75 south bridge. This is very similar to DB-FP2 (thatcher). Linux successfully booted and operating seems to OK. But Windows 7 installation was failed after the first loading screen (Windows flag). Seems to be stopped at this stage, only flag is waving infenitely. I can't passed AMD's board production test tool (GPU testing) under Ubuntu 12.04. This tool said "resource allocation failure!". Reference boards, Thatcher and Parmer, has not this problem. I don't know what is the problem. Anyone experienced this problem ? Taikyon Yoo tkyoo(a)foxeyes.com

1 0

← Newer
1
...
10
11
12
13
14
15
16
17
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot March 2015