the following patch was just integrated into master:
commit 74e27b419dc9da8ea7c7ceb9cc0ad203176d24f9
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Sat Feb 9 13:51:55 2013 -0800
armv7/exynos: make BL1_SIZE_KB consistent with numbers used...
The Kconfig variable indicates KB, but the number used was bytes.
Let's just assume KB is correct for now.
Change-Id: I910c126104f0222fc48b70a18df943f2afddeca3
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
Reviewed-on: http://review.coreboot.org/2341
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
Build-Tested: build bot (Jenkins) at Sat Feb 9 23:01:12 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Sat Feb 9 23:09:15 2013, giving +2
See http://review.coreboot.org/2341 for details.
-gerrit
David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2341
-gerrit
commit 2eeda3b77d889ac4b2066676b3cfb7cd884ab342
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Sat Feb 9 13:51:55 2013 -0800
armv7/exynos: make BL1_SIZE_KB consistent with numbers used...
The Kconfig variable indicates KB, but the number used was bytes.
Let's just assume KB is correct for now.
Change-Id: I910c126104f0222fc48b70a18df943f2afddeca3
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
---
src/arch/armv7/bootblock.inc | 2 +-
src/arch/armv7/bootblock.lds | 2 +-
src/cpu/samsung/exynos5250/Kconfig | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/arch/armv7/bootblock.inc b/src/arch/armv7/bootblock.inc
index 82d801e..25cc8c6 100644
--- a/src/arch/armv7/bootblock.inc
+++ b/src/arch/armv7/bootblock.inc
@@ -36,7 +36,7 @@ _bl1:
* on ARM, which is 8KB in size and it is prepended to the
* reset vector
*/
- .skip CONFIG_BL1_SIZE_KB
+ .skip (CONFIG_BL1_SIZE_KB * 1024)
.globl _start
_start: b reset
diff --git a/src/arch/armv7/bootblock.lds b/src/arch/armv7/bootblock.lds
index fc58601..9482cef 100644
--- a/src/arch/armv7/bootblock.lds
+++ b/src/arch/armv7/bootblock.lds
@@ -25,7 +25,7 @@ OUTPUT_ARCH(arm)
TARGET(binary)
SECTIONS
{
- ROMLOC = CONFIG_BOOTBLOCK_BASE - CONFIG_BL1_SIZE_KB;
+ ROMLOC = CONFIG_BOOTBLOCK_BASE - (CONFIG_BL1_SIZE_KB * 1024);
/* This section might be better named .setup */
.rom ROMLOC : {
diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig
index 3e61087..357817e 100644
--- a/src/cpu/samsung/exynos5250/Kconfig
+++ b/src/cpu/samsung/exynos5250/Kconfig
@@ -16,7 +16,7 @@ config SATA_AHCI
config BL1_SIZE_KB
int
- default 8192
+ default 8
# Example SRAM/iRAM map for Exynos5250 platform:
#
the following patch was just integrated into master:
commit 644e83b0070c28ffa0f68ac1966df968b0a500d9
Author: Patrick Georgi <patrick(a)georgi-clan.de>
Date: Sat Feb 9 15:35:30 2013 +0100
speedstep: Deduplicate some MSR identifiers
In particular:
MSR_PMG_CST_CONFIG_CONTROL
MSR_PMG_IO_BASE_ADDR
MSR_PMG_IO_CAPTURE_ADDR
Change-Id: Ief2697312f0edf8c45f7d3550a7bedaff1b69dc6
Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2337
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Build-Tested: build bot (Jenkins) at Sat Feb 9 16:13:03 2013, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Sat Feb 9 21:02:35 2013, giving +2
See http://review.coreboot.org/2337 for details.
-gerrit
the following patch was just integrated into master:
commit dbc6ca7aea6e2474c30b4c3892abe0b3055abf67
Author: Patrick Georgi <patrick(a)georgi-clan.de>
Date: Sat Feb 9 15:26:47 2013 +0100
romcc: Use default romcc flags for most boards
Except for one board, the flags can be derived from CONFIG_MMX
and CONFIG_SSE.
Change-Id: I64a11135ee7ce8676f3422b2377069a3fa78e24d
Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2336
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Build-Tested: build bot (Jenkins) at Sat Feb 9 15:44:02 2013, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Sat Feb 9 21:00:47 2013, giving +2
See http://review.coreboot.org/2336 for details.
-gerrit
the following patch was just integrated into master:
commit f03d22efd7abe6870f1216bc6b1e07aaba446c84
Author: Patrick Georgi <patrick(a)georgi-clan.de>
Date: Sat Feb 9 14:35:55 2013 +0100
romcc: Don't use user overridable romcc flags for bootblock
The bootblock is typically run before fpu/mmx/sse setup, so
we can't rely on -mcpu=p4 and the like to increase the
register space.
bootblock_romccflags does that for SSE, but they're controlled
separately.
Change-Id: I2b0609ac18b2394a319bf9bbbee1f77d2e758127
Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2335
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Build-Tested: build bot (Jenkins) at Sat Feb 9 15:37:01 2013, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Sat Feb 9 20:59:24 2013, giving +2
See http://review.coreboot.org/2335 for details.
-gerrit
the following patch was just integrated into master:
commit 4610247ef1744ccabbcc6bfc441a3583aa49f7b5
Author: Patrick Georgi <patrick(a)georgi-clan.de>
Date: Sat Feb 9 13:26:19 2013 +0100
cbfstool: Handle alignment in UEFI payloads
Tiano for X64 is much cleaner to start up when using higher alignments in
firmware volumes. These are implemented using padding files and sections
that cbfstool knew nothing about. Skip these.
Change-Id: Ibc433070ae6f822d00af2f187018ed8b358e2018
Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2334
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Build-Tested: build bot (Jenkins) at Sat Feb 9 13:36:05 2013, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Sat Feb 9 20:58:22 2013, giving +2
See http://review.coreboot.org/2334 for details.
-gerrit