coreboot February 2013

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New patch to review for coreboot: 6968de0 exynos/snow: move SPI GPIO setup to mainboard bootblock code
by David Hendricks 10 Feb '13

10 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2347 -gerrit commit 6968de0c1bbada0b9d71225b31fe67f781c8db20 Author: David Hendricks <dhendrix(a)chromium.org> Date: Sat Feb 9 17:24:17 2013 -0800 exynos/snow: move SPI GPIO setup to mainboard bootblock code This moves GPIO setup from chip-specific SPI code to mainboard- specific bootblock code. This makes exynos_spi_open a bit more generic so it can eventually be used for any SPI channel. This also benefits CBFS since the user can set media->context to to any set of SPI registers. Change-Id: I2bcb9de370df0a79353c14b4d021b471ddebfacd Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5-common/spi.c | 11 +---------- src/mainboard/google/snow/bootblock.c | 1 + 2 files changed, 2 insertions(+), 10 deletions(-) diff --git a/src/cpu/samsung/exynos5-common/spi.c b/src/cpu/samsung/exynos5-common/spi.c index 90b74c0..0ea2dcd 100644 --- a/src/cpu/samsung/exynos5-common/spi.c +++ b/src/cpu/samsung/exynos5-common/spi.c @@ -81,21 +81,12 @@ static void exynos_spi_rx_tx(struct exynos_spi *regs, int todo, } } +/* set up SPI channel */ int exynos_spi_open(struct exynos_spi *regs) { clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */ /* set the spi1 GPIO */ - // TODO Some of these should be done in board's bootblock file. - // We should fix-up the mainboard-specific vs. exynos-specific parts in a - // follow-up CL. - -// exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE); - gpio_cfg_pin(GPIO_A24, 0x2); - gpio_cfg_pin(GPIO_A25, 0x2); - gpio_cfg_pin(GPIO_A26, 0x2); - gpio_cfg_pin(GPIO_A27, 0x2); - /* set pktcnt and enable it */ writel(4 | SPI_PACKET_CNT_EN, &regs->pkt_cnt); /* set FB_CLK_SEL */ diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c index 9725af3..17a3267 100644 --- a/src/mainboard/google/snow/bootblock.c +++ b/src/mainboard/google/snow/bootblock.c @@ -30,6 +30,7 @@ void bootblock_mainboard_init(void); void bootblock_mainboard_init(void) { + exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE); #if CONFIG_EARLY_CONSOLE exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); console_init();

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Patch set updated for coreboot: f615df5 exynos/snow: set SPI clock rate in romstage main
by David Hendricks 10 Feb '13

10 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2346 -gerrit commit f615df575d630f67323956646df0b7ba07a911ec Author: David Hendricks <dhendrix(a)chromium.org> Date: Sat Feb 9 16:42:23 2013 -0800 exynos/snow: set SPI clock rate in romstage main This moves the setting of SPI clock rate into romstage's main, which allows us to eliminate a bunch of dependencies from the bootblock (about 7KB worth). Change-Id: I371499bb4af6a6aa838294bc56f9dbc21864957a Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5-common/spi.c | 1 - src/mainboard/google/snow/romstage.c | 4 ++++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/cpu/samsung/exynos5-common/spi.c b/src/cpu/samsung/exynos5-common/spi.c index 90b74c0..0e5d5e5 100644 --- a/src/cpu/samsung/exynos5-common/spi.c +++ b/src/cpu/samsung/exynos5-common/spi.c @@ -83,7 +83,6 @@ static void exynos_spi_rx_tx(struct exynos_spi *regs, int todo, int exynos_spi_open(struct exynos_spi *regs) { - clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */ /* set the spi1 GPIO */ // TODO Some of these should be done in board's bootblock file. diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index c0bb6f4..719337b 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -24,8 +24,10 @@ #include <cbfs.h> #include <common.h> +#include <cpu/samsung/exynos5250/clk.h> #include <cpu/samsung/exynos5250/dmc.h> #include <cpu/samsung/exynos5250/setup.h> +#include <cpu/samsung/exynos5250/periph.h> #include <cpu/samsung/exynos5250/clock_init.h> #include <console/console.h> @@ -53,6 +55,8 @@ void main(void) int ret; void *entry; + clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */ + /* Clock must be initialized before console_init, otherwise you may need * to re-initialize serial console drivers again. */ mem = get_mem_timings();

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Patch set updated for coreboot: c6a1fdc armv7/snow: Remove unused modules in bootblock and romstage.
by David Hendricks 10 Feb '13

10 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2322 -gerrit commit c6a1fdcb829996cee74ef6b8705d50ae57b54a8d Author: Hung-Te Lin <hungte(a)chromium.org> Date: Fri Feb 8 13:49:10 2013 +0800 armv7/snow: Remove unused modules in bootblock and romstage. For Exynos/snow, cpu_info and power modules and also some parts of the GPIO API (which require timer and pwm modules) are not used in the current bootblock. Clock init only needs to be used if early console is enabled. Now our bootblock is 22420 bytes with early serial console and 11192 bytes without. Those include the 8KB BL1 region. Change-Id: I9c958dafb9cf522df0dcfbef373ce741aa162544 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5250/Makefile.inc | 17 +++++++---------- src/cpu/samsung/s5p-common/Makefile.inc | 5 ++--- src/cpu/samsung/s5p-common/s5p_gpio.c | 7 +++++++ 3 files changed, 16 insertions(+), 13 deletions(-) diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 13baa7e..941feb9 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -3,23 +3,20 @@ # image outside of CBFS #INTERMEDIATE += exynos5250_add_bl1 -# Clock init is done in bootblock to support UART output for -# debugging. We may add a Kconfig option to disable clock init -# in the bootblock and try moving it entirely into romstage. -bootblock-y += clock_init.c -bootblock-y += clock.c -bootblock-y += pinmux.c -bootblock-y += soc.c +# Clock is required for starting SPI to load romstage file from CBFS. +bootblock-$(CONFIG_EARLY_CONSOLE) += clock_init.c +bootblock-$(CONFIG_EARLY_CONSOLE) += clock.c +bootblock-$(CONFIG_EARLY_CONSOLE) += pinmux.c +bootblock-$(CONFIG_EARLY_CONSOLE) += soc.c bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c romstage-y += clock.c romstage-y += clock_init.c +romstage-y += pinmux.c # required by s3c24x0_i2c (s5p-common) and uart. romstage-y += exynos_cache.c -romstage-y += pinmux.c -romstage-y += power.c -romstage-y += soc.c romstage-y += dmc_common.c romstage-y += dmc_init_ddr3.c +romstage-$(CONFIG_EARLY_CONSOLE) += soc.c romstage-$(CONFIG_EARLY_CONSOLE) += uart.c #ramstage-y += tzpc_init.c diff --git a/src/cpu/samsung/s5p-common/Makefile.inc b/src/cpu/samsung/s5p-common/Makefile.inc index 0f4200c..118dd47 100644 --- a/src/cpu/samsung/s5p-common/Makefile.inc +++ b/src/cpu/samsung/s5p-common/Makefile.inc @@ -1,8 +1,7 @@ -bootblock-y += pwm.c bootblock-y += s5p_gpio.c -bootblock-y += timer.c +bootblock-$(CONFIG_EARLY_CONSOLE) += pwm.c +bootblock-$(CONFIG_EARLY_CONSOLE) += timer.c -romstage-y += cpu_info.c romstage-y += pwm.c # needed by timer.c romstage-y += s5p_gpio.c romstage-y += timer.c diff --git a/src/cpu/samsung/s5p-common/s5p_gpio.c b/src/cpu/samsung/s5p-common/s5p_gpio.c index e91b9df..8daae59 100644 --- a/src/cpu/samsung/s5p-common/s5p_gpio.c +++ b/src/cpu/samsung/s5p-common/s5p_gpio.c @@ -414,6 +414,12 @@ int gpio_set_value(unsigned gpio, int value) */ #define GPIO_DELAY_US 5 +#ifndef __BOOT_BLOCK__ +/* + * FIXME(dhendrix): These functions use udelay, which has dependencies on + * pwm code and timer code. These aren't necessary for the bootblock and + * bloat the image significantly. + */ int gpio_read_mvl3(unsigned gpio) { int high, low; @@ -476,6 +482,7 @@ int gpio_decode_number(unsigned gpio_list[], int count) return result; } +#endif /* __BOOT_BLOCK__ */ static const char *get_cfg_name(int cfg) {

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New patch to review for coreboot: c4fc63d exynos/snow: set SPI clock rate in romstage main
by David Hendricks 10 Feb '13

10 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2346 -gerrit commit c4fc63dd8b73b1f619c79e81915a1309b84630e7 Author: David Hendricks <dhendrix(a)chromium.org> Date: Sat Feb 9 16:42:23 2013 -0800 exynos/snow: set SPI clock rate in romstage main This moves the setting of SPI clock rate into romstage's main, which allows us to eliminate a bunch of dependencies from the bootblock (about 7KB worth). Change-Id: I371499bb4af6a6aa838294bc56f9dbc21864957a Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5-common/spi.c | 1 - src/mainboard/google/snow/romstage.c | 4 ++++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/cpu/samsung/exynos5-common/spi.c b/src/cpu/samsung/exynos5-common/spi.c index 90b74c0..0e5d5e5 100644 --- a/src/cpu/samsung/exynos5-common/spi.c +++ b/src/cpu/samsung/exynos5-common/spi.c @@ -83,7 +83,6 @@ static void exynos_spi_rx_tx(struct exynos_spi *regs, int todo, int exynos_spi_open(struct exynos_spi *regs) { - clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */ /* set the spi1 GPIO */ // TODO Some of these should be done in board's bootblock file. diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index c0bb6f4..719337b 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -24,8 +24,10 @@ #include <cbfs.h> #include <common.h> +#include <cpu/samsung/exynos5250/clk.h> #include <cpu/samsung/exynos5250/dmc.h> #include <cpu/samsung/exynos5250/setup.h> +#include <cpu/samsung/exynos5250/periph.h> #include <cpu/samsung/exynos5250/clock_init.h> #include <console/console.h> @@ -53,6 +55,8 @@ void main(void) int ret; void *entry; + clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */ + /* Clock must be initialized before console_init, otherwise you may need * to re-initialize serial console drivers again. */ mem = get_mem_timings();

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Patch set updated for coreboot: 1759199 armv7/snow: Remove unused modules in bootblock and romstage.
by David Hendricks 10 Feb '13

10 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2322 -gerrit commit 17591994497e05b1a370e2b10c2566fb7959c77a Author: Hung-Te Lin <hungte(a)chromium.org> Date: Fri Feb 8 13:49:10 2013 +0800 armv7/snow: Remove unused modules in bootblock and romstage. For Exynos/snow, cpu_info and power modules and also some parts of the GPIO API (which require timer and pwm modules) are not used in the current bootblock. Clock init only needs to be used if early console is enabled. Now our bootblock is 22420 bytes with early serial console and 11192 bytes without. Those include the 8KB BL1 region. Change-Id: I9c958dafb9cf522df0dcfbef373ce741aa162544 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5250/Makefile.inc | 17 +++++++---------- src/cpu/samsung/s5p-common/Makefile.inc | 5 ++--- src/cpu/samsung/s5p-common/s5p_gpio.c | 7 +++++++ 3 files changed, 16 insertions(+), 13 deletions(-) diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 13baa7e..941feb9 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -3,23 +3,20 @@ # image outside of CBFS #INTERMEDIATE += exynos5250_add_bl1 -# Clock init is done in bootblock to support UART output for -# debugging. We may add a Kconfig option to disable clock init -# in the bootblock and try moving it entirely into romstage. -bootblock-y += clock_init.c -bootblock-y += clock.c -bootblock-y += pinmux.c -bootblock-y += soc.c +# Clock is required for starting SPI to load romstage file from CBFS. +bootblock-$(CONFIG_EARLY_CONSOLE) += clock_init.c +bootblock-$(CONFIG_EARLY_CONSOLE) += clock.c +bootblock-$(CONFIG_EARLY_CONSOLE) += pinmux.c +bootblock-$(CONFIG_EARLY_CONSOLE) += soc.c bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c romstage-y += clock.c romstage-y += clock_init.c +romstage-y += pinmux.c # required by s3c24x0_i2c (s5p-common) and uart. romstage-y += exynos_cache.c -romstage-y += pinmux.c -romstage-y += power.c -romstage-y += soc.c romstage-y += dmc_common.c romstage-y += dmc_init_ddr3.c +romstage-$(CONFIG_EARLY_CONSOLE) += soc.c romstage-$(CONFIG_EARLY_CONSOLE) += uart.c #ramstage-y += tzpc_init.c diff --git a/src/cpu/samsung/s5p-common/Makefile.inc b/src/cpu/samsung/s5p-common/Makefile.inc index 0f4200c..118dd47 100644 --- a/src/cpu/samsung/s5p-common/Makefile.inc +++ b/src/cpu/samsung/s5p-common/Makefile.inc @@ -1,8 +1,7 @@ -bootblock-y += pwm.c bootblock-y += s5p_gpio.c -bootblock-y += timer.c +bootblock-$(CONFIG_EARLY_CONSOLE) += pwm.c +bootblock-$(CONFIG_EARLY_CONSOLE) += timer.c -romstage-y += cpu_info.c romstage-y += pwm.c # needed by timer.c romstage-y += s5p_gpio.c romstage-y += timer.c diff --git a/src/cpu/samsung/s5p-common/s5p_gpio.c b/src/cpu/samsung/s5p-common/s5p_gpio.c index e91b9df..8daae59 100644 --- a/src/cpu/samsung/s5p-common/s5p_gpio.c +++ b/src/cpu/samsung/s5p-common/s5p_gpio.c @@ -414,6 +414,12 @@ int gpio_set_value(unsigned gpio, int value) */ #define GPIO_DELAY_US 5 +#ifndef __BOOT_BLOCK__ +/* + * FIXME(dhendrix): These functions use udelay, which has dependencies on + * pwm code and timer code. These aren't necessary for the bootblock and + * bloat the image significantly. + */ int gpio_read_mvl3(unsigned gpio) { int high, low; @@ -476,6 +482,7 @@ int gpio_decode_number(unsigned gpio_list[], int count) return result; } +#endif /* __BOOT_BLOCK__ */ static const char *get_cfg_name(int cfg) {

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Patch merged into coreboot/master: e50e343 armv7/exynos5250: place .id between .start and bootblock main
by gerrit＠coreboot.org 10 Feb '13

10 Feb '13

the following patch was just integrated into master: commit e50e3434709f1f37359eb3df25aded61fca76850 Author: David Hendricks <dhendrix(a)chromium.org> Date: Sat Feb 9 14:58:45 2013 -0800 armv7/exynos5250: place .id between .start and bootblock main This places the .id section toward the lower region of the coreboot image, before the bootblock. It's easier for humans to find by dumping the image and it also eliminates ID_SECTION_OFFSET which is currently the upper bound on our image size. Change-Id: I7d737b901dac659ddf9aa437cee5dc32f1080546 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/2345 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Sun Feb 10 01:04:33 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Sun Feb 10 01:28:53 2013, giving +2 See http://review.coreboot.org/2345 for details. -gerrit

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Patch merged into coreboot/master: f5a3023 armv7: make bootblock linker script more explicit
by gerrit＠coreboot.org 10 Feb '13

10 Feb '13

the following patch was just integrated into master: commit f5a302378aa062916b5838a81c26567b59f93a8f Author: David Hendricks <dhendrix(a)chromium.org> Date: Sat Feb 9 14:53:47 2013 -0800 armv7: make bootblock linker script more explicit This adds a .bl1 and .start symbol that is placed at the beginning of the .rom section. The goal is to move the .id section in between the reset vector and bootblock_main. Change-Id: Ie732ce656d697c059cc0fa40c844b39f53fc214c Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/2344 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Sun Feb 10 00:55:36 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Sun Feb 10 01:28:06 2013, giving +2 See http://review.coreboot.org/2344 for details. -gerrit

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New patch to review for coreboot: a3cab3d armv7/exynos5250: place .id between .start and bootblock main
by David Hendricks 09 Feb '13

09 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2345 -gerrit commit a3cab3dd5e4a140b623147174e9df10678a2783a Author: David Hendricks <dhendrix(a)chromium.org> Date: Sat Feb 9 14:58:45 2013 -0800 armv7/exynos5250: place .id between .start and bootblock main This places the .id section toward the lower region of the coreboot image, before the bootblock. It's easier for humans to find by dumping the image and it also eliminates ID_SECTION_OFFSET which is currently the upper bound on our image size. Change-Id: I7d737b901dac659ddf9aa437cee5dc32f1080546 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/Makefile.inc | 1 - src/arch/armv7/bootblock.lds | 1 + src/arch/armv7/lib/id.inc | 6 +++--- src/arch/armv7/lib/id.lds | 6 ------ src/cpu/samsung/exynos5250/Kconfig | 6 ------ 5 files changed, 4 insertions(+), 16 deletions(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 2c5d8c6..6d4a364 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -202,7 +202,6 @@ $(obj)/coreboot.pre: $(objcbfs)/romstage_xip.elf $(obj)/coreboot.pre1 $(CBFSTOOL # Build the bootblock bootblock_lds = $(src)/arch/armv7/bootblock.lds -bootblock_lds += $(src)/arch/armv7/lib/id.lds bootblock_lds += $(chipset_bootblock_lds) bootblock_inc += $(src)/arch/armv7/bootblock.inc diff --git a/src/arch/armv7/bootblock.lds b/src/arch/armv7/bootblock.lds index f45e6c0..48ba0ab 100644 --- a/src/arch/armv7/bootblock.lds +++ b/src/arch/armv7/bootblock.lds @@ -32,6 +32,7 @@ SECTIONS _rom = .; *(.bl1); *(.start); + *(.id); *(.text); *(.text.*); *(.rom.text); diff --git a/src/arch/armv7/lib/id.inc b/src/arch/armv7/lib/id.inc index 4da7024..ffe547d 100644 --- a/src/arch/armv7/lib/id.inc +++ b/src/arch/armv7/lib/id.inc @@ -8,9 +8,9 @@ vendor: .asciz CONFIG_MAINBOARD_VENDOR part: .asciz CONFIG_MAINBOARD_PART_NUMBER -.long __id_end + CONFIG_ID_SECTION_OFFSET - ver /* Reverse offset to the vendor id */ -.long __id_end + CONFIG_ID_SECTION_OFFSET - vendor /* Reverse offset to the vendor id */ -.long __id_end + CONFIG_ID_SECTION_OFFSET - part /* Reverse offset to the part number */ +.long __id_end - ver /* Reverse offset to the vendor id */ +.long __id_end - vendor /* Reverse offset to the vendor id */ +.long __id_end - part /* Reverse offset to the part number */ .long CONFIG_ROM_SIZE /* Size of this romimage */ .globl __id_end diff --git a/src/arch/armv7/lib/id.lds b/src/arch/armv7/lib/id.lds deleted file mode 100644 index 9d50479..0000000 --- a/src/arch/armv7/lib/id.lds +++ /dev/null @@ -1,6 +0,0 @@ -SECTIONS { - . = CONFIG_ID_SECTION_BASE; - .id (.): { - *(.id) - } -} diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig index 357817e..f62195a 100644 --- a/src/cpu/samsung/exynos5250/Kconfig +++ b/src/cpu/samsung/exynos5250/Kconfig @@ -22,8 +22,6 @@ config BL1_SIZE_KB # # 0x0202_0000: vendor-provided BL1 # 0x0202_3400: bootblock, assume up to 32KB in size -# 0x0202_7000: ID section, assume 2KB in size. This will be -# within the bootblock section. # 0x0203_0000: romstage, assume up to 128KB in size. # 0x0207_7f00: stack pointer @@ -40,10 +38,6 @@ config BOOTBLOCK_BASE hex default 0x02023400 -config ID_SECTION_BASE - hex - default 0x02027e00 - config ROMSTAGE_BASE hex default 0x02030000

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New patch to review for coreboot: d18b72c armv7: make bootblock linker script more explicit
by David Hendricks 09 Feb '13

09 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2344 -gerrit commit d18b72c153ab7788f5ae36f58b2a6c2d2c1ae2b1 Author: David Hendricks <dhendrix(a)chromium.org> Date: Sat Feb 9 14:53:47 2013 -0800 armv7: make bootblock linker script more explicit This adds a .bl1 and .start symbol that is placed at the beginning of the .rom section. The goal is to move the .id section in between the reset vector and bootblock_main. Change-Id: Ie732ce656d697c059cc0fa40c844b39f53fc214c Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/bootblock.inc | 2 ++ src/arch/armv7/bootblock.lds | 2 ++ 2 files changed, 4 insertions(+) diff --git a/src/arch/armv7/bootblock.inc b/src/arch/armv7/bootblock.inc index 25cc8c6..efe3d67 100644 --- a/src/arch/armv7/bootblock.inc +++ b/src/arch/armv7/bootblock.inc @@ -31,6 +31,7 @@ #include <system.h> +.section ".bl1", "a", %progbits _bl1: /* For now we have to live with a first stage boot loader * on ARM, which is 8KB in size and it is prepended to the @@ -38,6 +39,7 @@ _bl1: */ .skip (CONFIG_BL1_SIZE_KB * 1024) +.section ".start", "a", %progbits .globl _start _start: b reset .balignl 16,0xdeadbeef diff --git a/src/arch/armv7/bootblock.lds b/src/arch/armv7/bootblock.lds index 9482cef..f45e6c0 100644 --- a/src/arch/armv7/bootblock.lds +++ b/src/arch/armv7/bootblock.lds @@ -30,6 +30,8 @@ SECTIONS /* This section might be better named .setup */ .rom ROMLOC : { _rom = .; + *(.bl1); + *(.start); *(.text); *(.text.*); *(.rom.text);

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New patch to review for coreboot: 22d76b6 crossgcc: update to ACPICA 20130117
by Idwer Vollering 09 Feb '13

09 Feb '13

Idwer Vollering (vidwer(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2343 -gerrit commit 22d76b6ce42aeee1759f13c91b171f5756503af9 Author: Idwer Vollering <vidwer(a)gmail.com> Date: Sun Feb 10 00:33:39 2013 +0100 crossgcc: update to ACPICA 20130117 Update ACPICA to release 20130117. New version; new features (brokenness) to fix. See patches/acpica-unix-20130117_drop_unknown_cflags.patch Change-Id: I6c4346c22f2e97b7d289f56a9435a315f8fb54d4 Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- util/crossgcc/buildgcc | 6 +- ...0121114_32bit_optimization_fortify_source.patch | 11 --- .../acpica-unix-20121114_drop_unknown_cflags.patch | 29 -------- ...cpica-unix-20121114_no_remove_destination.patch | 12 ---- .../acpica-unix-20121114_override_make.patch | 80 --------------------- ...0130117_32bit_optimization_fortify_source.patch | 82 ++++++++++++++++++++++ .../acpica-unix-20130117_drop_unknown_cflags.patch | 30 ++++++++ ...cpica-unix-20130117_no_remove_destination.patch | 13 ++++ .../acpica-unix-20130117_override_make.patch | 82 ++++++++++++++++++++++ 9 files changed, 210 insertions(+), 135 deletions(-) diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index ad2bb65..02f7b9a 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -20,8 +20,8 @@ # Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA # -CROSSGCC_DATE="December 4th, 2012" -CROSSGCC_VERSION="1.20" +CROSSGCC_DATE="February 10th, 2013" +CROSSGCC_VERSION="1.21" # default settings TARGETDIR=`pwd`/xgcc @@ -37,7 +37,7 @@ GCC_VERSION=4.7.2 GCC_AUTOCONF_VERSION=2.64 BINUTILS_VERSION=2.23 GDB_VERSION=7.5 -IASL_VERSION=20121114 +IASL_VERSION=20130117 PYTHON_VERSION=2.7.3 EXPAT_VERSION=2.1.0 diff --git a/util/crossgcc/patches/acpica-unix-20121114_32bit_optimization_fortify_source.patch b/util/crossgcc/patches/acpica-unix-20121114_32bit_optimization_fortify_source.patch deleted file mode 100644 index abf80bd..0000000 --- a/util/crossgcc/patches/acpica-unix-20121114_32bit_optimization_fortify_source.patch +++ /dev/null @@ -1,11 +0,0 @@ -diff -ur acpica-unix-20121114/generate/unix/Makefile.config acpica-unix-20121114.patched/generate/unix/Makefile.config ---- acpica-unix-20121114/generate/unix/Makefile.config 2012-11-14 17:22:38.000000000 +0100 -+++ acpica-unix-20121114.patched/generate/unix/Makefile.config 2012-11-15 21:19:36.683902859 +0100 -@@ -104,6 +104,7 @@ - # automatically included in -Wall. - # - CFLAGS += \ -+ -O \ - $(BITSFLAG) \ - -D$(HOST) \ - -D_GNU_SOURCE \ diff --git a/util/crossgcc/patches/acpica-unix-20121114_drop_unknown_cflags.patch b/util/crossgcc/patches/acpica-unix-20121114_drop_unknown_cflags.patch deleted file mode 100644 index cfc392c..0000000 --- a/util/crossgcc/patches/acpica-unix-20121114_drop_unknown_cflags.patch +++ /dev/null @@ -1,29 +0,0 @@ -diff -ur acpica-unix-20121114.orig/generate/unix/Makefile.config acpica-unix-20121114/generate/unix/Makefile.config ---- acpica-unix-20121114.orig/generate/unix/Makefile.config 2012-11-14 17:22:38.000000000 +0100 -+++ acpica-unix-20121114/generate/unix/Makefile.config 2013-02-09 17:57:59.000000000 +0100 -@@ -115,7 +115,6 @@ - CWARNINGFLAGS = \ - -ansi \ - -Wall \ -- -Wbad-function-cast \ - -Wdeclaration-after-statement \ - -Werror \ - -Wformat=2 \ -@@ -134,16 +133,11 @@ - -Waddress \ - -Waggregate-return \ - -Wchar-subscripts \ -- -Wempty-body \ -- -Wlogical-op \ - -Wmissing-declarations \ - -Wmissing-field-initializers \ -- -Wmissing-parameter-type \ - -Wnested-externs \ -- -Wold-style-declaration \ - -Wold-style-definition \ -- -Wredundant-decls \ -- -Wtype-limits -+ -Wredundant-decls - - # - # Extra warning flags (possible future use) diff --git a/util/crossgcc/patches/acpica-unix-20121114_no_remove_destination.patch b/util/crossgcc/patches/acpica-unix-20121114_no_remove_destination.patch deleted file mode 100644 index 85a6f1b..0000000 --- a/util/crossgcc/patches/acpica-unix-20121114_no_remove_destination.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff -ur acpica-unix-20121114.orig/generate/unix/Makefile.config acpica-unix-20121114/generate/unix/Makefile.config ---- acpica-unix-20121114.orig/generate/unix/Makefile.config 2012-12-05 16:11:48.000000000 -0800 -+++ acpica-unix-20121114/generate/unix/Makefile.config 2012-12-05 16:12:31.000000000 -0800 -@@ -57,7 +57,7 @@ - # - COPYPROG = \ - @mkdir -p ../$(BINDIR); \ -- cp --remove-destination $(PROG) ../$(BINDIR); \ -+ cp $(PROG) ../$(BINDIR); \ - echo "Copied $(PROG) to $(FINAL_PROG)"; - - # diff --git a/util/crossgcc/patches/acpica-unix-20121114_override_make.patch b/util/crossgcc/patches/acpica-unix-20121114_override_make.patch deleted file mode 100644 index c4ce67f..0000000 --- a/util/crossgcc/patches/acpica-unix-20121114_override_make.patch +++ /dev/null @@ -1,80 +0,0 @@ -diff -Nurbs acpica-unix-20121114.orig/generate/unix/Makefile.common acpica-unix-20121114/generate/unix/Makefile.common ---- acpica-unix-20121114.orig/generate/unix/Makefile.common 2012-11-15 00:22:38.000000000 +0800 -+++ acpica-unix-20121114/generate/unix/Makefile.common 2013-02-09 12:11:55.994133871 +0800 -@@ -19,17 +19,17 @@ - if [ $(BITS) -eq 32 ]; then \ - echo "Forced 32-bit generation of $@"; \ - mkdir -p obj32; \ -- make BITS=32; \ -+ $(MAKE) BITS=32; \ - echo "32-bit version of $@:"; \ - ls -al ../bin32/$@; \ - elif [ $(findstring 64,$(HARDWARE_NAME)) ]; then \ - mkdir -p obj64; \ -- make BITS=64; \ -+ $(MAKE) BITS=64; \ - echo "64-bit version of $@:"; \ - ls -al ../bin64/$@; \ - else \ - mkdir -p obj32; \ -- make BITS=32; \ -+ $(MAKE) BITS=32; \ - echo "32-bit version of $@:"; \ - ls -al ../bin32/$@; \ - fi; -@@ -47,7 +47,7 @@ - (cd $(BUILD_DIRECTORY_PATH)/$$toolname; \ - pwd; \ - mkdir -p obj32; \ -- make BITS=32; \ -+ $(MAKE) BITS=32; \ - echo "32-bit version of $$toolname:"; \ - ls -al obj32/$$toolname \ - ); \ -@@ -61,7 +61,7 @@ - (cd $(BUILD_DIRECTORY_PATH)/$$toolname; \ - pwd; \ - mkdir -p obj64; \ -- make BITS=64; \ -+ $(MAKE) BITS=64; \ - echo "64-bit version of $$toolname:"; \ - ls -al obj64/$$toolname \ - ); \ -@@ -73,11 +73,11 @@ - echo "Removing $$toolname"; \ - pwd; \ - if [ -d "obj32" ] ; then \ -- make BITS=32 clean; \ -+ $(MAKE) BITS=32 clean; \ - rmdir obj32; \ - fi; \ - if [ -d "obj64" ] ; then \ -- make BITS=64 clean; \ -+ $(MAKE) BITS=64 clean; \ - rmdir obj64; \ - fi; \ - echo ""; \ -@@ -92,10 +92,10 @@ - (cd $(BUILD_DIRECTORY_PATH)/$$toolname; \ - pwd; \ - if [ $(findstring 64,$(HARDWARE_NAME)) ]; then \ -- make BITS=64 PROG=$$toolname install; \ -+ $(MAKE) BITS=64 PROG=$$toolname install; \ - echo "Installed 64-bit version of $$toolname"; \ - else \ -- make BITS=32 PROG=$$toolname install; \ -+ $(MAKE) BITS=32 PROG=$$toolname install; \ - echo "Installed 32-bit version of $$toolname"; \ - fi; \ - echo ""; \ -diff -Nurbs acpica-unix-20121114.orig/generate/unix/Makefile.config acpica-unix-20121114/generate/unix/Makefile.config ---- acpica-unix-20121114.orig/generate/unix/Makefile.config 2012-11-15 00:22:38.000000000 +0800 -+++ acpica-unix-20121114/generate/unix/Makefile.config 2013-02-09 12:11:12.978134325 +0800 -@@ -31,6 +31,7 @@ - PROGS = acpibin acpiexec acpihelp acpinames acpisrc acpixtract iasl - HOST = _CYGWIN - CC = gcc -+MAKE = make - - # - # Common defines diff --git a/util/crossgcc/patches/acpica-unix-20130117_32bit_optimization_fortify_source.patch b/util/crossgcc/patches/acpica-unix-20130117_32bit_optimization_fortify_source.patch new file mode 100644 index 0000000..de94962 --- /dev/null +++ b/util/crossgcc/patches/acpica-unix-20130117_32bit_optimization_fortify_source.patch @@ -0,0 +1,82 @@ +diff -ur acpica-unix-20130117.orig/generate/unix/Makefile.common acpica-unix-20130117/generate/unix/Makefile.common +--- acpica-unix-20130117.orig/generate/unix/Makefile.common 2013-01-17 20:47:17.000000000 +0100 ++++ acpica-unix-20130117/generate/unix/Makefile.common 2013-02-10 00:23:13.000000000 +0100 +@@ -19,17 +19,17 @@ + if [ $(BITS) -eq 32 ]; then \ + echo "Forced 32-bit generation of $@"; \ + mkdir -p obj32; \ +- make BITS=32; \ ++ $(MAKE) BITS=32; \ + echo "32-bit version of $@:"; \ + ls -al ../bin32/$@; \ + elif [ $(findstring 64,$(HARDWARE_NAME)) ]; then \ + mkdir -p obj64; \ +- make BITS=64; \ ++ $(MAKE) BITS=64; \ + echo "64-bit version of $@:"; \ + ls -al ../bin64/$@; \ + else \ + mkdir -p obj32; \ +- make BITS=32; \ ++ $(MAKE) BITS=32; \ + echo "32-bit version of $@:"; \ + ls -al ../bin32/$@; \ + fi; +@@ -47,7 +47,7 @@ + (cd $(BUILD_DIRECTORY_PATH)/$$toolname; \ + pwd; \ + mkdir -p obj32; \ +- make BITS=32; \ ++ $(MAKE) BITS=32; \ + echo "32-bit version of $$toolname:"; \ + ls -al obj32/$$toolname \ + ); \ +@@ -61,7 +61,7 @@ + (cd $(BUILD_DIRECTORY_PATH)/$$toolname; \ + pwd; \ + mkdir -p obj64; \ +- make BITS=64; \ ++ $(MAKE) BITS=64; \ + echo "64-bit version of $$toolname:"; \ + ls -al obj64/$$toolname \ + ); \ +@@ -73,11 +73,11 @@ + echo "Removing $$toolname"; \ + pwd; \ + if [ -d "obj32" ] ; then \ +- make BITS=32 clean; \ ++ $(MAKE) BITS=32 clean; \ + rmdir obj32; \ + fi; \ + if [ -d "obj64" ] ; then \ +- make BITS=64 clean; \ ++ $(MAKE) BITS=64 clean; \ + rmdir obj64; \ + fi; \ + echo ""; \ +@@ -92,10 +92,10 @@ + (cd $(BUILD_DIRECTORY_PATH)/$$toolname; \ + pwd; \ + if [ $(findstring 64,$(HARDWARE_NAME)) ]; then \ +- make BITS=64 PROG=$$toolname install; \ ++ $(MAKE) BITS=64 PROG=$$toolname install; \ + echo "Installed 64-bit version of $$toolname"; \ + else \ +- make BITS=32 PROG=$$toolname install; \ ++ $(MAKE) BITS=32 PROG=$$toolname install; \ + echo "Installed 32-bit version of $$toolname"; \ + fi; \ + echo ""; \ +Only in acpica-unix-20130117/generate/unix: Makefile.common.orig +diff -ur acpica-unix-20130117.orig/generate/unix/Makefile.config acpica-unix-20130117/generate/unix/Makefile.config +--- acpica-unix-20130117.orig/generate/unix/Makefile.config 2013-01-17 20:47:17.000000000 +0100 ++++ acpica-unix-20130117/generate/unix/Makefile.config 2013-02-10 00:23:13.000000000 +0100 +@@ -31,6 +31,7 @@ + PROGS = acpibin acpiexec acpihelp acpinames acpisrc acpixtract iasl + HOST = _CYGWIN + CC = gcc ++MAKE = make + + # + # Common defines +Only in acpica-unix-20130117/generate/unix: Makefile.config.orig diff --git a/util/crossgcc/patches/acpica-unix-20130117_drop_unknown_cflags.patch b/util/crossgcc/patches/acpica-unix-20130117_drop_unknown_cflags.patch new file mode 100644 index 0000000..80d4795 --- /dev/null +++ b/util/crossgcc/patches/acpica-unix-20130117_drop_unknown_cflags.patch @@ -0,0 +1,30 @@ +diff -ur acpica-unix-20130117.orig/generate/unix/Makefile.config acpica-unix-20130117/generate/unix/Makefile.config +--- acpica-unix-20130117.orig/generate/unix/Makefile.config 2013-01-17 20:47:17.000000000 +0100 ++++ acpica-unix-20130117/generate/unix/Makefile.config 2013-02-10 00:27:38.000000000 +0100 +@@ -115,7 +115,6 @@ + CWARNINGFLAGS = \ + -ansi \ + -Wall \ +- -Wbad-function-cast \ + -Wdeclaration-after-statement \ + -Werror \ + -Wformat=2 \ +@@ -134,16 +133,11 @@ + -Waddress \ + -Waggregate-return \ + -Wchar-subscripts \ +- -Wempty-body \ +- -Wlogical-op \ + -Wmissing-declarations \ + -Wmissing-field-initializers \ +- -Wmissing-parameter-type \ + -Wnested-externs \ +- -Wold-style-declaration \ + -Wold-style-definition \ +- -Wredundant-decls \ +- -Wtype-limits ++ -Wredundant-decls + + # + # Extra warning flags (possible future use) +Only in acpica-unix-20130117/generate/unix: Makefile.config.orig diff --git a/util/crossgcc/patches/acpica-unix-20130117_no_remove_destination.patch b/util/crossgcc/patches/acpica-unix-20130117_no_remove_destination.patch new file mode 100644 index 0000000..32f5c31 --- /dev/null +++ b/util/crossgcc/patches/acpica-unix-20130117_no_remove_destination.patch @@ -0,0 +1,13 @@ +diff -ur acpica-unix-20130117.orig/generate/unix/Makefile.config acpica-unix-20130117/generate/unix/Makefile.config +--- acpica-unix-20130117.orig/generate/unix/Makefile.config 2013-01-17 20:47:17.000000000 +0100 ++++ acpica-unix-20130117/generate/unix/Makefile.config 2013-02-10 00:24:41.000000000 +0100 +@@ -57,7 +57,7 @@ + # + COPYPROG = \ + @mkdir -p ../$(BINDIR); \ +- cp --remove-destination $(PROG) ../$(BINDIR); \ ++ cp $(PROG) ../$(BINDIR); \ + echo "Copied $(PROG) to $(FINAL_PROG)"; + + # +Only in acpica-unix-20130117/generate/unix: Makefile.config.orig diff --git a/util/crossgcc/patches/acpica-unix-20130117_override_make.patch b/util/crossgcc/patches/acpica-unix-20130117_override_make.patch new file mode 100644 index 0000000..24efdbc --- /dev/null +++ b/util/crossgcc/patches/acpica-unix-20130117_override_make.patch @@ -0,0 +1,82 @@ +diff -ur acpica-unix-20130117.orig/generate/unix/Makefile.common acpica-unix-20130117/generate/unix/Makefile.common +--- acpica-unix-20130117.orig/generate/unix/Makefile.common 2013-01-17 20:47:17.000000000 +0100 ++++ acpica-unix-20130117/generate/unix/Makefile.common 2013-02-10 00:25:08.000000000 +0100 +@@ -19,17 +19,17 @@ + if [ $(BITS) -eq 32 ]; then \ + echo "Forced 32-bit generation of $@"; \ + mkdir -p obj32; \ +- make BITS=32; \ ++ $(MAKE) BITS=32; \ + echo "32-bit version of $@:"; \ + ls -al ../bin32/$@; \ + elif [ $(findstring 64,$(HARDWARE_NAME)) ]; then \ + mkdir -p obj64; \ +- make BITS=64; \ ++ $(MAKE) BITS=64; \ + echo "64-bit version of $@:"; \ + ls -al ../bin64/$@; \ + else \ + mkdir -p obj32; \ +- make BITS=32; \ ++ $(MAKE) BITS=32; \ + echo "32-bit version of $@:"; \ + ls -al ../bin32/$@; \ + fi; +@@ -47,7 +47,7 @@ + (cd $(BUILD_DIRECTORY_PATH)/$$toolname; \ + pwd; \ + mkdir -p obj32; \ +- make BITS=32; \ ++ $(MAKE) BITS=32; \ + echo "32-bit version of $$toolname:"; \ + ls -al obj32/$$toolname \ + ); \ +@@ -61,7 +61,7 @@ + (cd $(BUILD_DIRECTORY_PATH)/$$toolname; \ + pwd; \ + mkdir -p obj64; \ +- make BITS=64; \ ++ $(MAKE) BITS=64; \ + echo "64-bit version of $$toolname:"; \ + ls -al obj64/$$toolname \ + ); \ +@@ -73,11 +73,11 @@ + echo "Removing $$toolname"; \ + pwd; \ + if [ -d "obj32" ] ; then \ +- make BITS=32 clean; \ ++ $(MAKE) BITS=32 clean; \ + rmdir obj32; \ + fi; \ + if [ -d "obj64" ] ; then \ +- make BITS=64 clean; \ ++ $(MAKE) BITS=64 clean; \ + rmdir obj64; \ + fi; \ + echo ""; \ +@@ -92,10 +92,10 @@ + (cd $(BUILD_DIRECTORY_PATH)/$$toolname; \ + pwd; \ + if [ $(findstring 64,$(HARDWARE_NAME)) ]; then \ +- make BITS=64 PROG=$$toolname install; \ ++ $(MAKE) BITS=64 PROG=$$toolname install; \ + echo "Installed 64-bit version of $$toolname"; \ + else \ +- make BITS=32 PROG=$$toolname install; \ ++ $(MAKE) BITS=32 PROG=$$toolname install; \ + echo "Installed 32-bit version of $$toolname"; \ + fi; \ + echo ""; \ +Only in acpica-unix-20130117/generate/unix: Makefile.common.orig +diff -ur acpica-unix-20130117.orig/generate/unix/Makefile.config acpica-unix-20130117/generate/unix/Makefile.config +--- acpica-unix-20130117.orig/generate/unix/Makefile.config 2013-01-17 20:47:17.000000000 +0100 ++++ acpica-unix-20130117/generate/unix/Makefile.config 2013-02-10 00:25:08.000000000 +0100 +@@ -31,6 +31,7 @@ + PROGS = acpibin acpiexec acpihelp acpinames acpisrc acpixtract iasl + HOST = _CYGWIN + CC = gcc ++MAKE = make + + # + # Common defines +Only in acpica-unix-20130117/generate/unix: Makefile.config.orig

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coreboot February 2013