coreboot February 2013

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Patch merged into coreboot/master: 3faa2c7 google/snow: enable GPIO entries and CHROMEOS in building
by gerrit＠coreboot.org 25 Feb '13

25 Feb '13

the following patch was just integrated into master: commit 3faa2c77ed9103839002d1092424676790f07017 Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Wed Feb 20 15:46:46 2013 -0800 google/snow: enable GPIO entries and CHROMEOS in building These were not separable or it would have been two CLs. Enable CHROMEOS configure option on snow. Write gpio support code for the mainboard. Right now the GPIO just returns hard-wired values for "virtual" GPIOs. Add a chromeos.c file for snow, needed to build. This is tested and creates gpio table entries that our hardware can use. Lots still missing but we can now start to fill in the blanks, since we have enabled CHROMEOS for this board. We are getting further into the process of actually booting a real kernel. Change-Id: I5fdc68b0b76f9b2172271e991e11bef16f5adb27 Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-on: http://review.coreboot.org/2467 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Sat Feb 23 04:51:30 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Mon Feb 25 18:49:59 2013, giving +2 See http://review.coreboot.org/2467 for details. -gerrit

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Patch merged into coreboot/master: 5f20b35 QEMU x86: northbridge.c: Name enabling device function to `northbridge_enable`
by gerrit＠coreboot.org 25 Feb '13

25 Feb '13

the following patch was just integrated into master: commit 5f20b3522212f58b5e6858ff7028fb5a8e0879f5 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Sun Feb 24 14:27:03 2013 +0100 QEMU x86: northbridge.c: Name enabling device function to `northbridge_enable` Similar to the discussion on the coreboot list [1] Am Freitag, den 22.02.2013, 02:17 +0100 schrieb Peter Stuge: […] > Function names should try to be descriptive. "enable_dev" is not very > descriptive. I like "mainboard_enable" because it makes output such > as > > printk("%s: foo", __func__); > > useful. rename the function for the northbridge to `northbridge_enable`. [1] http://www.coreboot.org/pipermail/coreboot/2013-February/074549.html Change-Id: I262311ec511e394550330214621b8c37780c1d4e Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2496 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Sun Feb 24 14:40:22 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Mon Feb 25 18:49:15 2013, giving +2 See http://review.coreboot.org/2496 for details. -gerrit

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Patch merged into coreboot/master: 30901ba Persimmon: Fix warning, enable warnings as errors
by gerrit＠coreboot.org 25 Feb '13

25 Feb '13

the following patch was just integrated into master: commit 30901baabcf1e26f3ba4cd32f5bd90eb1c6ed35c Author: Martin Roth <martin.roth(a)se-eng.com> Date: Sat Feb 23 15:32:11 2013 -0700 Persimmon: Fix warning, enable warnings as errors - Fix redefinition warning for SB_GPIO_REG50 introduced in commit fa8702cf - http://review.coreboot.org/#/c/2446/ Persimmon: adapt PCIe reset code copied from Inagua to actually match Persimmon The warning being fixed is: SB800.h:1491, GNU Compiler 4 (gcc), Priority: Normal "SB_GPIO_REG50" redefined [enabled by default] - Enable warnings as errors so no more warnings will be accidentally committed. Change-Id: Ib443b2bd2067f0b7d5f93f79170899a0f8f61060 Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/2494 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Sun Feb 24 20:14:05 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Mon Feb 25 18:48:21 2013, giving +2 See http://review.coreboot.org/2494 for details. -gerrit

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Patch merged into coreboot/master: 528640d mainboard.c: Name enable_dev function uniformly `mainboard_enable`
by gerrit＠coreboot.org 25 Feb '13

25 Feb '13

the following patch was just integrated into master: commit 528640d141193b4aaeb6b8956d4fbc7381df9eb3 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Sat Feb 23 21:31:23 2013 +0100 mainboard.c: Name enable_dev function uniformly `mainboard_enable` To reduce the differences between these file name the enabling device function in the directory `src/mainboard` uniformly `mainboard_enable` [1]. Thanks to the awesome help of gnomon and BlastHardcheese in the IRC channel #sed on <irc.freenode.net>. gnomon came up with the following command to do the actual work. $ cd src/mainboard $ for f in */*/mainboard.c ; \ > do src="$(awk '/\.enable_dev = /{v=$NF; sub(/,$/,"",v); print v}' "$f")" ; \ > [[ -z $src ]] && continue ; \ > printf '%s\n' "g/${src}/s/${src}$[,(]$/mainboard_enable\1/p" w | ed -s "$f" ; \ > done `src/mainboard/digitallogic/msm586seg/mainboard.c` and `src/mainboard/technologic/ts5300/mainboard.c` had to be adapted manually as no comma was used separating the struct members. And with the following statement, gnomon is even more likable! My pleasure entirely. Good luck with coreboot; I'm a big fan of the project. [1] http://www.coreboot.org/pipermail/coreboot/2013-February/074548.html Change-Id: Ife9cd0c2d9cc1ed14afc6d40063450553f06a6c6 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2493 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Sun Feb 24 14:31:15 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Mon Feb 25 18:47:00 2013, giving +2 See http://review.coreboot.org/2493 for details. -gerrit

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Patch merged into coreboot/master: 1fc7416 Technologic TS5300: mainboard.c: Move { to next line
by gerrit＠coreboot.org 25 Feb '13

25 Feb '13

the following patch was just integrated into master: commit 1fc7416545bde75d9cc401638f28ebfb751b663e Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Sat Feb 23 21:11:15 2013 +0100 Technologic TS5300: mainboard.c: Move { to next line This is coreboot’s coding style. Change-Id: I7441f2c1927a49a3b7171112b7798dae6b56cfb5 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2492 Reviewed-by: Martin Roth <martin.roth(a)se-eng.com> Tested-by: build bot (Jenkins) Reviewed-by: Bernhard Urban <lewurm(a)gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Sat Feb 23 22:15:28 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Mon Feb 25 18:46:31 2013, giving +2 See http://review.coreboot.org/2492 for details. -gerrit

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Patch merged into coreboot/master: 1cd6160 ARMv7: Simplify div64
by gerrit＠coreboot.org 25 Feb '13

25 Feb '13

the following patch was just integrated into master: commit 1cd616082100f47dc2d6d73669c6aa2e5eb039ad Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Feb 14 15:53:18 2013 -0800 ARMv7: Simplify div64 We don't need the overly complex optimized version, since we're only doing this in very few non-critical places. Also, add the div* files to the bootblock, they're needed if we do printk. Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Change-Id: I83bd766d4b03b488326ade1c13b7c364a7119e7b Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-on: http://review.coreboot.org/2508 Tested-by: build bot (Jenkins) Build-Tested: build bot (Jenkins) at Mon Feb 25 16:54:44 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Mon Feb 25 17:01:27 2013, giving +2 See http://review.coreboot.org/2508 for details. -gerrit

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New patch to review for coreboot: 7229d0d ARMv7: Simplify div64
by Ronald G. Minnich 25 Feb '13

25 Feb '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2508 -gerrit commit 7229d0db3b19827562aab5fe003a46860b1bb1e1 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Feb 14 15:53:18 2013 -0800 ARMv7: Simplify div64 We don't need the overly complex optimized version, since we're only doing this in very few non-critical places. Also, add the div* files to the bootblock, they're needed if we do printk. Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Change-Id: I83bd766d4b03b488326ade1c13b7c364a7119e7b Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/arch/armv7/include/div64.h | 186 +--------------------------------------- src/arch/armv7/lib/Makefile.inc | 2 + src/arch/armv7/lib/div64.S | 9 +- 3 files changed, 7 insertions(+), 190 deletions(-) diff --git a/src/arch/armv7/include/div64.h b/src/arch/armv7/include/div64.h index 5baed2b..9c3c29a 100644 --- a/src/arch/armv7/include/div64.h +++ b/src/arch/armv7/include/div64.h @@ -3,12 +3,7 @@ #ifndef __ASM_ARM_DIV64 #define __ASM_ARM_DIV64 -//#include <asm/system.h> -//#include <linux/types.h> -// FIXME - #define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t" -#define __LINUX_ARM_ARCH__ 7 /* * The semantics of do_div() are: @@ -34,7 +29,7 @@ #define __xh "r1" #endif -#define __do_div_asm(n, base) \ +#define do_div(n, base) \ ({ \ register unsigned int __base asm("r4") = base; \ register unsigned long long __n asm("r0") = n; \ @@ -51,183 +46,4 @@ n = __res; \ __rem; \ }) - -#if __GNUC__ < 4 - -/* - * gcc versions earlier than 4.0 are simply too problematic for the - * optimized implementation below. First there is gcc PR 15089 that - * tend to trig on more complex constructs, spurious .global __udivsi3 - * are inserted even if none of those symbols are referenced in the - * generated code, and those gcc versions are not able to do constant - * propagation on long long values anyway. - */ -#define do_div(n, base) __do_div_asm(n, base) - -#elif __GNUC__ >= 4 - -//#include <asm/bug.h> - -/* - * If the divisor happens to be constant, we determine the appropriate - * inverse at compile time to turn the division into a few inline - * multiplications instead which is much faster. And yet only if compiling - * for ARMv4 or higher (we need umull/umlal) and if the gcc version is - * sufficiently recent to perform proper long long constant propagation. - * (It is unfortunate that gcc doesn't perform all this internally.) - */ -#define do_div(n, base) \ -({ \ - unsigned int __r, __b = (base); \ - if (!__builtin_constant_p(__b) || __b == 0 || \ - (__LINUX_ARM_ARCH__ < 4 && (__b & (__b - 1)) != 0)) { \ - /* non-constant divisor (or zero): slow path */ \ - __r = __do_div_asm(n, __b); \ - } else if ((__b & (__b - 1)) == 0) { \ - /* Trivial: __b is constant and a power of 2 */ \ - /* gcc does the right thing with this code. */ \ - __r = n; \ - __r &= (__b - 1); \ - n /= __b; \ - } else { \ - /* Multiply by inverse of __b: n/b = n*(p/b)/p */ \ - /* We rely on the fact that most of this code gets */ \ - /* optimized away at compile time due to constant */ \ - /* propagation and only a couple inline assembly */ \ - /* instructions should remain. Better avoid any */ \ - /* code construct that might prevent that. */ \ - unsigned long long __res, __x, __t, __m, __n = n; \ - unsigned int __c, __p, __z = 0; \ - /* preserve low part of n for reminder computation */ \ - __r = __n; \ - /* determine number of bits to represent __b */ \ - __p = 1 << __div64_fls(__b); \ - /* compute __m = ((__p << 64) + __b - 1) / __b */ \ - __m = (~0ULL / __b) * __p; \ - __m += (((~0ULL % __b + 1) * __p) + __b - 1) / __b; \ - /* compute __res = __m*(~0ULL/__b*__b-1)/(__p << 64) */ \ - __x = ~0ULL / __b * __b - 1; \ - __res = (__m & 0xffffffff) * (__x & 0xffffffff); \ - __res >>= 32; \ - __res += (__m & 0xffffffff) * (__x >> 32); \ - __t = __res; \ - __res += (__x & 0xffffffff) * (__m >> 32); \ - __t = (__res < __t) ? (1ULL << 32) : 0; \ - __res = (__res >> 32) + __t; \ - __res += (__m >> 32) * (__x >> 32); \ - __res /= __p; \ - /* Now sanitize and optimize what we've got. */ \ - if (~0ULL % (__b / (__b & -__b)) == 0) { \ - /* those cases can be simplified with: */ \ - __n /= (__b & -__b); \ - __m = ~0ULL / (__b / (__b & -__b)); \ - __p = 1; \ - __c = 1; \ - } else if (__res != __x / __b) { \ - /* We can't get away without a correction */ \ - /* to compensate for bit truncation errors. */ \ - /* To avoid it we'd need an additional bit */ \ - /* to represent __m which would overflow it. */ \ - /* Instead we do m=p/b and n/b=(n*m+m)/p. */ \ - __c = 1; \ - /* Compute __m = (__p << 64) / __b */ \ - __m = (~0ULL / __b) * __p; \ - __m += ((~0ULL % __b + 1) * __p) / __b; \ - } else { \ - /* Reduce __m/__p, and try to clear bit 31 */ \ - /* of __m when possible otherwise that'll */ \ - /* need extra overflow handling later. */ \ - unsigned int __bits = -(__m & -__m); \ - __bits |= __m >> 32; \ - __bits = (~__bits) << 1; \ - /* If __bits == 0 then setting bit 31 is */ \ - /* unavoidable. Simply apply the maximum */ \ - /* possible reduction in that case. */ \ - /* Otherwise the MSB of __bits indicates the */ \ - /* best reduction we should apply. */ \ - if (!__bits) { \ - __p /= (__m & -__m); \ - __m /= (__m & -__m); \ - } else { \ - __p >>= __div64_fls(__bits); \ - __m >>= __div64_fls(__bits); \ - } \ - /* No correction needed. */ \ - __c = 0; \ - } \ - /* Now we have a combination of 2 conditions: */ \ - /* 1) whether or not we need a correction (__c), and */ \ - /* 2) whether or not there might be an overflow in */ \ - /* the cross product (__m & ((1<<63) | (1<<31))) */ \ - /* Select the best insn combination to perform the */ \ - /* actual __m * __n / (__p << 64) operation. */ \ - if (!__c) { \ - asm ( "umull %Q0, %R0, %1, %Q2\n\t" \ - "mov %Q0, #0" \ - : "=&r" (__res) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } else if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ - __res = __m; \ - asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t" \ - "mov %Q0, #0" \ - : "+&r" (__res) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } else { \ - asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \ - "cmn %Q0, %Q1\n\t" \ - "adcs %R0, %R0, %R1\n\t" \ - "adc %Q0, %3, #0" \ - : "=&r" (__res) \ - : "r" (__m), "r" (__n), "r" (__z) \ - : "cc" ); \ - } \ - if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ - asm ( "umlal %R0, %Q0, %R1, %Q2\n\t" \ - "umlal %R0, %Q0, %Q1, %R2\n\t" \ - "mov %R0, #0\n\t" \ - "umlal %Q0, %R0, %R1, %R2" \ - : "+&r" (__res) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } else { \ - asm ( "umlal %R0, %Q0, %R2, %Q3\n\t" \ - "umlal %R0, %1, %Q2, %R3\n\t" \ - "mov %R0, #0\n\t" \ - "adds %Q0, %1, %Q0\n\t" \ - "adc %R0, %R0, #0\n\t" \ - "umlal %Q0, %R0, %R2, %R3" \ - : "+&r" (__res), "+&r" (__z) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } \ - __res /= __p; \ - /* The reminder can be computed with 32-bit regs */ \ - /* only, and gcc is good at that. */ \ - { \ - unsigned int __res0 = __res; \ - unsigned int __b0 = __b; \ - __r -= __res0 * __b0; \ - } \ - /* BUG_ON(__r >= __b || __res * __b + __r != n); */ \ - n = __res; \ - } \ - __r; \ -}) - -/* our own fls implementation to make sure constant propagation is fine */ -#define __div64_fls(bits) \ -({ \ - unsigned int __left = (bits), __nr = 0; \ - if (__left & 0xffff0000) __nr += 16, __left >>= 16; \ - if (__left & 0x0000ff00) __nr += 8, __left >>= 8; \ - if (__left & 0x000000f0) __nr += 4, __left >>= 4; \ - if (__left & 0x0000000c) __nr += 2, __left >>= 2; \ - if (__left & 0x00000002) __nr += 1; \ - __nr; \ -}) - -#endif - #endif diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc index 388864a..0e81c99 100644 --- a/src/arch/armv7/lib/Makefile.inc +++ b/src/arch/armv7/lib/Makefile.inc @@ -2,6 +2,8 @@ bootblock-y += syslib.c bootblock-$(CONFIG_EARLY_CONSOLE) += early_console.c bootblock-y += cache_v7.c bootblock-y += cache-cp15.c +bootblock-y += div0.c +bootblock-y += div64.S romstage-y += cache_v7.c romstage-y += cache-cp15.c diff --git a/src/arch/armv7/lib/div64.S b/src/arch/armv7/lib/div64.S index 44edf48..41a0949 100644 --- a/src/arch/armv7/lib/div64.S +++ b/src/arch/armv7/lib/div64.S @@ -13,8 +13,7 @@ */ // FIXME -//#include <linux/linkage.h> -#define __LINUX_ARM_ARCH__ 7 +#define __ARM_ARCH__ 7 #ifdef __ARMEB__ #define xh r0 @@ -65,7 +64,7 @@ __do_div64: @ The aligned divisor is stored in yl preserving the original. @ The bit position is stored in ip. -#if __LINUX_ARM_ARCH__ >= 5 +#if __ARM_ARCH__ >= 5 clz yl, r4 clz ip, xh @@ -125,7 +124,7 @@ __do_div64: @ We still have remainer bits in the low part. Bring them up. -#if __LINUX_ARM_ARCH__ >= 5 +#if __ARM_ARCH__ >= 5 clz xh, xl @ we know xh is zero here so... add xh, xh, #1 @@ -152,7 +151,7 @@ __do_div64: 8: @ Division by a power of 2: determine what that divisor order is @ then simply shift values around -#if __LINUX_ARM_ARCH__ >= 5 +#if __ARM_ARCH__ >= 5 clz ip, r4 rsb ip, ip, #31

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Trac reminder: list of new ticket(s)
by coreboot tracker 25 Feb '13

25 Feb '13

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QA: Notification of newly introduced and fixed warnings
by Paul Menzel 25 Feb '13

25 Feb '13

Dear coreboot folks, seeing the following patch commit 527ceccbadc501bcdeb26b2b62e93f05dc8fcedb Author: Martin Roth <martin.roth(a)se-eng.com> Date: Sat Feb 23 15:32:11 2013 -0700 Persimmon: Fix warning, enable warnings as errors http://review.coreboot.org/2494 it would be awesome if Gerrit could check Jenkins build log or Jenkins could notify Gerrit about newly introduced warnings by comparing the build log of each board. Reporting fixed warnings would also be nice. Currently this is only possible if a board is warning free and -Werror is passed to the compiler by setting the Kconfig option WARNINGS_ARE_ERRORS to true so the the build aborts on new warnings. Does somebody have experience with this? It would certainly be nice and should be doable automatically. Thanks, Paul

2 3

New patch to review for coreboot: 8686d6a Supermicro H8SCM & H8QGI: Fix printk warnings
by Martin Roth 24 Feb '13

24 Feb '13

Martin Roth (martin.roth(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2502 -gerrit commit 8686d6a5d626ffbfe218c34f6e6f43c07f9ae115 Author: Martin Roth <martin.roth(a)se-eng.com> Date: Sun Feb 24 15:09:11 2013 -0700 Supermicro H8SCM & H8QGI: Fix printk warnings Changes: - Fix printk warnings for these two platforms by getting rid of the l length specifier and casting to unsigned int. This gets rid of a bunch of warnings like this one: agesawrapper.c:279, GNU Compiler 4 (gcc), Priority: Normal format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'UINT32' [-Wformat] Notes: - This is the same change that was done for Tyan s8226 in change: ddff32eb - http://review.coreboot.org/#/c/2451/ Tyan S8226: Fix printk warnings - I have not tested this change on either of these platforms, I have just compiled it. Change-Id: I46b4c13fde7473cd2a084c7c7cb5c893f1731b02 Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> --- src/mainboard/supermicro/h8qgi/agesawrapper.c | 220 +++++++++++++------------- src/mainboard/supermicro/h8scm/agesawrapper.c | 220 +++++++++++++------------- 2 files changed, 226 insertions(+), 214 deletions(-) diff --git a/src/mainboard/supermicro/h8qgi/agesawrapper.c b/src/mainboard/supermicro/h8qgi/agesawrapper.c index 517e136..8186c97 100644 --- a/src/mainboard/supermicro/h8qgi/agesawrapper.c +++ b/src/mainboard/supermicro/h8qgi/agesawrapper.c @@ -276,7 +276,7 @@ UINT32 agesawrapper_amdinitearly(VOID) GetCpuServicesOfCurrentCore((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &AmdParamStruct.StdHeader); FamilySpecificServices->GetTscRate(FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader); - printk(BIOS_DEBUG, "BSP Frequency: %luMHz\n", TscRateInMhz); + printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz); AmdReleaseStruct(&AmdParamStruct); return (UINT32)status; @@ -329,7 +329,7 @@ UINT32 agesawrapper_amdinitpost(VOID) GetCpuServicesOfCurrentCore ((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &AmdParamStruct.StdHeader); FamilySpecificServices->GetTscRate (FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader); - printk(BIOS_DEBUG, "BSP Frequency: %luMHz\n", TscRateInMhz); + printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz); return (UINT32)status; } @@ -537,47 +537,47 @@ static void agesa_alert(EVENT_PARAMS *event) { switch (event->EventInfo) { case MEM_ALERT_USER_TMG_MODE_OVERRULED: - printk(BIOS_DEBUG, "Socket %lx Dct %lx Channel %lx " + printk(BIOS_DEBUG, "Socket %x Dct %x Channel %x " "TIMING_MODE_SPECIFIC is requested but can not be applied to current configurations.\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case MEM_ALERT_ORG_MISMATCH_DIMM: - printk(BIOS_DEBUG, "Socket %lx Dct %lx Channel %lx " + printk(BIOS_DEBUG, "Socket %x Dct %x Channel %x " "DIMM organization miss-match\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case MEM_ALERT_BK_INT_DIS: - printk(BIOS_DEBUG, "Socket %lx Dct %lx Channel %lx " + printk(BIOS_DEBUG, "Socket %x Dct %x Channel %x " "Bank interleaving disable for internal issue\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case CPU_EVENT_BIST_ERROR: - printk(BIOS_DEBUG, "BIST error: %lx reported on Socket %lx Core %lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "BIST error: %x reported on Socket %x Core %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case HT_EVENT_HW_SYNCFLOOD: - printk(BIOS_DEBUG, "HT_EVENT_DATA_HW_SYNCFLOOD error on Socket %lx Link %lx\n", - event->DataParam1, - event->DataParam2); + printk(BIOS_DEBUG, "HT_EVENT_DATA_HW_SYNCFLOOD error on Socket %x Link %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2); break; case HT_EVENT_HW_HTCRC: - printk(BIOS_DEBUG, "HT_EVENT_HW_HTCRC error on Socket %lx Link %lx Lanemask:%lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "HT_EVENT_HW_HTCRC error on Socket %x Link %x Lanemask:%x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; default: @@ -602,10 +602,10 @@ static void agesa_warning(EVENT_PARAMS *event) switch (event->EventInfo >> 24) { case 0x04: - printk(BIOS_DEBUG, "Memory: Socket %lx Dct %lx Channel%lx ", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "Memory: Socket %x Dct %x Channel%x ", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case 0x08: @@ -702,24 +702,24 @@ static void agesa_warning(EVENT_PARAMS *event) } else if ((event->EventInfo & 0x000000FF) == 0x03) { printk(BIOS_DEBUG, "AGESA_CACHE_REGIONS_ACROSS_4GB\n"); } - printk(BIOS_DEBUG, "cache region index:%lx, start:%lx size:%lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "cache region index:%x, start:%x size:%x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case CPU_WARNING_ADJUSTED_LEVELING_MODE: printk(BIOS_DEBUG, "CPU_WARNING_ADJUSTED_LEVELING_MODE " - "requested: %lx, actual level:%lx\n", - event->DataParam1, - event->DataParam2); + "requested: %x, actual level:%x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2); break; case CPU_EVENT_PM_PSTATE_OVERCURRENT: printk(BIOS_DEBUG, "CPU_EVENT_PM_PSTATE_OVERCURRENT " - "Socket: %lx, Pstate:%lx\n", - event->DataParam1, - event->DataParam2); + "Socket: %x, Pstate:%x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2); break; case CPU_WARNING_NONOPTIMAL_HT_ASSIST_CFG: @@ -735,34 +735,34 @@ static void agesa_warning(EVENT_PARAMS *event) */ case HT_EVENT_OPT_REQUIRED_CAP_RETRY: - printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_RETRY, Socket %lx Link %lx Depth %lx\n", + printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_RETRY, Socket %x Link %x Depth %x\n", event->DataParam1, event->DataParam2, event->DataParam3); break; case HT_EVENT_OPT_REQUIRED_CAP_GEN3: - printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_GEN3, Socket %lx Link %lx Depth %lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_GEN3, Socket %x Link %x Depth %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case HT_EVENT_OPT_UNUSED_LINKS: - printk(BIOS_DEBUG, "HT_EVENT_OPT_UNUSED_LINKS, SocketA%lx LinkA%lx SocketB%lx LinkB%lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3, - event->DataParam4); + printk(BIOS_DEBUG, "HT_EVENT_OPT_UNUSED_LINKS, SocketA%x LinkA%x SocketB%x LinkB%x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3, + (unsigned int)event->DataParam4); break; case HT_EVENT_OPT_LINK_PAIR_EXCEED: - printk(BIOS_DEBUG, "HT_EVENT_OPT_LINK_PAIR_EXCEED, SocketA%lx MasterLink%lx SocketB%lx AltLink%lx\n", + printk(BIOS_DEBUG, "HT_EVENT_OPT_LINK_PAIR_EXCEED, SocketA%x MasterLink%x SocketB%x AltLink%x\n", - event->DataParam1, - event->DataParam2, - event->DataParam3, - event->DataParam4); + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3, + (unsigned int)event->DataParam4); default: break; } @@ -776,10 +776,10 @@ static void agesa_error(EVENT_PARAMS *event) switch (event->EventInfo >> 24) { case 0x04: - printk(BIOS_DEBUG, "Memory: Socket %lx Dct %lx Channel%lx ", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "Memory: Socket %x Dct %x Channel%x ", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case 0x08: @@ -943,47 +943,47 @@ static void agesa_error(EVENT_PARAMS *event) } else if ((event->EventInfo & 0x000000FF) == 0x07) { printk(BIOS_DEBUG, "AGESA_DEALLOCATE_CACHE_REGIONS\n"); } - printk(BIOS_DEBUG, "cache region index:%lx, start:%lx size:%lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "cache region index:%x, start:%x size:%x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case HT_EVENT_COH_NO_TOPOLOGY: - printk(BIOS_DEBUG, "no Matching Topology was found during coherent initializatio TotalHtNodes: %lx\n", - event->DataParam1); + printk(BIOS_DEBUG, "no Matching Topology was found during coherent initializatio TotalHtNodes: %x\n", + (unsigned int)event->DataParam1); break; case HT_EVENT_NCOH_BUID_EXCEED: - printk(BIOS_DEBUG, "there is a limit of 32 unit IDs per chain Socket%lx Link%lx Depth%lx" - "Current BUID: %lx, Unit Count: %lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3, - event->DataParam4 >> 16, - event->DataParam4 & 0x0000FFFF); + printk(BIOS_DEBUG, "there is a limit of 32 unit IDs per chain Socket%x Link%x Depth%x" + "Current BUID: %x, Unit Count: %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3, + (unsigned int)event->DataParam4 >> 16, + (unsigned int)event->DataParam4 & 0x0000FFFF); break; case HT_EVENT_NCOH_BUS_MAX_EXCEED: - printk(BIOS_DEBUG, "maximum auto bus limit exceeded, Socket %lx Link %lx Bus %lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "maximum auto bus limit exceeded, Socket %x Link %x Bus %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case HT_EVENT_NCOH_CFG_MAP_EXCEED: - printk(BIOS_DEBUG, "there is a limit of four non-coherent chains, Socket %lx Link %lx\n", - event->DataParam1, - event->DataParam2); + printk(BIOS_DEBUG, "there is a limit of four non-coherent chains, Socket %x Link %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2); break; case HT_EVENT_NCOH_DEVICE_FAILED: printk(BIOS_DEBUG, "after assigning an IO Device an ID, it does not respond at the new ID" - "Socket %lx Link %lx Depth %lx DeviceID %lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3, - event->DataParam4); + "Socket %x Link %x Depth %x DeviceID %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3, + (unsigned int)event->DataParam4); default: break; } @@ -995,33 +995,33 @@ static void agesa_critical(EVENT_PARAMS *event) { switch (event->EventInfo) { case MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR3: - printk(BIOS_DEBUG, "Socket: %lx, Heap allocation error for DMI table for DDR3\n", - event->DataParam1); + printk(BIOS_DEBUG, "Socket: %x, Heap allocation error for DMI table for DDR3\n", + (unsigned int)event->DataParam1); break; case MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR2: - printk(BIOS_DEBUG, "Socket: %lx, Heap allocation error for DMI table for DDR2\n", - event->DataParam1); + printk(BIOS_DEBUG, "Socket: %x, Heap allocation error for DMI table for DDR2\n", + (unsigned int)event->DataParam1); break; case MEM_ERROR_UNSUPPORTED_DIMM_CONFIG: - printk(BIOS_DEBUG, "Socket: %lx, Dimm population is not supported\n", - event->DataParam1); + printk(BIOS_DEBUG, "Socket: %x, Dimm population is not supported\n", + (unsigned int)event->DataParam1); break; case HT_EVENT_COH_PROCESSOR_TYPE_MIX: - printk(BIOS_DEBUG, "Socket %lx Link %lx TotalSockets %lx, HT_EVENT_COH_PROCESSOR_TYPE_MIX \n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "Socket %x Link %x TotalSockets %x, HT_EVENT_COH_PROCESSOR_TYPE_MIX \n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case HT_EVENT_COH_MPCAP_MISMATCH: - printk(BIOS_DEBUG, "Socket %lx Link %lx MpCap %lx TotalSockets %lx, HT_EVENT_COH_MPCAP_MISMATCH\n", - event->DataParam1, - event->DataParam2, - event->DataParam3, - event->DataParam4); + printk(BIOS_DEBUG, "Socket %x Link %x MpCap %x TotalSockets %x, HT_EVENT_COH_MPCAP_MISMATCH\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3, + (unsigned int)event->DataParam4); default: break; } @@ -1035,10 +1035,10 @@ static void agesa_fatal(EVENT_PARAMS *event) switch (event->EventInfo >> 24) { case 0x04: - printk(BIOS_DEBUG, "Memory: Socket %lx Dct %lx Channel%lx ", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "Memory: Socket %x Dct %x Channel%x ", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case 0x08: @@ -1114,8 +1114,8 @@ static void agesa_fatal(EVENT_PARAMS *event) break; case CPU_EVENT_PM_ALL_PSTATE_OVERCURRENT: - printk(BIOS_DEBUG, "Socket: %lx, All PStates exceeded the motherboard current limit on specified socket\n", - event->DataParam1); + printk(BIOS_DEBUG, "Socket: %x, All PStates exceeded the motherboard current limit on specified socket\n", + (unsigned int)event->DataParam1); break; default: @@ -1181,9 +1181,15 @@ UINT32 agesawrapper_amdreadeventlog(UINT8 HeapStatus) AmdEventParams.StdHeader.HeapStatus = HeapStatus; Status = AmdReadEventLog(&AmdEventParams); while (AmdEventParams.EventClass != 0) { - printk(BIOS_DEBUG,"\nEventLog: EventClass = %lx, EventInfo = %lx.\n",AmdEventParams.EventClass,AmdEventParams.EventInfo); - printk(BIOS_DEBUG," Param1 = %lx, Param2 = %lx.\n",AmdEventParams.DataParam1,AmdEventParams.DataParam2); - printk(BIOS_DEBUG," Param3 = %lx, Param4 = %lx.\n",AmdEventParams.DataParam3,AmdEventParams.DataParam4); + printk(BIOS_DEBUG,"\nEventLog: EventClass = %x, EventInfo = %x.\n", + (unsigned int)AmdEventParams.EventClass, + (unsigned int)AmdEventParams.EventInfo); + printk(BIOS_DEBUG," Param1 = %x, Param2 = %x.\n", + (unsigned int)AmdEventParams.DataParam1, + (unsigned int)AmdEventParams.DataParam2); + printk(BIOS_DEBUG," Param3 = %x, Param4 = %x.\n", + (unsigned int)AmdEventParams.DataParam3, + (unsigned int)AmdEventParams.DataParam4); interpret_agesa_eventlog(&AmdEventParams); Status = AmdReadEventLog(&AmdEventParams); } diff --git a/src/mainboard/supermicro/h8scm/agesawrapper.c b/src/mainboard/supermicro/h8scm/agesawrapper.c index fc3d092..5527ba3 100644 --- a/src/mainboard/supermicro/h8scm/agesawrapper.c +++ b/src/mainboard/supermicro/h8scm/agesawrapper.c @@ -276,7 +276,7 @@ UINT32 agesawrapper_amdinitearly(VOID) GetCpuServicesOfCurrentCore((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &AmdParamStruct.StdHeader); FamilySpecificServices->GetTscRate(FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader); - printk(BIOS_DEBUG, "BSP Frequency: %luMHz\n", TscRateInMhz); + printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz); AmdReleaseStruct(&AmdParamStruct); return (UINT32)status; @@ -329,7 +329,7 @@ UINT32 agesawrapper_amdinitpost(VOID) GetCpuServicesOfCurrentCore ((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &AmdParamStruct.StdHeader); FamilySpecificServices->GetTscRate (FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader); - printk(BIOS_DEBUG, "BSP Frequency: %luMHz\n", TscRateInMhz); + printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz); return (UINT32)status; } @@ -537,47 +537,47 @@ static void agesa_alert(EVENT_PARAMS *event) { switch (event->EventInfo) { case MEM_ALERT_USER_TMG_MODE_OVERRULED: - printk(BIOS_DEBUG, "Socket %lx Dct %lx Channel %lx " + printk(BIOS_DEBUG, "Socket %x Dct %x Channel %x " "TIMING_MODE_SPECIFIC is requested but can not be applied to current configurations.\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case MEM_ALERT_ORG_MISMATCH_DIMM: - printk(BIOS_DEBUG, "Socket %lx Dct %lx Channel %lx " + printk(BIOS_DEBUG, "Socket %x Dct %x Channel %x " "DIMM organization miss-match\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case MEM_ALERT_BK_INT_DIS: - printk(BIOS_DEBUG, "Socket %lx Dct %lx Channel %lx " + printk(BIOS_DEBUG, "Socket %x Dct %x Channel %x " "Bank interleaving disable for internal issue\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case CPU_EVENT_BIST_ERROR: - printk(BIOS_DEBUG, "BIST error: %lx reported on Socket %lx Core %lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "BIST error: %x reported on Socket %x Core %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case HT_EVENT_HW_SYNCFLOOD: - printk(BIOS_DEBUG, "HT_EVENT_DATA_HW_SYNCFLOOD error on Socket %lx Link %lx\n", - event->DataParam1, - event->DataParam2); + printk(BIOS_DEBUG, "HT_EVENT_DATA_HW_SYNCFLOOD error on Socket %x Link %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2); break; case HT_EVENT_HW_HTCRC: - printk(BIOS_DEBUG, "HT_EVENT_HW_HTCRC error on Socket %lx Link %lx Lanemask:%lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "HT_EVENT_HW_HTCRC error on Socket %x Link %x Lanemask:%x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; default: @@ -602,10 +602,10 @@ static void agesa_warning(EVENT_PARAMS *event) switch (event->EventInfo >> 24) { case 0x04: - printk(BIOS_DEBUG, "Memory: Socket %lx Dct %lx Channel%lx ", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "Memory: Socket %x Dct %x Channel%x ", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case 0x08: @@ -702,24 +702,24 @@ static void agesa_warning(EVENT_PARAMS *event) } else if ((event->EventInfo & 0x000000FF) == 0x03) { printk(BIOS_DEBUG, "AGESA_CACHE_REGIONS_ACROSS_4GB\n"); } - printk(BIOS_DEBUG, "cache region index:%lx, start:%lx size:%lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "cache region index:%x, start:%x size:%x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case CPU_WARNING_ADJUSTED_LEVELING_MODE: printk(BIOS_DEBUG, "CPU_WARNING_ADJUSTED_LEVELING_MODE " - "requested: %lx, actual level:%lx\n", - event->DataParam1, - event->DataParam2); + "requested: %x, actual level:%x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2); break; case CPU_EVENT_PM_PSTATE_OVERCURRENT: printk(BIOS_DEBUG, "CPU_EVENT_PM_PSTATE_OVERCURRENT " - "Socket: %lx, Pstate:%lx\n", - event->DataParam1, - event->DataParam2); + "Socket: %x, Pstate:%x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2); break; case CPU_WARNING_NONOPTIMAL_HT_ASSIST_CFG: @@ -735,34 +735,34 @@ static void agesa_warning(EVENT_PARAMS *event) */ case HT_EVENT_OPT_REQUIRED_CAP_RETRY: - printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_RETRY, Socket %lx Link %lx Depth %lx\n", + printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_RETRY, Socket %x Link %x Depth %x\n", event->DataParam1, event->DataParam2, event->DataParam3); break; case HT_EVENT_OPT_REQUIRED_CAP_GEN3: - printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_GEN3, Socket %lx Link %lx Depth %lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_GEN3, Socket %x Link %x Depth %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case HT_EVENT_OPT_UNUSED_LINKS: - printk(BIOS_DEBUG, "HT_EVENT_OPT_UNUSED_LINKS, SocketA%lx LinkA%lx SocketB%lx LinkB%lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3, - event->DataParam4); + printk(BIOS_DEBUG, "HT_EVENT_OPT_UNUSED_LINKS, SocketA%x LinkA%x SocketB%x LinkB%x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3, + (unsigned int)event->DataParam4); break; case HT_EVENT_OPT_LINK_PAIR_EXCEED: - printk(BIOS_DEBUG, "HT_EVENT_OPT_LINK_PAIR_EXCEED, SocketA%lx MasterLink%lx SocketB%lx AltLink%lx\n", + printk(BIOS_DEBUG, "HT_EVENT_OPT_LINK_PAIR_EXCEED, SocketA%x MasterLink%x SocketB%x AltLink%x\n", - event->DataParam1, - event->DataParam2, - event->DataParam3, - event->DataParam4); + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3, + (unsigned int)event->DataParam4); default: break; } @@ -776,10 +776,10 @@ static void agesa_error(EVENT_PARAMS *event) switch (event->EventInfo >> 24) { case 0x04: - printk(BIOS_DEBUG, "Memory: Socket %lx Dct %lx Channel%lx ", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "Memory: Socket %x Dct %x Channel%x ", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case 0x08: @@ -943,47 +943,47 @@ static void agesa_error(EVENT_PARAMS *event) } else if ((event->EventInfo & 0x000000FF) == 0x07) { printk(BIOS_DEBUG, "AGESA_DEALLOCATE_CACHE_REGIONS\n"); } - printk(BIOS_DEBUG, "cache region index:%lx, start:%lx size:%lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "cache region index:%x, start:%x size:%x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case HT_EVENT_COH_NO_TOPOLOGY: - printk(BIOS_DEBUG, "no Matching Topology was found during coherent initializatio TotalHtNodes: %lx\n", - event->DataParam1); + printk(BIOS_DEBUG, "no Matching Topology was found during coherent initializatio TotalHtNodes: %x\n", + (unsigned int)event->DataParam1); break; case HT_EVENT_NCOH_BUID_EXCEED: - printk(BIOS_DEBUG, "there is a limit of 32 unit IDs per chain Socket%lx Link%lx Depth%lx" - "Current BUID: %lx, Unit Count: %lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3, - event->DataParam4 >> 16, - event->DataParam4 & 0x0000FFFF); + printk(BIOS_DEBUG, "there is a limit of 32 unit IDs per chain Socket%x Link%x Depth%x" + "Current BUID: %x, Unit Count: %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3, + (unsigned int)event->DataParam4 >> 16, + (unsigned int)event->DataParam4 & 0x0000FFFF); break; case HT_EVENT_NCOH_BUS_MAX_EXCEED: - printk(BIOS_DEBUG, "maximum auto bus limit exceeded, Socket %lx Link %lx Bus %lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "maximum auto bus limit exceeded, Socket %x Link %x Bus %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case HT_EVENT_NCOH_CFG_MAP_EXCEED: - printk(BIOS_DEBUG, "there is a limit of four non-coherent chains, Socket %lx Link %lx\n", - event->DataParam1, - event->DataParam2); + printk(BIOS_DEBUG, "there is a limit of four non-coherent chains, Socket %x Link %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2); break; case HT_EVENT_NCOH_DEVICE_FAILED: printk(BIOS_DEBUG, "after assigning an IO Device an ID, it does not respond at the new ID" - "Socket %lx Link %lx Depth %lx DeviceID %lx\n", - event->DataParam1, - event->DataParam2, - event->DataParam3, - event->DataParam4); + "Socket %x Link %x Depth %x DeviceID %x\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3, + (unsigned int)event->DataParam4); default: break; } @@ -995,33 +995,33 @@ static void agesa_critical(EVENT_PARAMS *event) { switch (event->EventInfo) { case MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR3: - printk(BIOS_DEBUG, "Socket: %lx, Heap allocation error for DMI table for DDR3\n", - event->DataParam1); + printk(BIOS_DEBUG, "Socket: %x, Heap allocation error for DMI table for DDR3\n", + (unsigned int)event->DataParam1); break; case MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR2: - printk(BIOS_DEBUG, "Socket: %lx, Heap allocation error for DMI table for DDR2\n", - event->DataParam1); + printk(BIOS_DEBUG, "Socket: %x, Heap allocation error for DMI table for DDR2\n", + (unsigned int)event->DataParam1); break; case MEM_ERROR_UNSUPPORTED_DIMM_CONFIG: - printk(BIOS_DEBUG, "Socket: %lx, Dimm population is not supported\n", - event->DataParam1); + printk(BIOS_DEBUG, "Socket: %x, Dimm population is not supported\n", + (unsigned int)event->DataParam1); break; case HT_EVENT_COH_PROCESSOR_TYPE_MIX: - printk(BIOS_DEBUG, "Socket %lx Link %lx TotalSockets %lx, HT_EVENT_COH_PROCESSOR_TYPE_MIX \n", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "Socket %x Link %x TotalSockets %x, HT_EVENT_COH_PROCESSOR_TYPE_MIX \n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case HT_EVENT_COH_MPCAP_MISMATCH: - printk(BIOS_DEBUG, "Socket %lx Link %lx MpCap %lx TotalSockets %lx, HT_EVENT_COH_MPCAP_MISMATCH\n", - event->DataParam1, - event->DataParam2, - event->DataParam3, - event->DataParam4); + printk(BIOS_DEBUG, "Socket %x Link %x MpCap %x TotalSockets %x, HT_EVENT_COH_MPCAP_MISMATCH\n", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3, + (unsigned int)event->DataParam4); default: break; } @@ -1035,10 +1035,10 @@ static void agesa_fatal(EVENT_PARAMS *event) switch (event->EventInfo >> 24) { case 0x04: - printk(BIOS_DEBUG, "Memory: Socket %lx Dct %lx Channel%lx ", - event->DataParam1, - event->DataParam2, - event->DataParam3); + printk(BIOS_DEBUG, "Memory: Socket %x Dct %x Channel%x ", + (unsigned int)event->DataParam1, + (unsigned int)event->DataParam2, + (unsigned int)event->DataParam3); break; case 0x08: @@ -1114,8 +1114,8 @@ static void agesa_fatal(EVENT_PARAMS *event) break; case CPU_EVENT_PM_ALL_PSTATE_OVERCURRENT: - printk(BIOS_DEBUG, "Socket: %lx, All PStates exceeded the motherboard current limit on specified socket\n", - event->DataParam1); + printk(BIOS_DEBUG, "Socket: %x, All PStates exceeded the motherboard current limit on specified socket\n", + (unsigned int)event->DataParam1); break; default: @@ -1181,9 +1181,15 @@ UINT32 agesawrapper_amdreadeventlog(UINT8 HeapStatus) AmdEventParams.StdHeader.HeapStatus = HeapStatus; Status = AmdReadEventLog(&AmdEventParams); while (AmdEventParams.EventClass != 0) { - printk(BIOS_DEBUG,"\nEventLog: EventClass = %lx, EventInfo = %lx.\n",AmdEventParams.EventClass,AmdEventParams.EventInfo); - printk(BIOS_DEBUG," Param1 = %lx, Param2 = %lx.\n",AmdEventParams.DataParam1,AmdEventParams.DataParam2); - printk(BIOS_DEBUG," Param3 = %lx, Param4 = %lx.\n",AmdEventParams.DataParam3,AmdEventParams.DataParam4); + printk(BIOS_DEBUG,"\nEventLog: EventClass = %x, EventInfo = %x.\n", + (unsigned int)AmdEventParams.EventClass, + (unsigned int)AmdEventParams.EventInfo); + printk(BIOS_DEBUG," Param1 = %x, Param2 = %x.\n", + (unsigned int)AmdEventParams.DataParam1, + (unsigned int)AmdEventParams.DataParam2); + printk(BIOS_DEBUG," Param3 = %x, Param4 = %x.\n", + (unsigned int)AmdEventParams.DataParam3, + (unsigned int)AmdEventParams.DataParam4); interpret_agesa_eventlog(&AmdEventParams); Status = AmdReadEventLog(&AmdEventParams); }

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coreboot February 2013