coreboot January 2013

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Re: [coreboot] Feedback On Coreboot: the Solution to the Secure Boot Fiasco
by ron minnich 03 Jan '13

03 Jan '13

OK, after further thought, here's my take. Two companies have defined a secure boot standard in such a way that they can closely control what boots on future systems using the one company's chips. This is a sea change from the original IBM PC design, which encouraged people to boot anything, and included the (copyrighted) BIOS listing on paper to further that end. The current state is that the software company is becoming the gatekeeper for what OS will run on systems built using the hardware company's chips. Their end goal is that the software company becomes the gatekeeper for what runs on almost *anything* -- not just x86. Don't believe me? Read about ARM systems and Windows 8. Vendors are now building systems based on this standard. People are seeing that the situation is not quite as blissful as the two companies have painted it -- that certain software will in fact be locked out for a number of reasons, that there can be unexplained delays in getting code signed, and that buggy EFI implementations may lock people out in unforeseen ways. The open source community's response has been to act in a way that strengthens this model. They're doing all they can to find a way to work inside these limits. Instead of pushing hard to use only hardware that's really open, and doing what they can to relegate this (shown to be insecure) "secure" boot to the dustbin of history, they're pushing as hard as they can to make it succeed. I find this quite perverse. There's lots of good hardware out there that is not built around this lockin, and yet the open source community is focusing lots of effort on making the lockin viable. The open source community has pushed back on defective standards like this before and won. Why they're rolling over now is a puzzling, especially given the existence of alternatives. Put another way, I think the secure boot standard needs the open source community more than the open source community needs the secure boot standard, but the open source community is not exploiting that fact. I guess part of it is that so much of the open source community is contained in big companies, but it's stil disappointing. ron

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Patch set updated for coreboot: 06ee2ef make early serial console support more generic
by Ronald G. Minnich 03 Jan '13

03 Jan '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2086 -gerrit commit 06ee2effa2137b72289629cabdae5f7c8f9b7de1 Author: David Hendricks <dhendrix(a)chromium.org> Date: Mon Dec 31 17:28:43 2012 -0800 make early serial console support more generic This patch makes pre-RAM serial init more generic, particularly for platforms which do not necessarily need cache-as-RAM in order to use the serial console and do not have a standard 8250 serial port. This adds a Kconfig variable to set romstage-* for very early serial console init. The current method assumes that cache-as-RAM should enable this, so to maintain compatibility selecting CACHE_AS_RAM will also select EARLY_SERIAL_CONSOLE. The UART code structure needs some rework, but the use of ROMCC, romstage, and then ramstage makes things complex. uart.h now includes all .h files for all uarts. All 2 of them. This is actually a simplifying change. Change-Id: I089e7af633c227baf3c06c685f005e9d0e4b38ce Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/console/Kconfig | 7 +++++++ src/console/Makefile.inc | 2 +- src/console/console.c | 4 +++- src/cpu/Kconfig | 1 + src/cpu/samsung/exynos5250/uart.c | 6 +++--- src/cpu/samsung/exynos5250/uart.h | 1 + src/include/uart.h | 22 ++++++++++++++++------ src/include/uart8250.h | 1 - 8 files changed, 32 insertions(+), 12 deletions(-) diff --git a/src/console/Kconfig b/src/console/Kconfig index 117fdb8..a726c1f 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -5,6 +5,13 @@ config SERIAL_CONSOLE help Send coreboot debug output to a serial port +config EARLY_SERIAL_CONSOLE + bool + select SERIAL_CONSOLE + default n + help + Use serial console during early boot stages (e.g. cache-as-RAM) + config CONSOLE_SERIAL8250 bool "Serial port console output (I/O mapped, 8250-compatible)" depends on SERIAL_CONSOLE diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index a712486..3c4777f 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -10,7 +10,7 @@ smm-y += vtxprintf.c smm-$(CONFIG_SMM_TSEG) += die.c romstage-y += vtxprintf.c -romstage-$(CONFIG_CACHE_AS_RAM) += console.c +romstage-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c romstage-y += post.c romstage-y += die.c diff --git a/src/console/console.c b/src/console/console.c index d5f25a5..e92dbf6 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -99,13 +99,15 @@ int console_tst_byte(void) #else // __PRE_RAM__ ^^^ NOT defined vvv defined +#include <uart.h> + void console_init(void) { #if CONFIG_USBDEBUG enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_SERIAL_CONSOLE && !CONFIG_CONSOLE_SERIAL8250MEM uart_init(); #endif #if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 383ba79..ddc46cf 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -16,6 +16,7 @@ source src/cpu/x86/Kconfig config CACHE_AS_RAM bool + select EARLY_SERIAL_CONSOLE default !ROMCC config DCACHE_RAM_BASE diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index 3d43976..2d7bf38 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -23,6 +23,7 @@ //#include <common.h> //#include <linux/compiler.h> +#include <types.h> #include <uart.h> #include <arch/io.h> //#include <asm/arch-exynos/spl.h> @@ -34,7 +35,6 @@ #include <cpu/samsung/exynos5-common/exynos5-common.h> #include <cpu/samsung/exynos5250/clk.h> -#include <cpu/samsung/exynos5250/uart.h> #define RX_FIFO_COUNT_MASK 0xff #define RX_FIFO_FULL_MASK (1 << 8) @@ -218,12 +218,12 @@ static const struct console_driver exynos5_uart_console __console = { //unsigned char (*uart_rx_byte)(unsigned base_port) = exynos5_uart_rx_byte; //void (*uart_tx_byte)(unsigned base_port, unsigned char data) = exynos5_uart_tx_byte; /* FIXME: trivial wrappers */ -void uart_init() +void uart_init(void) { exynos5_init_dev(); } -unsigned char uart_rx_byte() +unsigned char uart_rx_byte(void) { return exynos5_uart_rx_byte(); } diff --git a/src/cpu/samsung/exynos5250/uart.h b/src/cpu/samsung/exynos5250/uart.h index 8190c67..033d605 100644 --- a/src/cpu/samsung/exynos5250/uart.h +++ b/src/cpu/samsung/exynos5250/uart.h @@ -68,4 +68,5 @@ static inline int s5p_uart_divslot(void) return 0; } +void uart_init(void); #endif diff --git a/src/include/uart.h b/src/include/uart.h index 931d6dc..6628314 100644 --- a/src/include/uart.h +++ b/src/include/uart.h @@ -15,19 +15,29 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * FIXME(dhendrix): This file contains generic prototypes for UART functions. - * The existing headers are too specific to the 8250, so we need a better - * abstraction for use with non-8250 UARTs. */ +/* madness. Uarts are a mess. If you include this file, it + * includes ALL uart implementations which may be needed. + * No need to include them separately, and include this file FIRST. + * At least one (but at most one) of the files needs to define + * uart_init(). + */ #ifndef UART_H #define UART_H +#if CONFIG_CONSOLE_SERIAL8250 +#include <uart8250.h> +#endif + +#if CONFIG_CPU_SAMSUNG_EXYNOS5 +#include <cpu/samsung/exynos5250/uart.h> +#endif + +#ifndef __ROMCC__ unsigned char uart_rx_byte(void); void uart_tx_byte(unsigned char data); void uart_tx_flush(void); - -void uart_init(void); +#endif #endif /* UART_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h index b00ff48..9af43f2 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -120,7 +120,6 @@ unsigned char uart8250_rx_byte(unsigned base_port); int uart8250_can_rx_byte(unsigned base_port); void uart8250_tx_byte(unsigned base_port, unsigned char data); void uart8250_tx_flush(unsigned base_port); - /* Yes it is silly to have three different uart init functions. But we used to * have three different sets of uart code, so it's an improvement. */

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Patch merged into coreboot/master: 72a2eaf Rename mainboard_smi.c to smihandler.c
by gerrit＠coreboot.org 03 Jan '13

03 Jan '13

the following patch was just integrated into master: commit 72a2eaf4d5364d5c5b7632b75d62c84f7bf490c8 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Wed Dec 19 16:32:47 2012 +0100 Rename mainboard_smi.c to smihandler.c This mirrors the naming convention of handlers in northbridge and southbridge. Change-Id: I45d97c569991c955f0ae54ce909d8c267e9a5173 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-on: http://review.coreboot.org/2058 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303(a)gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Wed Dec 19 18:22:20 2012, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Sat Dec 29 17:40:48 2012, giving +2 See http://review.coreboot.org/2058 for details. -gerrit

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Patch merged into coreboot/master: 64b364d Add the push default to 'make gitconfig'
by gerrit＠coreboot.org 03 Jan '13

03 Jan '13

the following patch was just integrated into master: commit 64b364d1ec85f97fe948ba41cf8e7a3f43503829 Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Thu Jan 3 08:26:09 2013 -0800 Add the push default to 'make gitconfig' It's too easy to forget this and it's kind of important, so Just Add It. Change-Id: Ic7ab7658425a98d5d435bfef46f89cc6a56c7284 Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-on: http://review.coreboot.org/2096 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Thu Jan 3 17:38:33 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Thu Jan 3 19:32:29 2013, giving +2 See http://review.coreboot.org/2096 for details. -gerrit

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Patch set updated for coreboot: aba2f85 make early serial console support more generic
by Ronald G. Minnich 03 Jan '13

03 Jan '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2086 -gerrit commit aba2f85de3a85b2a3e38b7c863ce76254db17614 Author: David Hendricks <dhendrix(a)chromium.org> Date: Mon Dec 31 17:28:43 2012 -0800 make early serial console support more generic This patch makes pre-RAM serial init more generic, particularly for platforms which do not necessarily need cache-as-RAM in order to use the serial console and do not have a standard 8250 serial port. This adds a Kconfig variable to set romstage-* for very early serial console init. The current method assumes that cache-as-RAM should enable this, so to maintain compatibility selecting CACHE_AS_RAM will also select EARLY_SERIAL_CONSOLE. The UART code structure needs some rework, but the use of ROMCC, romstage, and then ramstage makes things complex. uart.h now includes all .h files for all uarts. All 2 of them. This is actually a simplifying change. Change-Id: I089e7af633c227baf3c06c685f005e9d0e4b38ce Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/console/Kconfig | 7 +++++++ src/console/Makefile.inc | 2 +- src/console/console.c | 4 +++- src/cpu/Kconfig | 1 + src/cpu/samsung/exynos5250/uart.c | 5 ++--- src/cpu/samsung/exynos5250/uart.h | 1 + src/include/uart.h | 16 ++++++++++------ src/include/uart8250.h | 1 - 8 files changed, 25 insertions(+), 12 deletions(-) diff --git a/src/console/Kconfig b/src/console/Kconfig index 117fdb8..a726c1f 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -5,6 +5,13 @@ config SERIAL_CONSOLE help Send coreboot debug output to a serial port +config EARLY_SERIAL_CONSOLE + bool + select SERIAL_CONSOLE + default n + help + Use serial console during early boot stages (e.g. cache-as-RAM) + config CONSOLE_SERIAL8250 bool "Serial port console output (I/O mapped, 8250-compatible)" depends on SERIAL_CONSOLE diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index a712486..3c4777f 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -10,7 +10,7 @@ smm-y += vtxprintf.c smm-$(CONFIG_SMM_TSEG) += die.c romstage-y += vtxprintf.c -romstage-$(CONFIG_CACHE_AS_RAM) += console.c +romstage-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c romstage-y += post.c romstage-y += die.c diff --git a/src/console/console.c b/src/console/console.c index d5f25a5..e92dbf6 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -99,13 +99,15 @@ int console_tst_byte(void) #else // __PRE_RAM__ ^^^ NOT defined vvv defined +#include <uart.h> + void console_init(void) { #if CONFIG_USBDEBUG enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_SERIAL_CONSOLE && !CONFIG_CONSOLE_SERIAL8250MEM uart_init(); #endif #if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 383ba79..ddc46cf 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -16,6 +16,7 @@ source src/cpu/x86/Kconfig config CACHE_AS_RAM bool + select EARLY_SERIAL_CONSOLE default !ROMCC config DCACHE_RAM_BASE diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index 3d43976..17ea17e 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -34,7 +34,6 @@ #include <cpu/samsung/exynos5-common/exynos5-common.h> #include <cpu/samsung/exynos5250/clk.h> -#include <cpu/samsung/exynos5250/uart.h> #define RX_FIFO_COUNT_MASK 0xff #define RX_FIFO_FULL_MASK (1 << 8) @@ -218,12 +217,12 @@ static const struct console_driver exynos5_uart_console __console = { //unsigned char (*uart_rx_byte)(unsigned base_port) = exynos5_uart_rx_byte; //void (*uart_tx_byte)(unsigned base_port, unsigned char data) = exynos5_uart_tx_byte; /* FIXME: trivial wrappers */ -void uart_init() +void uart_init(void) { exynos5_init_dev(); } -unsigned char uart_rx_byte() +unsigned char uart_rx_byte(void) { return exynos5_uart_rx_byte(); } diff --git a/src/cpu/samsung/exynos5250/uart.h b/src/cpu/samsung/exynos5250/uart.h index 8190c67..033d605 100644 --- a/src/cpu/samsung/exynos5250/uart.h +++ b/src/cpu/samsung/exynos5250/uart.h @@ -68,4 +68,5 @@ static inline int s5p_uart_divslot(void) return 0; } +void uart_init(void); #endif diff --git a/src/include/uart.h b/src/include/uart.h index 931d6dc..1c9ef70 100644 --- a/src/include/uart.h +++ b/src/include/uart.h @@ -15,19 +15,23 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * FIXME(dhendrix): This file contains generic prototypes for UART functions. - * The existing headers are too specific to the 8250, so we need a better - * abstraction for use with non-8250 UARTs. */ +/* madness. Uarts are a mess. If you include this file, it + * includes ALL uart implementations which may be needed. + * No need to include them separately, and include this file FIRST. + * At least one (but at most one) of the files needs to define + * uart_init(). + */ #ifndef UART_H #define UART_H +#include <uart8250.h> +#include <cpu/samsung/exynos5250/uart.h> +#ifndef __ROMCC__ unsigned char uart_rx_byte(void); void uart_tx_byte(unsigned char data); void uart_tx_flush(void); - -void uart_init(void); +#endif #endif /* UART_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h index b00ff48..9af43f2 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -120,7 +120,6 @@ unsigned char uart8250_rx_byte(unsigned base_port); int uart8250_can_rx_byte(unsigned base_port); void uart8250_tx_byte(unsigned base_port, unsigned char data); void uart8250_tx_flush(unsigned base_port); - /* Yes it is silly to have three different uart init functions. But we used to * have three different sets of uart code, so it's an improvement. */

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Patch set updated for coreboot: 70c3a2b make early serial console support more generic
by Ronald G. Minnich 03 Jan '13

03 Jan '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2086 -gerrit commit 70c3a2b966d84ba87f0adb426326777fe88ff521 Author: David Hendricks <dhendrix(a)chromium.org> Date: Mon Dec 31 17:28:43 2012 -0800 make early serial console support more generic This patch makes pre-RAM serial init more generic, particularly for platforms which do not necessarily need cache-as-RAM in order to use the serial console and do not have a standard 8250 serial port. This adds a Kconfig variable to set romstage-* for very early serial console init. The current method assumes that cache-as-RAM should enable this, so to maintain compatibility selecting CACHE_AS_RAM will also select EARLY_SERIAL_CONSOLE. The UART code structure needs some rework, but the use of ROMCC, romstage, and then ramstage makes things complex. Change-Id: I089e7af633c227baf3c06c685f005e9d0e4b38ce Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/console/Kconfig | 7 +++++++ src/console/Makefile.inc | 2 +- src/console/console.c | 4 +++- src/cpu/Kconfig | 1 + src/cpu/samsung/exynos5250/uart.c | 4 ++-- src/include/uart.h | 15 +++++++++------ src/include/uart8250.h | 1 - 7 files changed, 23 insertions(+), 11 deletions(-) diff --git a/src/console/Kconfig b/src/console/Kconfig index 117fdb8..a726c1f 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -5,6 +5,13 @@ config SERIAL_CONSOLE help Send coreboot debug output to a serial port +config EARLY_SERIAL_CONSOLE + bool + select SERIAL_CONSOLE + default n + help + Use serial console during early boot stages (e.g. cache-as-RAM) + config CONSOLE_SERIAL8250 bool "Serial port console output (I/O mapped, 8250-compatible)" depends on SERIAL_CONSOLE diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index a712486..3c4777f 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -10,7 +10,7 @@ smm-y += vtxprintf.c smm-$(CONFIG_SMM_TSEG) += die.c romstage-y += vtxprintf.c -romstage-$(CONFIG_CACHE_AS_RAM) += console.c +romstage-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c romstage-y += post.c romstage-y += die.c diff --git a/src/console/console.c b/src/console/console.c index d5f25a5..e92dbf6 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -99,13 +99,15 @@ int console_tst_byte(void) #else // __PRE_RAM__ ^^^ NOT defined vvv defined +#include <uart.h> + void console_init(void) { #if CONFIG_USBDEBUG enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_SERIAL_CONSOLE && !CONFIG_CONSOLE_SERIAL8250MEM uart_init(); #endif #if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 383ba79..ddc46cf 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -16,6 +16,7 @@ source src/cpu/x86/Kconfig config CACHE_AS_RAM bool + select EARLY_SERIAL_CONSOLE default !ROMCC config DCACHE_RAM_BASE diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index 3d43976..b9299fd 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -218,12 +218,12 @@ static const struct console_driver exynos5_uart_console __console = { //unsigned char (*uart_rx_byte)(unsigned base_port) = exynos5_uart_rx_byte; //void (*uart_tx_byte)(unsigned base_port, unsigned char data) = exynos5_uart_tx_byte; /* FIXME: trivial wrappers */ -void uart_init() +void uart_init(void) { exynos5_init_dev(); } -unsigned char uart_rx_byte() +unsigned char uart_rx_byte(void) { return exynos5_uart_rx_byte(); } diff --git a/src/include/uart.h b/src/include/uart.h index 931d6dc..a95f6ee 100644 --- a/src/include/uart.h +++ b/src/include/uart.h @@ -15,19 +15,22 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * FIXME(dhendrix): This file contains generic prototypes for UART functions. - * The existing headers are too specific to the 8250, so we need a better - * abstraction for use with non-8250 UARTs. */ +/* madness. Uarts are a mess. If you include this file, it + * includes ALL uart implementations which may be needed. + * No need to include them separately, and include this file FIRST. + * At least one (but at most one) of the files needs to define + * uart_init(). + */ #ifndef UART_H #define UART_H +#include <uart8250.h> +#ifndef __ROMCC__ unsigned char uart_rx_byte(void); void uart_tx_byte(unsigned char data); void uart_tx_flush(void); - -void uart_init(void); +#endif #endif /* UART_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h index b00ff48..9af43f2 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -120,7 +120,6 @@ unsigned char uart8250_rx_byte(unsigned base_port); int uart8250_can_rx_byte(unsigned base_port); void uart8250_tx_byte(unsigned base_port, unsigned char data); void uart8250_tx_flush(unsigned base_port); - /* Yes it is silly to have three different uart init functions. But we used to * have three different sets of uart code, so it's an improvement. */

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Patch set updated for coreboot: 7a9173a make early serial console support more generic
by Ronald G. Minnich 03 Jan '13

03 Jan '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2086 -gerrit commit 7a9173aefd7d1cafa31b00cfe6d299b64e3ee32c Author: David Hendricks <dhendrix(a)chromium.org> Date: Mon Dec 31 17:28:43 2012 -0800 make early serial console support more generic This patch makes pre-RAM serial init more generic, particularly for platforms which do not necessarily need cache-as-RAM in order to use the serial console and do not have a standard 8250 serial port. This adds a Kconfig variable to set romstage-* for very early serial console init. The current method assumes that cache-as-RAM should enable this, so to maintain compatibility selecting CACHE_AS_RAM will also select EARLY_SERIAL_CONSOLE. The UART code structure needs some rework, but the use of ROMCC, romstage, and then ramstage makes things complex. Change-Id: I089e7af633c227baf3c06c685f005e9d0e4b38ce Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/console/Kconfig | 7 +++++++ src/console/Makefile.inc | 2 +- src/console/console.c | 4 +++- src/cpu/Kconfig | 1 + src/cpu/samsung/exynos5250/uart.c | 4 ++-- src/include/uart.h | 13 +++++++------ src/include/uart8250.h | 1 - 7 files changed, 21 insertions(+), 11 deletions(-) diff --git a/src/console/Kconfig b/src/console/Kconfig index 117fdb8..a726c1f 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -5,6 +5,13 @@ config SERIAL_CONSOLE help Send coreboot debug output to a serial port +config EARLY_SERIAL_CONSOLE + bool + select SERIAL_CONSOLE + default n + help + Use serial console during early boot stages (e.g. cache-as-RAM) + config CONSOLE_SERIAL8250 bool "Serial port console output (I/O mapped, 8250-compatible)" depends on SERIAL_CONSOLE diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index a712486..3c4777f 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -10,7 +10,7 @@ smm-y += vtxprintf.c smm-$(CONFIG_SMM_TSEG) += die.c romstage-y += vtxprintf.c -romstage-$(CONFIG_CACHE_AS_RAM) += console.c +romstage-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c romstage-y += post.c romstage-y += die.c diff --git a/src/console/console.c b/src/console/console.c index d5f25a5..e92dbf6 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -99,13 +99,15 @@ int console_tst_byte(void) #else // __PRE_RAM__ ^^^ NOT defined vvv defined +#include <uart.h> + void console_init(void) { #if CONFIG_USBDEBUG enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_SERIAL_CONSOLE && !CONFIG_CONSOLE_SERIAL8250MEM uart_init(); #endif #if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 383ba79..ddc46cf 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -16,6 +16,7 @@ source src/cpu/x86/Kconfig config CACHE_AS_RAM bool + select EARLY_SERIAL_CONSOLE default !ROMCC config DCACHE_RAM_BASE diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index 3d43976..b9299fd 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -218,12 +218,12 @@ static const struct console_driver exynos5_uart_console __console = { //unsigned char (*uart_rx_byte)(unsigned base_port) = exynos5_uart_rx_byte; //void (*uart_tx_byte)(unsigned base_port, unsigned char data) = exynos5_uart_tx_byte; /* FIXME: trivial wrappers */ -void uart_init() +void uart_init(void) { exynos5_init_dev(); } -unsigned char uart_rx_byte() +unsigned char uart_rx_byte(void) { return exynos5_uart_rx_byte(); } diff --git a/src/include/uart.h b/src/include/uart.h index 931d6dc..c592cfc 100644 --- a/src/include/uart.h +++ b/src/include/uart.h @@ -15,19 +15,20 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * FIXME(dhendrix): This file contains generic prototypes for UART functions. - * The existing headers are too specific to the 8250, so we need a better - * abstraction for use with non-8250 UARTs. */ +/* madness. Uarts are a mess. If you include this file, it + * includes ALL uart implementations which may be needed. + * No need to include them separately, and include this file FIRST. + * At least one (but at most one) of the files needs to define + * uart_init(). + */ #ifndef UART_H #define UART_H +#include <uart8250.h> unsigned char uart_rx_byte(void); void uart_tx_byte(unsigned char data); void uart_tx_flush(void); -void uart_init(void); - #endif /* UART_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h index b00ff48..9af43f2 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -120,7 +120,6 @@ unsigned char uart8250_rx_byte(unsigned base_port); int uart8250_can_rx_byte(unsigned base_port); void uart8250_tx_byte(unsigned base_port, unsigned char data); void uart8250_tx_flush(unsigned base_port); - /* Yes it is silly to have three different uart init functions. But we used to * have three different sets of uart code, so it's an improvement. */

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Patch set updated for coreboot: 1f6b08a make early serial console support more generic
by Ronald G. Minnich 03 Jan '13

03 Jan '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2086 -gerrit commit 1f6b08ad5bafa426c813bd09ec6c268c3c23160a Author: David Hendricks <dhendrix(a)chromium.org> Date: Mon Dec 31 17:28:43 2012 -0800 make early serial console support more generic This patch makes pre-RAM serial init more generic, particularly for platforms which do not necessarily need cache-as-RAM in order to use the serial console and do not have a standard 8250 serial port. This adds a Kconfig variable to set romstage-* for very early serial console init. The current method assumes that cache-as-RAM should enable this, so to maintain compatibility selecting CACHE_AS_RAM will also select EARLY_SERIAL_CONSOLE. The UART code structure needs some rework, but the use of ROMCC, romstage, and then ramstage makes things complex. Change-Id: I089e7af633c227baf3c06c685f005e9d0e4b38ce Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/console/Kconfig | 7 +++++++ src/console/Makefile.inc | 2 +- src/console/console.c | 4 +++- src/cpu/Kconfig | 1 + src/include/uart.h | 13 +++++++------ src/include/uart8250.h | 1 - 6 files changed, 19 insertions(+), 9 deletions(-) diff --git a/src/console/Kconfig b/src/console/Kconfig index 117fdb8..a726c1f 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -5,6 +5,13 @@ config SERIAL_CONSOLE help Send coreboot debug output to a serial port +config EARLY_SERIAL_CONSOLE + bool + select SERIAL_CONSOLE + default n + help + Use serial console during early boot stages (e.g. cache-as-RAM) + config CONSOLE_SERIAL8250 bool "Serial port console output (I/O mapped, 8250-compatible)" depends on SERIAL_CONSOLE diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index a712486..3c4777f 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -10,7 +10,7 @@ smm-y += vtxprintf.c smm-$(CONFIG_SMM_TSEG) += die.c romstage-y += vtxprintf.c -romstage-$(CONFIG_CACHE_AS_RAM) += console.c +romstage-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c romstage-y += post.c romstage-y += die.c diff --git a/src/console/console.c b/src/console/console.c index d5f25a5..e92dbf6 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -99,13 +99,15 @@ int console_tst_byte(void) #else // __PRE_RAM__ ^^^ NOT defined vvv defined +#include <uart.h> + void console_init(void) { #if CONFIG_USBDEBUG enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_SERIAL_CONSOLE && !CONFIG_CONSOLE_SERIAL8250MEM uart_init(); #endif #if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 383ba79..ddc46cf 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -16,6 +16,7 @@ source src/cpu/x86/Kconfig config CACHE_AS_RAM bool + select EARLY_SERIAL_CONSOLE default !ROMCC config DCACHE_RAM_BASE diff --git a/src/include/uart.h b/src/include/uart.h index 931d6dc..c592cfc 100644 --- a/src/include/uart.h +++ b/src/include/uart.h @@ -15,19 +15,20 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * FIXME(dhendrix): This file contains generic prototypes for UART functions. - * The existing headers are too specific to the 8250, so we need a better - * abstraction for use with non-8250 UARTs. */ +/* madness. Uarts are a mess. If you include this file, it + * includes ALL uart implementations which may be needed. + * No need to include them separately, and include this file FIRST. + * At least one (but at most one) of the files needs to define + * uart_init(). + */ #ifndef UART_H #define UART_H +#include <uart8250.h> unsigned char uart_rx_byte(void); void uart_tx_byte(unsigned char data); void uart_tx_flush(void); -void uart_init(void); - #endif /* UART_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h index b00ff48..9af43f2 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -120,7 +120,6 @@ unsigned char uart8250_rx_byte(unsigned base_port); int uart8250_can_rx_byte(unsigned base_port); void uart8250_tx_byte(unsigned base_port, unsigned char data); void uart8250_tx_flush(unsigned base_port); - /* Yes it is silly to have three different uart init functions. But we used to * have three different sets of uart code, so it's an improvement. */

1 0

Will coreboot work on 945G-M4 (NEC) // ECS 945G-NM uATX Motherboard
by ehaouas＠noos.fr 03 Jan '13

03 Jan '13

1 1

Patch set updated for coreboot: 7c00b43 make early serial console support more generic
by Ronald G. Minnich 03 Jan '13

03 Jan '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2086 -gerrit commit 7c00b43418ef421d946cc33a7afa50e1bc36cc70 Author: David Hendricks <dhendrix(a)chromium.org> Date: Mon Dec 31 17:28:43 2012 -0800 make early serial console support more generic This patch makes pre-RAM serial init more generic, particularly for platforms which do not necessarily need cache-as-RAM in order to use the serial console and do not have a standard 8250 serial port. This adds a Kconfig variable to set romstage-* for very early serial console init. The current method assumes that cache-as-RAM should enable this, so to maintain compatibility selecting CACHE_AS_RAM will also select EARLY_SERIAL_CONSOLE. Change-Id: I089e7af633c227baf3c06c685f005e9d0e4b38ce Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/console/Kconfig | 7 +++++++ src/console/Makefile.inc | 2 +- src/console/console.c | 4 +++- src/cpu/Kconfig | 1 + src/include/uart.h | 4 ---- src/include/uart8250.h | 1 - 6 files changed, 12 insertions(+), 7 deletions(-) diff --git a/src/console/Kconfig b/src/console/Kconfig index 117fdb8..a726c1f 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -5,6 +5,13 @@ config SERIAL_CONSOLE help Send coreboot debug output to a serial port +config EARLY_SERIAL_CONSOLE + bool + select SERIAL_CONSOLE + default n + help + Use serial console during early boot stages (e.g. cache-as-RAM) + config CONSOLE_SERIAL8250 bool "Serial port console output (I/O mapped, 8250-compatible)" depends on SERIAL_CONSOLE diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index a712486..3c4777f 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -10,7 +10,7 @@ smm-y += vtxprintf.c smm-$(CONFIG_SMM_TSEG) += die.c romstage-y += vtxprintf.c -romstage-$(CONFIG_CACHE_AS_RAM) += console.c +romstage-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c romstage-y += post.c romstage-y += die.c diff --git a/src/console/console.c b/src/console/console.c index d5f25a5..e92dbf6 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -99,13 +99,15 @@ int console_tst_byte(void) #else // __PRE_RAM__ ^^^ NOT defined vvv defined +#include <uart.h> + void console_init(void) { #if CONFIG_USBDEBUG enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_SERIAL_CONSOLE && !CONFIG_CONSOLE_SERIAL8250MEM uart_init(); #endif #if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 383ba79..ddc46cf 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -16,6 +16,7 @@ source src/cpu/x86/Kconfig config CACHE_AS_RAM bool + select EARLY_SERIAL_CONSOLE default !ROMCC config DCACHE_RAM_BASE diff --git a/src/include/uart.h b/src/include/uart.h index 931d6dc..ea371c4 100644 --- a/src/include/uart.h +++ b/src/include/uart.h @@ -15,10 +15,6 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * FIXME(dhendrix): This file contains generic prototypes for UART functions. - * The existing headers are too specific to the 8250, so we need a better - * abstraction for use with non-8250 UARTs. */ #ifndef UART_H diff --git a/src/include/uart8250.h b/src/include/uart8250.h index b00ff48..9af43f2 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -120,7 +120,6 @@ unsigned char uart8250_rx_byte(unsigned base_port); int uart8250_can_rx_byte(unsigned base_port); void uart8250_tx_byte(unsigned base_port, unsigned char data); void uart8250_tx_flush(unsigned base_port); - /* Yes it is silly to have three different uart init functions. But we used to * have three different sets of uart code, so it's an improvement. */

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coreboot January 2013