coreboot January 2013

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Patch set updated for coreboot: efe3afe ARMv7: drop libgcc copy
by Stefan Reinauer 04 Jan '13

04 Jan '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2102 -gerrit commit efe3afe4539917fa5620d0694db9fa1377e35973 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jan 4 12:10:28 2013 -0800 ARMv7: drop libgcc copy We accidently checked in some files from libgcc as well as a Makefile from u-boot and a duplicate implementation of div0. Drop all those files to reduce the confusion. Change-Id: I8ff6eabbced6f663813f8cc55f19c81839d03477 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/arch/armv7/lib/Makefile.inc | 1 - src/arch/armv7/lib/Makefile.uboot | 95 ----------------------- src/arch/armv7/lib/_divsi3.S | 142 ---------------------------------- src/arch/armv7/lib/_udivsi3.S | 93 ---------------------- src/arch/armv7/lib/_uldivmod.S | 157 -------------------------------------- src/arch/armv7/lib/div.c | 5 -- 6 files changed, 493 deletions(-) diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc index bdf6a64..d911341 100644 --- a/src/arch/armv7/lib/Makefile.inc +++ b/src/arch/armv7/lib/Makefile.inc @@ -11,7 +11,6 @@ romstage-y += syslib.c ramstage-y += c_start.S -#ramstage-y += div.c ramstage-y += div0.c ramstage-y += div64.S ramstage-y += hang_spl.c diff --git a/src/arch/armv7/lib/Makefile.uboot b/src/arch/armv7/lib/Makefile.uboot deleted file mode 100644 index d33d08b..0000000 --- a/src/arch/armv7/lib/Makefile.uboot +++ /dev/null @@ -1,95 +0,0 @@ -# -# (C) Copyright 2002-2006 -# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(ARCH).o -LIBGCC = $(obj)libgcc.o - -ifndef CONFIG_SPL_BUILD -GLSOBJS += _ashldi3.o -GLSOBJS += _ashrdi3.o -GLSOBJS += _divsi3.o -GLSOBJS += _lshrdi3.o -GLSOBJS += _modsi3.o -GLSOBJS += _udivsi3.o -GLSOBJS += _umodsi3.o -ifdef CONFIG_CHROMEOS -GLSOBJS += _uldivmod.o -endif - -GLCOBJS += div0.o - -ifeq ($(CONFIG_SYS_GENERIC_BOARD),) -COBJS-y += board.o -endif -COBJS-y += bootm.o -COBJS-y += cache.o -COBJS-y += cache-cp15.o -COBJS-$(CONFIG_SYS_L2_PL310) += cache-pl310.o -SOBJS-$(CONFIG_USE_ARCH_MEMSET) += memset.o -SOBJS-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o -else # CONFIG_SPL_BUILD -ifeq ($(CONFIG_SYS_GENERIC_BOARD),) -COBJS-y += hang_spl.o -endif -endif # CONFIG_SPL_BUILD - -COBJS-y += interrupts.o -COBJS-y += reset.o - -SRCS := $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \ - $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) -LGOBJS := $(addprefix $(obj),$(GLSOBJS)) \ - $(addprefix $(obj),$(GLCOBJS)) - -# Always build libarm.o -TARGETS := $(LIB) - -# Build private libgcc only when asked for -ifdef USE_PRIVATE_LIBGCC -TARGETS += $(LIBGCC) -endif - -# For EABI conformant tool chains, provide eabi_compat() -ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS))) -TARGETS += $(obj)eabi_compat.o -endif - -all: $(TARGETS) - -$(LIB): $(obj).depend $(OBJS) - $(call cmd_link_o_target, $(OBJS)) - -$(LIBGCC): $(obj).depend $(LGOBJS) - $(call cmd_link_o_target, $(LGOBJS)) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/src/arch/armv7/lib/_divsi3.S b/src/arch/armv7/lib/_divsi3.S deleted file mode 100644 index cfbadb2..0000000 --- a/src/arch/armv7/lib/_divsi3.S +++ /dev/null @@ -1,142 +0,0 @@ - -.macro ARM_DIV_BODY dividend, divisor, result, curbit - -#if __LINUX_ARM_ARCH__ >= 5 - - clz \curbit, \divisor - clz \result, \dividend - sub \result, \curbit, \result - mov \curbit, #1 - mov \divisor, \divisor, lsl \result - mov \curbit, \curbit, lsl \result - mov \result, #0 - -#else - - @ Initially shift the divisor left 3 bits if possible, - @ set curbit accordingly. This allows for curbit to be located - @ at the left end of each 4 bit nibbles in the division loop - @ to save one loop in most cases. - tst \divisor, #0xe0000000 - moveq \divisor, \divisor, lsl #3 - moveq \curbit, #8 - movne \curbit, #1 - - @ Unless the divisor is very big, shift it up in multiples of - @ four bits, since this is the amount of unwinding in the main - @ division loop. Continue shifting until the divisor is - @ larger than the dividend. -1: cmp \divisor, #0x10000000 - cmplo \divisor, \dividend - movlo \divisor, \divisor, lsl #4 - movlo \curbit, \curbit, lsl #4 - blo 1b - - @ For very big divisors, we must shift it a bit at a time, or - @ we will be in danger of overflowing. -1: cmp \divisor, #0x80000000 - cmplo \divisor, \dividend - movlo \divisor, \divisor, lsl #1 - movlo \curbit, \curbit, lsl #1 - blo 1b - - mov \result, #0 - -#endif - - @ Division loop -1: cmp \dividend, \divisor - subhs \dividend, \dividend, \divisor - orrhs \result, \result, \curbit - cmp \dividend, \divisor, lsr #1 - subhs \dividend, \dividend, \divisor, lsr #1 - orrhs \result, \result, \curbit, lsr #1 - cmp \dividend, \divisor, lsr #2 - subhs \dividend, \dividend, \divisor, lsr #2 - orrhs \result, \result, \curbit, lsr #2 - cmp \dividend, \divisor, lsr #3 - subhs \dividend, \dividend, \divisor, lsr #3 - orrhs \result, \result, \curbit, lsr #3 - cmp \dividend, #0 @ Early termination? - movnes \curbit, \curbit, lsr #4 @ No, any more bits to do? - movne \divisor, \divisor, lsr #4 - bne 1b - -.endm - -.macro ARM_DIV2_ORDER divisor, order - -#if __LINUX_ARM_ARCH__ >= 5 - - clz \order, \divisor - rsb \order, \order, #31 - -#else - - cmp \divisor, #(1 << 16) - movhs \divisor, \divisor, lsr #16 - movhs \order, #16 - movlo \order, #0 - - cmp \divisor, #(1 << 8) - movhs \divisor, \divisor, lsr #8 - addhs \order, \order, #8 - - cmp \divisor, #(1 << 4) - movhs \divisor, \divisor, lsr #4 - addhs \order, \order, #4 - - cmp \divisor, #(1 << 2) - addhi \order, \order, #3 - addls \order, \order, \divisor, lsr #1 - -#endif - -.endm - - .align 5 -.globl __divsi3 -.globl __aeabi_idiv -__divsi3: -__aeabi_idiv: - cmp r1, #0 - eor ip, r0, r1 @ save the sign of the result. - beq Ldiv0 - rsbmi r1, r1, #0 @ loops below use unsigned. - subs r2, r1, #1 @ division by 1 or -1 ? - beq 10f - movs r3, r0 - rsbmi r3, r0, #0 @ positive dividend value - cmp r3, r1 - bls 11f - tst r1, r2 @ divisor is power of 2 ? - beq 12f - - ARM_DIV_BODY r3, r1, r0, r2 - - cmp ip, #0 - rsbmi r0, r0, #0 - mov pc, lr - -10: teq ip, r0 @ same sign ? - rsbmi r0, r0, #0 - mov pc, lr - -11: movlo r0, #0 - moveq r0, ip, asr #31 - orreq r0, r0, #1 - mov pc, lr - -12: ARM_DIV2_ORDER r1, r2 - - cmp ip, #0 - mov r0, r3, lsr r2 - rsbmi r0, r0, #0 - mov pc, lr - -Ldiv0: - - str lr, [sp, #-4]! - bl __div0 - mov r0, #0 @ About as wrong as it could be. - ldr pc, [sp], #4 diff --git a/src/arch/armv7/lib/_udivsi3.S b/src/arch/armv7/lib/_udivsi3.S deleted file mode 100644 index 1309802..0000000 --- a/src/arch/armv7/lib/_udivsi3.S +++ /dev/null @@ -1,93 +0,0 @@ -/* # 1 "libgcc1.S" */ -@ libgcc1 routines for ARM cpu. -@ Division routines, written by Richard Earnshaw, (rearnsha(a)armltd.co.uk) -dividend .req r0 -divisor .req r1 -result .req r2 -curbit .req r3 -/* ip .req r12 */ -/* sp .req r13 */ -/* lr .req r14 */ -/* pc .req r15 */ - .text - .globl __udivsi3 - .type __udivsi3 ,function - .globl __aeabi_uidiv - .type __aeabi_uidiv ,function - .align 0 - __udivsi3: - __aeabi_uidiv: - cmp divisor, #0 - beq Ldiv0 - mov curbit, #1 - mov result, #0 - cmp dividend, divisor - bcc Lgot_result -Loop1: - @ Unless the divisor is very big, shift it up in multiples of - @ four bits, since this is the amount of unwinding in the main - @ division loop. Continue shifting until the divisor is - @ larger than the dividend. - cmp divisor, #0x10000000 - cmpcc divisor, dividend - movcc divisor, divisor, lsl #4 - movcc curbit, curbit, lsl #4 - bcc Loop1 -Lbignum: - @ For very big divisors, we must shift it a bit at a time, or - @ we will be in danger of overflowing. - cmp divisor, #0x80000000 - cmpcc divisor, dividend - movcc divisor, divisor, lsl #1 - movcc curbit, curbit, lsl #1 - bcc Lbignum -Loop3: - @ Test for possible subtractions, and note which bits - @ are done in the result. On the final pass, this may subtract - @ too much from the dividend, but the result will be ok, since the - @ "bit" will have been shifted out at the bottom. - cmp dividend, divisor - subcs dividend, dividend, divisor - orrcs result, result, curbit - cmp dividend, divisor, lsr #1 - subcs dividend, dividend, divisor, lsr #1 - orrcs result, result, curbit, lsr #1 - cmp dividend, divisor, lsr #2 - subcs dividend, dividend, divisor, lsr #2 - orrcs result, result, curbit, lsr #2 - cmp dividend, divisor, lsr #3 - subcs dividend, dividend, divisor, lsr #3 - orrcs result, result, curbit, lsr #3 - cmp dividend, #0 @ Early termination? - movnes curbit, curbit, lsr #4 @ No, any more bits to do? - movne divisor, divisor, lsr #4 - bne Loop3 -Lgot_result: - mov r0, result - mov pc, lr -Ldiv0: - str lr, [sp, #-4]! - bl __div0 (PLT) - mov r0, #0 @ about as wrong as it could be - ldmia sp!, {pc} - .size __udivsi3 , . - __udivsi3 - -.globl __aeabi_uidivmod -__aeabi_uidivmod: - - stmfd sp!, {r0, r1, ip, lr} - bl __aeabi_uidiv - ldmfd sp!, {r1, r2, ip, lr} - mul r3, r0, r2 - sub r1, r1, r3 - mov pc, lr - -.globl __aeabi_idivmod -__aeabi_idivmod: - - stmfd sp!, {r0, r1, ip, lr} - bl __aeabi_idiv - ldmfd sp!, {r1, r2, ip, lr} - mul r3, r0, r2 - sub r1, r1, r3 - mov pc, lr diff --git a/src/arch/armv7/lib/_uldivmod.S b/src/arch/armv7/lib/_uldivmod.S deleted file mode 100644 index 65e4fa8..0000000 --- a/src/arch/armv7/lib/_uldivmod.S +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Alternatively, this software may be distributed under the terms of the - * GNU General Public License ("GPL") version 2 as published by the Free - * Software Foundation. - */ - -/* - * A, Q = r0 + (r1 << 32) - * B, R = r2 + (r3 << 32) - * A / B = Q ... R - */ - - .text - .global __aeabi_uldivmod - .type __aeabi_uldivmod, function - .align 0 - -A_0 .req r0 -A_1 .req r1 -B_0 .req r2 -B_1 .req r3 -C_0 .req r4 -C_1 .req r5 -D_0 .req r6 -D_1 .req r7 - -Q_0 .req r0 -Q_1 .req r1 -R_0 .req r2 -R_1 .req r3 - -__aeabi_uldivmod: - stmfd sp!, {r4, r5, r6, r7, lr} - @ Test if B == 0 - orrs ip, B_0, B_1 @ Z set -> B == 0 - beq L_div_by_0 - @ Test if B is power of 2: (B & (B - 1)) == 0 - subs C_0, B_0, #1 - sbc C_1, B_1, #0 - tst C_0, B_0 - tsteq B_1, C_1 - beq L_pow2 - @ Test if A_1 == B_1 == 0 - orrs ip, A_1, B_1 - beq L_div_32_32 - -L_div_64_64: - mov C_0, #1 - mov C_1, #0 - @ D_0 = clz A - teq A_1, #0 - clz D_0, A_1 - clzeq ip, A_0 - addeq D_0, D_0, ip - @ D_1 = clz B - teq B_1, #0 - clz D_1, B_1 - clzeq ip, B_0 - addeq D_1, D_1, ip - @ if clz B - clz A > 0 - subs D_0, D_1, D_0 - bls L_done_shift - @ B <<= (clz B - clz A) - subs D_1, D_0, #32 - rsb ip, D_0, #32 - movmi B_1, B_1, lsl D_0 - orrmi B_1, B_1, B_0, lsr ip - movpl B_1, B_0, lsl D_1 - mov B_0, B_0, lsl D_0 - @ C = 1 << (clz B - clz A) - movmi C_1, C_1, lsl D_0 - orrmi C_1, C_1, C_0, lsr ip - movpl C_1, C_0, lsl D_1 - mov C_0, C_0, lsl D_0 -L_done_shift: - mov D_0, #0 - mov D_1, #0 - @ C: current bit; D: result -L_subtract: - @ if A >= B - cmp A_1, B_1 - cmpeq A_0, B_0 - bcc L_update - @ A -= B - subs A_0, A_0, B_0 - sbc A_1, A_1, B_1 - @ D |= C - orr D_0, D_0, C_0 - orr D_1, D_1, C_1 -L_update: - @ if A == 0: break - orrs ip, A_1, A_0 - beq L_exit - @ C >>= 1 - movs C_1, C_1, lsr #1 - movs C_0, C_0, rrx - @ if C == 0: break - orrs ip, C_1, C_0 - beq L_exit - @ B >>= 1 - movs B_1, B_1, lsr #1 - mov B_0, B_0, rrx - b L_subtract -L_exit: - @ Note: A, B & Q, R are aliases - mov R_0, A_0 - mov R_1, A_1 - mov Q_0, D_0 - mov Q_1, D_1 - ldmfd sp!, {r4, r5, r6, r7, pc} - -L_div_32_32: - @ Note: A_0 & r0 are aliases - @ Q_1 r1 - mov r1, B_0 - bl __aeabi_uidivmod - mov R_0, r1 - mov R_1, #0 - mov Q_1, #0 - ldmfd sp!, {r4, r5, r6, r7, pc} - -L_pow2: - @ Note: A, B and Q, R are aliases - @ R = A & (B - 1) - and C_0, A_0, C_0 - and C_1, A_1, C_1 - @ Q = A >> log2(B) - @ Note: B must not be 0 here! - clz D_0, B_0 - add D_1, D_0, #1 - rsbs D_0, D_0, #31 - bpl L_1 - clz D_0, B_1 - rsb D_0, D_0, #31 - mov A_0, A_1, lsr D_0 - add D_0, D_0, #32 -L_1: - movpl A_0, A_0, lsr D_0 - orrpl A_0, A_0, A_1, lsl D_1 - mov A_1, A_1, lsr D_0 - @ Mov back C to R - mov R_0, C_0 - mov R_1, C_1 - ldmfd sp!, {r4, r5, r6, r7, pc} - -L_div_by_0: - bl __div0 - @ As wrong as it could be - mov Q_0, #0 - mov Q_1, #0 - mov R_0, #0 - mov R_1, #0 - ldmfd sp!, {r4, r5, r6, r7, pc} diff --git a/src/arch/armv7/lib/div.c b/src/arch/armv7/lib/div.c deleted file mode 100644 index 03352dc..0000000 --- a/src/arch/armv7/lib/div.c +++ /dev/null @@ -1,5 +0,0 @@ -void __div0(void); // called from asm so no need for a prototype in a header -void __div0(void) -{ - // div by zero -}

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New patch to review for coreboot: 3cc3cc1 ARMv7: drop libgcc copy
by Stefan Reinauer 04 Jan '13

04 Jan '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2102 -gerrit commit 3cc3cc12e6d26ed8562ec63c253dd8ca624cea0f Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jan 4 12:10:28 2013 -0800 ARMv7: drop libgcc copy We accidently checked in some files from libgcc as well as a Makefile from u-boot and a duplicate implementation of div0. Drop all those files to reduce the confusion. Change-Id: I8ff6eabbced6f663813f8cc55f19c81839d03477 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/arch/armv7/lib/Makefile.inc | 1 - src/arch/armv7/lib/Makefile.uboot | 95 ----------------------- src/arch/armv7/lib/_divsi3.S | 142 ---------------------------------- src/arch/armv7/lib/_udivsi3.S | 93 ---------------------- src/arch/armv7/lib/_uldivmod.S | 157 -------------------------------------- src/arch/armv7/lib/div.c | 5 -- 6 files changed, 493 deletions(-) diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc index bdf6a64..d911341 100644 --- a/src/arch/armv7/lib/Makefile.inc +++ b/src/arch/armv7/lib/Makefile.inc @@ -11,7 +11,6 @@ romstage-y += syslib.c ramstage-y += c_start.S -#ramstage-y += div.c ramstage-y += div0.c ramstage-y += div64.S ramstage-y += hang_spl.c diff --git a/src/arch/armv7/lib/Makefile.uboot b/src/arch/armv7/lib/Makefile.uboot deleted file mode 100644 index d33d08b..0000000 --- a/src/arch/armv7/lib/Makefile.uboot +++ /dev/null @@ -1,95 +0,0 @@ -# -# (C) Copyright 2002-2006 -# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(ARCH).o -LIBGCC = $(obj)libgcc.o - -ifndef CONFIG_SPL_BUILD -GLSOBJS += _ashldi3.o -GLSOBJS += _ashrdi3.o -GLSOBJS += _divsi3.o -GLSOBJS += _lshrdi3.o -GLSOBJS += _modsi3.o -GLSOBJS += _udivsi3.o -GLSOBJS += _umodsi3.o -ifdef CONFIG_CHROMEOS -GLSOBJS += _uldivmod.o -endif - -GLCOBJS += div0.o - -ifeq ($(CONFIG_SYS_GENERIC_BOARD),) -COBJS-y += board.o -endif -COBJS-y += bootm.o -COBJS-y += cache.o -COBJS-y += cache-cp15.o -COBJS-$(CONFIG_SYS_L2_PL310) += cache-pl310.o -SOBJS-$(CONFIG_USE_ARCH_MEMSET) += memset.o -SOBJS-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o -else # CONFIG_SPL_BUILD -ifeq ($(CONFIG_SYS_GENERIC_BOARD),) -COBJS-y += hang_spl.o -endif -endif # CONFIG_SPL_BUILD - -COBJS-y += interrupts.o -COBJS-y += reset.o - -SRCS := $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \ - $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) -LGOBJS := $(addprefix $(obj),$(GLSOBJS)) \ - $(addprefix $(obj),$(GLCOBJS)) - -# Always build libarm.o -TARGETS := $(LIB) - -# Build private libgcc only when asked for -ifdef USE_PRIVATE_LIBGCC -TARGETS += $(LIBGCC) -endif - -# For EABI conformant tool chains, provide eabi_compat() -ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS))) -TARGETS += $(obj)eabi_compat.o -endif - -all: $(TARGETS) - -$(LIB): $(obj).depend $(OBJS) - $(call cmd_link_o_target, $(OBJS)) - -$(LIBGCC): $(obj).depend $(LGOBJS) - $(call cmd_link_o_target, $(LGOBJS)) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/src/arch/armv7/lib/_divsi3.S b/src/arch/armv7/lib/_divsi3.S deleted file mode 100644 index cfbadb2..0000000 --- a/src/arch/armv7/lib/_divsi3.S +++ /dev/null @@ -1,142 +0,0 @@ - -.macro ARM_DIV_BODY dividend, divisor, result, curbit - -#if __LINUX_ARM_ARCH__ >= 5 - - clz \curbit, \divisor - clz \result, \dividend - sub \result, \curbit, \result - mov \curbit, #1 - mov \divisor, \divisor, lsl \result - mov \curbit, \curbit, lsl \result - mov \result, #0 - -#else - - @ Initially shift the divisor left 3 bits if possible, - @ set curbit accordingly. This allows for curbit to be located - @ at the left end of each 4 bit nibbles in the division loop - @ to save one loop in most cases. - tst \divisor, #0xe0000000 - moveq \divisor, \divisor, lsl #3 - moveq \curbit, #8 - movne \curbit, #1 - - @ Unless the divisor is very big, shift it up in multiples of - @ four bits, since this is the amount of unwinding in the main - @ division loop. Continue shifting until the divisor is - @ larger than the dividend. -1: cmp \divisor, #0x10000000 - cmplo \divisor, \dividend - movlo \divisor, \divisor, lsl #4 - movlo \curbit, \curbit, lsl #4 - blo 1b - - @ For very big divisors, we must shift it a bit at a time, or - @ we will be in danger of overflowing. -1: cmp \divisor, #0x80000000 - cmplo \divisor, \dividend - movlo \divisor, \divisor, lsl #1 - movlo \curbit, \curbit, lsl #1 - blo 1b - - mov \result, #0 - -#endif - - @ Division loop -1: cmp \dividend, \divisor - subhs \dividend, \dividend, \divisor - orrhs \result, \result, \curbit - cmp \dividend, \divisor, lsr #1 - subhs \dividend, \dividend, \divisor, lsr #1 - orrhs \result, \result, \curbit, lsr #1 - cmp \dividend, \divisor, lsr #2 - subhs \dividend, \dividend, \divisor, lsr #2 - orrhs \result, \result, \curbit, lsr #2 - cmp \dividend, \divisor, lsr #3 - subhs \dividend, \dividend, \divisor, lsr #3 - orrhs \result, \result, \curbit, lsr #3 - cmp \dividend, #0 @ Early termination? - movnes \curbit, \curbit, lsr #4 @ No, any more bits to do? - movne \divisor, \divisor, lsr #4 - bne 1b - -.endm - -.macro ARM_DIV2_ORDER divisor, order - -#if __LINUX_ARM_ARCH__ >= 5 - - clz \order, \divisor - rsb \order, \order, #31 - -#else - - cmp \divisor, #(1 << 16) - movhs \divisor, \divisor, lsr #16 - movhs \order, #16 - movlo \order, #0 - - cmp \divisor, #(1 << 8) - movhs \divisor, \divisor, lsr #8 - addhs \order, \order, #8 - - cmp \divisor, #(1 << 4) - movhs \divisor, \divisor, lsr #4 - addhs \order, \order, #4 - - cmp \divisor, #(1 << 2) - addhi \order, \order, #3 - addls \order, \order, \divisor, lsr #1 - -#endif - -.endm - - .align 5 -.globl __divsi3 -.globl __aeabi_idiv -__divsi3: -__aeabi_idiv: - cmp r1, #0 - eor ip, r0, r1 @ save the sign of the result. - beq Ldiv0 - rsbmi r1, r1, #0 @ loops below use unsigned. - subs r2, r1, #1 @ division by 1 or -1 ? - beq 10f - movs r3, r0 - rsbmi r3, r0, #0 @ positive dividend value - cmp r3, r1 - bls 11f - tst r1, r2 @ divisor is power of 2 ? - beq 12f - - ARM_DIV_BODY r3, r1, r0, r2 - - cmp ip, #0 - rsbmi r0, r0, #0 - mov pc, lr - -10: teq ip, r0 @ same sign ? - rsbmi r0, r0, #0 - mov pc, lr - -11: movlo r0, #0 - moveq r0, ip, asr #31 - orreq r0, r0, #1 - mov pc, lr - -12: ARM_DIV2_ORDER r1, r2 - - cmp ip, #0 - mov r0, r3, lsr r2 - rsbmi r0, r0, #0 - mov pc, lr - -Ldiv0: - - str lr, [sp, #-4]! - bl __div0 - mov r0, #0 @ About as wrong as it could be. - ldr pc, [sp], #4 diff --git a/src/arch/armv7/lib/_udivsi3.S b/src/arch/armv7/lib/_udivsi3.S deleted file mode 100644 index 1309802..0000000 --- a/src/arch/armv7/lib/_udivsi3.S +++ /dev/null @@ -1,93 +0,0 @@ -/* # 1 "libgcc1.S" */ -@ libgcc1 routines for ARM cpu. -@ Division routines, written by Richard Earnshaw, (rearnsha(a)armltd.co.uk) -dividend .req r0 -divisor .req r1 -result .req r2 -curbit .req r3 -/* ip .req r12 */ -/* sp .req r13 */ -/* lr .req r14 */ -/* pc .req r15 */ - .text - .globl __udivsi3 - .type __udivsi3 ,function - .globl __aeabi_uidiv - .type __aeabi_uidiv ,function - .align 0 - __udivsi3: - __aeabi_uidiv: - cmp divisor, #0 - beq Ldiv0 - mov curbit, #1 - mov result, #0 - cmp dividend, divisor - bcc Lgot_result -Loop1: - @ Unless the divisor is very big, shift it up in multiples of - @ four bits, since this is the amount of unwinding in the main - @ division loop. Continue shifting until the divisor is - @ larger than the dividend. - cmp divisor, #0x10000000 - cmpcc divisor, dividend - movcc divisor, divisor, lsl #4 - movcc curbit, curbit, lsl #4 - bcc Loop1 -Lbignum: - @ For very big divisors, we must shift it a bit at a time, or - @ we will be in danger of overflowing. - cmp divisor, #0x80000000 - cmpcc divisor, dividend - movcc divisor, divisor, lsl #1 - movcc curbit, curbit, lsl #1 - bcc Lbignum -Loop3: - @ Test for possible subtractions, and note which bits - @ are done in the result. On the final pass, this may subtract - @ too much from the dividend, but the result will be ok, since the - @ "bit" will have been shifted out at the bottom. - cmp dividend, divisor - subcs dividend, dividend, divisor - orrcs result, result, curbit - cmp dividend, divisor, lsr #1 - subcs dividend, dividend, divisor, lsr #1 - orrcs result, result, curbit, lsr #1 - cmp dividend, divisor, lsr #2 - subcs dividend, dividend, divisor, lsr #2 - orrcs result, result, curbit, lsr #2 - cmp dividend, divisor, lsr #3 - subcs dividend, dividend, divisor, lsr #3 - orrcs result, result, curbit, lsr #3 - cmp dividend, #0 @ Early termination? - movnes curbit, curbit, lsr #4 @ No, any more bits to do? - movne divisor, divisor, lsr #4 - bne Loop3 -Lgot_result: - mov r0, result - mov pc, lr -Ldiv0: - str lr, [sp, #-4]! - bl __div0 (PLT) - mov r0, #0 @ about as wrong as it could be - ldmia sp!, {pc} - .size __udivsi3 , . - __udivsi3 - -.globl __aeabi_uidivmod -__aeabi_uidivmod: - - stmfd sp!, {r0, r1, ip, lr} - bl __aeabi_uidiv - ldmfd sp!, {r1, r2, ip, lr} - mul r3, r0, r2 - sub r1, r1, r3 - mov pc, lr - -.globl __aeabi_idivmod -__aeabi_idivmod: - - stmfd sp!, {r0, r1, ip, lr} - bl __aeabi_idiv - ldmfd sp!, {r1, r2, ip, lr} - mul r3, r0, r2 - sub r1, r1, r3 - mov pc, lr diff --git a/src/arch/armv7/lib/_uldivmod.S b/src/arch/armv7/lib/_uldivmod.S deleted file mode 100644 index 65e4fa8..0000000 --- a/src/arch/armv7/lib/_uldivmod.S +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Alternatively, this software may be distributed under the terms of the - * GNU General Public License ("GPL") version 2 as published by the Free - * Software Foundation. - */ - -/* - * A, Q = r0 + (r1 << 32) - * B, R = r2 + (r3 << 32) - * A / B = Q ... R - */ - - .text - .global __aeabi_uldivmod - .type __aeabi_uldivmod, function - .align 0 - -A_0 .req r0 -A_1 .req r1 -B_0 .req r2 -B_1 .req r3 -C_0 .req r4 -C_1 .req r5 -D_0 .req r6 -D_1 .req r7 - -Q_0 .req r0 -Q_1 .req r1 -R_0 .req r2 -R_1 .req r3 - -__aeabi_uldivmod: - stmfd sp!, {r4, r5, r6, r7, lr} - @ Test if B == 0 - orrs ip, B_0, B_1 @ Z set -> B == 0 - beq L_div_by_0 - @ Test if B is power of 2: (B & (B - 1)) == 0 - subs C_0, B_0, #1 - sbc C_1, B_1, #0 - tst C_0, B_0 - tsteq B_1, C_1 - beq L_pow2 - @ Test if A_1 == B_1 == 0 - orrs ip, A_1, B_1 - beq L_div_32_32 - -L_div_64_64: - mov C_0, #1 - mov C_1, #0 - @ D_0 = clz A - teq A_1, #0 - clz D_0, A_1 - clzeq ip, A_0 - addeq D_0, D_0, ip - @ D_1 = clz B - teq B_1, #0 - clz D_1, B_1 - clzeq ip, B_0 - addeq D_1, D_1, ip - @ if clz B - clz A > 0 - subs D_0, D_1, D_0 - bls L_done_shift - @ B <<= (clz B - clz A) - subs D_1, D_0, #32 - rsb ip, D_0, #32 - movmi B_1, B_1, lsl D_0 - orrmi B_1, B_1, B_0, lsr ip - movpl B_1, B_0, lsl D_1 - mov B_0, B_0, lsl D_0 - @ C = 1 << (clz B - clz A) - movmi C_1, C_1, lsl D_0 - orrmi C_1, C_1, C_0, lsr ip - movpl C_1, C_0, lsl D_1 - mov C_0, C_0, lsl D_0 -L_done_shift: - mov D_0, #0 - mov D_1, #0 - @ C: current bit; D: result -L_subtract: - @ if A >= B - cmp A_1, B_1 - cmpeq A_0, B_0 - bcc L_update - @ A -= B - subs A_0, A_0, B_0 - sbc A_1, A_1, B_1 - @ D |= C - orr D_0, D_0, C_0 - orr D_1, D_1, C_1 -L_update: - @ if A == 0: break - orrs ip, A_1, A_0 - beq L_exit - @ C >>= 1 - movs C_1, C_1, lsr #1 - movs C_0, C_0, rrx - @ if C == 0: break - orrs ip, C_1, C_0 - beq L_exit - @ B >>= 1 - movs B_1, B_1, lsr #1 - mov B_0, B_0, rrx - b L_subtract -L_exit: - @ Note: A, B & Q, R are aliases - mov R_0, A_0 - mov R_1, A_1 - mov Q_0, D_0 - mov Q_1, D_1 - ldmfd sp!, {r4, r5, r6, r7, pc} - -L_div_32_32: - @ Note: A_0 & r0 are aliases - @ Q_1 r1 - mov r1, B_0 - bl __aeabi_uidivmod - mov R_0, r1 - mov R_1, #0 - mov Q_1, #0 - ldmfd sp!, {r4, r5, r6, r7, pc} - -L_pow2: - @ Note: A, B and Q, R are aliases - @ R = A & (B - 1) - and C_0, A_0, C_0 - and C_1, A_1, C_1 - @ Q = A >> log2(B) - @ Note: B must not be 0 here! - clz D_0, B_0 - add D_1, D_0, #1 - rsbs D_0, D_0, #31 - bpl L_1 - clz D_0, B_1 - rsb D_0, D_0, #31 - mov A_0, A_1, lsr D_0 - add D_0, D_0, #32 -L_1: - movpl A_0, A_0, lsr D_0 - orrpl A_0, A_0, A_1, lsl D_1 - mov A_1, A_1, lsr D_0 - @ Mov back C to R - mov R_0, C_0 - mov R_1, C_1 - ldmfd sp!, {r4, r5, r6, r7, pc} - -L_div_by_0: - bl __div0 - @ As wrong as it could be - mov Q_0, #0 - mov Q_1, #0 - mov R_0, #0 - mov R_1, #0 - ldmfd sp!, {r4, r5, r6, r7, pc} diff --git a/src/arch/armv7/lib/div.c b/src/arch/armv7/lib/div.c deleted file mode 100644 index 03352dc..0000000 --- a/src/arch/armv7/lib/div.c +++ /dev/null @@ -1,5 +0,0 @@ -void __div0(void); // called from asm so no need for a prototype in a header -void __div0(void) -{ - // div by zero -}

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Patch set updated for coreboot: d63e5d5 armv7: invoke intermediate build rules
by Stefan Reinauer 04 Jan '13

04 Jan '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2095 -gerrit commit d63e5d5e12f8a8223cb4908afaaa6bf808f93079 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 2 17:48:49 2013 -0800 armv7: invoke intermediate build rules This adds $$(INTERMEDIATE) as a pre-requisite for coreboot.rom on armv7. It is modeled after the $(obj)/coreboot.rom rule for x86. Change-Id: I483a88035fa2288829b6e042e51ef932c8c4f23c Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 9e57244..301866c 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -58,7 +58,7 @@ $(obj)/coreboot.pre1: $(CBFSTOOL) mv $(obj)/coreboot.rom $@ endif -$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) +$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) @printf " CBFS $(subst $(obj)/,,$(@))\n" cp $(obj)/coreboot.pre $@.tmp if [ -f $(objcbfs)/coreboot_ap.elf ]; \

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Patch merged into coreboot/master: 31c3613 Clean up ARMv7 architecture Kconfig
by gerrit＠coreboot.org 04 Jan '13

04 Jan '13

the following patch was just integrated into master: commit 31c36137f9519380df0c92ce1a5d2949eb083b91 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jan 4 10:11:59 2013 -0800 Clean up ARMv7 architecture Kconfig There was a misuse of bool that would cause the dcache policy to not be set up correctly, but instead present options "y" and "n" in the Kconfig menu. Also, TINY_BOOTBLOCK was removed a while ago, everything is TINY_BOOTBLOCK now. Hence remove the option. Change-Id: I5c28ac828955c69614c7bdaf106f79db51e68723 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Reviewed-on: http://review.coreboot.org/2101 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Fri Jan 4 19:29:46 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Fri Jan 4 19:34:50 2013, giving +2 See http://review.coreboot.org/2101 for details. -gerrit

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Patch merged into coreboot/master: c4077d4 Make PCIe config options depend on PCIe support
by gerrit＠coreboot.org 04 Jan '13

04 Jan '13

the following patch was just integrated into master: commit c4077d44297c95100cc9eb19df1ab3b16261942f Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jan 4 10:07:28 2013 -0800 Make PCIe config options depend on PCIe support Change-Id: I42452a044dc75e35876fcea1736481e538eed663 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Reviewed-on: http://review.coreboot.org/2100 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Fri Jan 4 19:19:34 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Fri Jan 4 19:35:14 2013, giving +2 See http://review.coreboot.org/2100 for details. -gerrit

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New patch to review for coreboot: 555bf7d Clean up ARMv7 architecture Kconfig
by Stefan Reinauer 04 Jan '13

04 Jan '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2101 -gerrit commit 555bf7db826824c0166d613753ea77e794964968 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jan 4 10:11:59 2013 -0800 Clean up ARMv7 architecture Kconfig There was a misuse of bool that would cause the dcache policy to not be set up correctly, but instead present options "y" and "n" in the Kconfig menu. Also, TINY_BOOTBLOCK was removed a while ago, everything is TINY_BOOTBLOCK now. Hence remove the option. Change-Id: I5c28ac828955c69614c7bdaf106f79db51e68723 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/arch/armv7/Kconfig | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/arch/armv7/Kconfig b/src/arch/armv7/Kconfig index f92911d..65de2d5 100644 --- a/src/arch/armv7/Kconfig +++ b/src/arch/armv7/Kconfig @@ -34,7 +34,6 @@ config BOOTBLOCK_SOURCE config UPDATE_IMAGE bool "Update existing coreboot.rom image" default n - depends on TINY_BOOTBLOCK help If this option is enabled, no new coreboot.rom file is created. Instead it is expected that there already @@ -47,9 +46,11 @@ config BOOTBLOCK_SOC_INIT # FIXME: Should cache policy be set on a per-CPU basis? # FIXME(dhendrix): Stefan sayz to make a smart decision and not prompt the user. config ARM_DCACHE_POLICY_WRITEBACK - bool y + bool + default y config ARM_DCACHE_POLICY_WRITETHROUGH - bool n + bool + default n endmenu

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New patch to review for coreboot: 4bc29b5 Make PCIe config options depend on PCIe support
by Stefan Reinauer 04 Jan '13

04 Jan '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2100 -gerrit commit 4bc29b5e870a382723d23b5f52f1cfe77575f16f Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jan 4 10:07:28 2013 -0800 Make PCIe config options depend on PCIe support Change-Id: I42452a044dc75e35876fcea1736481e538eed663 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/device/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/device/Kconfig b/src/device/Kconfig index 849cc15..82583a4 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -212,6 +212,7 @@ config CARDBUS_PLUGIN_SUPPORT config PCIEXP_COMMON_CLOCK prompt "Enable PCIe Common Clock" bool + depends on PCIEXP_PLUGIN_SUPPORT default n help Detect and enable Common Clock on PCIe links. @@ -219,6 +220,7 @@ config PCIEXP_COMMON_CLOCK config PCIEXP_ASPM prompt "Enable PCIe ASPM" bool + depends on PCIEXP_PLUGIN_SUPPORT default n help Detect and enable ASPM on PCIe links.

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Patch set updated for coreboot: c6ba074 armv7: invoke intermediate build rules
by Stefan Reinauer 04 Jan '13

04 Jan '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2095 -gerrit commit c6ba0743b2bdf7c331d43161fd8178d3274dca47 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 2 17:48:49 2013 -0800 armv7: invoke intermediate build rules This adds $$(INTERMEDIATE) as a pre-requisite for coreboot.rom on armv7. It is modeled after the $(obj)/coreboot.rom rule for x86. Change-Id: I483a88035fa2288829b6e042e51ef932c8c4f23c Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 9e57244..301866c 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -58,7 +58,7 @@ $(obj)/coreboot.pre1: $(CBFSTOOL) mv $(obj)/coreboot.rom $@ endif -$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) +$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) @printf " CBFS $(subst $(obj)/,,$(@))\n" cp $(obj)/coreboot.pre $@.tmp if [ -f $(objcbfs)/coreboot_ap.elf ]; \

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Patch merged into coreboot/master: 9027845 rd890: clear IO-APIC before setup
by gerrit＠coreboot.org 03 Jan '13

03 Jan '13

the following patch was just integrated into master: commit 9027845d65e5e05a45894eb176070fd99e2e073c Author: Aladyshev Konstantin <aladyshev(a)nicevt.ru> Date: Tue Dec 18 22:44:01 2012 +0400 rd890: clear IO-APIC before setup Add function "clear_ioapic" before "setup_ioapic" for RD890 northbridge like it is done for SB700 and SB800 chipsets ("amd/cimx/sb{7,8}00"). No functionality change is noticed. Change-Id: I1fd87692d8bf35c166141c9b7a6a1e748c19a636 Signed-off-by: Aladyshev Konstantin <aladyshev(a)nicevt.ru> Reviewed-on: http://review.coreboot.org/2045 Tested-by: build bot (Jenkins) Reviewed-by: Zheng Bao <zheng.bao(a)amd.com> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Wed Dec 19 18:47:57 2012, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Thu Jan 3 23:45:08 2013, giving +2 Reviewed-By: Zheng Bao <zheng.bao(a)amd.com> at Wed Jan 2 11:13:36 2013, giving +1 See http://review.coreboot.org/2045 for details. -gerrit

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Patch merged into coreboot/master: 05cbce6 cbmem utility: Use mmap instead of fseek/fread
by gerrit＠coreboot.org 03 Jan '13

03 Jan '13

the following patch was just integrated into master: commit 05cbce672e4a41bc55fc09b65aacd0872a756a5b Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Thu Jan 3 14:30:33 2013 -0800 cbmem utility: Use mmap instead of fseek/fread The kernel on Ubuntu 12.04LTS does not allow to use fseek/fread to read the coreboot table at the end of memory but will instead abort cbmem with a "Bad Address" error. Whether that is a security feature (some variation of CONFIG_STRICT_DEVMEM) or a kernel bug is not yet clear, however using mmap works nicely. Change-Id: I796b4cd2096fcdcc65c1361ba990cd467f13877e Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Reviewed-on: http://review.coreboot.org/2097 Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Tested-by: build bot (Jenkins) Build-Tested: build bot (Jenkins) at Thu Jan 3 23:55:16 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Jan 3 23:53:35 2013, giving +2 See http://review.coreboot.org/2097 for details. -gerrit

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coreboot January 2013