coreboot January 2013

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Patch merged into coreboot/master: 2485df3 Flatten the tree
by gerrit＠coreboot.org 04 Jan '13

04 Jan '13

the following patch was just integrated into master: commit 2485df3897d4254cbec6fd24a768c38149c69a36 Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Fri Jan 4 13:50:00 2013 -0800 Flatten the tree It makes no sense to have directories with one file. Change-Id: I65ba93dda5e6a4bcc5a7cc049c1378ebf5d6abcd Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-on: http://review.coreboot.org/2105 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Build-Tested: build bot (Jenkins) at Fri Jan 4 23:11:14 2013, giving +1 Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Fri Jan 4 23:20:04 2013, giving +2 See http://review.coreboot.org/2105 for details. -gerrit

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New patch to review for coreboot: 3dd53c5 Make room for cbfs header in the build.
by Ronald G. Minnich 04 Jan '13

04 Jan '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2107 -gerrit commit 3dd53c550020bd0c85ba535ae59e70ff8b8399db Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Fri Jan 4 14:12:09 2013 -0800 Make room for cbfs header in the build. cbfstool can either blindly write the header at start of image + 16, or look for deadbeef (and skip badbeef) Change-Id: Iee7ed65170fdf96488d9740c1342305ff13e52de Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/arch/armv7/init.S | 24 ++++++------------------ 1 file changed, 6 insertions(+), 18 deletions(-) diff --git a/src/arch/armv7/init.S b/src/arch/armv7/init.S index 033637e..83e06c4 100644 --- a/src/arch/armv7/init.S +++ b/src/arch/armv7/init.S @@ -34,24 +34,12 @@ .globl _start _start: b reset - ldr pc, _undefined_instruction - ldr pc, _software_interrupt - ldr pc, _prefetch_abort - ldr pc, _data_abort - ldr pc, _not_used - ldr pc, _irq - ldr pc, _fiq -_undefined_instruction: .word _undefined_instruction -_software_interrupt: .word _software_interrupt -_prefetch_abort: .word _prefetch_abort -_data_abort: .word _data_abort -_not_used: .word _not_used -_irq: .word _irq -_fiq: .word _fiq -_pad: .word 0x12345678 /* now 16*4=64 */ - - .balignl 16,0xdeadbeef - + .balignl 16, 0xbadbeef + /* here is where cbfstool will put the cbfs master header */ +_cbfs: .word 0xdeadbeef, 0xdeadbeef, 0xdeadbeef, 0xdeadbeef + .word 0xdeadbeef, 0xdeadbeef, 0xdeadbeef, 0xdeadbeef + .word 0xdeadbeef, 0xdeadbeef, 0xdeadbeef, 0xdeadbeef + .word 0xdeadbeef, 0xdeadbeef, 0xdeadbeef, 0xdeadbeef reset: /* * set the cpu to SVC32 mode

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Patch merged into coreboot/master: fa60de9 Revert "armv7: pass bootblock offset from Kconfig into cbfstool"
by gerrit＠coreboot.org 04 Jan '13

04 Jan '13

the following patch was just integrated into master: commit fa60de996d7c9676cf219c90e3cff602e148468d Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Fri Jan 4 22:17:38 2013 +0100 Revert "armv7: pass bootblock offset from Kconfig into cbfstool" This reverts commit ec8d35fe911ab35a5f40fd5b452f5463857b244a We are almost certain that this is not necessary. Change-Id: I70e94f883be95655da00a0b127ed9ffd7c81c63b Reviewed-on: http://review.coreboot.org/2104 Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Tested-by: build bot (Jenkins) Build-Tested: build bot (Jenkins) at Fri Jan 4 22:39:52 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Fri Jan 4 22:18:39 2013, giving +2 See http://review.coreboot.org/2104 for details. -gerrit

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New patch to review for coreboot: a1ebc64 cbfstool: Fix warnings on OS X
by Stefan Reinauer 04 Jan '13

04 Jan '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2106 -gerrit commit a1ebc64f885b4ab0648e8743e994e8b835169ee5 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jan 4 13:51:36 2013 -0800 cbfstool: Fix warnings on OS X Most hton and noth functions are already available through the system headers we include on OS X, causing the compiler to warn about duplicate definitions. Change-Id: Id81852dfc028cf0c48155048c54d431436889c0e Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- util/cbfstool/common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/util/cbfstool/common.h b/util/cbfstool/common.h index b5258a3..853e529 100644 --- a/util/cbfstool/common.h +++ b/util/cbfstool/common.h @@ -22,8 +22,10 @@ #include <stdint.h> #include "swab.h" +#ifndef __APPLE__ #define ntohl(x) (host_bigendian?(x):swab32(x)) #define htonl(x) (host_bigendian?(x):swab32(x)) +#endif #define ntohll(x) (host_bigendian?(x):swab64(x)) #define htonll(x) (host_bigendian?(x):swab64(x))

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New patch to review for coreboot: 4106b20 Flatten the tree
by Ronald G. Minnich 04 Jan '13

04 Jan '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2105 -gerrit commit 4106b20b2ca84293812959c8a0aa45f15fe039c7 Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Fri Jan 4 13:50:00 2013 -0800 Flatten the tree It makes no sense to have directories with one file. Change-Id: I65ba93dda5e6a4bcc5a7cc049c1378ebf5d6abcd Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- src/arch/armv7/Makefile.inc | 2 +- src/arch/armv7/init.S | 94 +++++++++++++++++++++++++++++++++++++++++++++ src/arch/armv7/init/init.S | 94 --------------------------------------------- 3 files changed, 95 insertions(+), 95 deletions(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 9bca71c..5b29616 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -150,7 +150,7 @@ CFLAGS += \ CFLAGS += -D__KERNEL__ CFLAGS += -D__LINUX_ARM_ARCH__=7 -crt0s = $(src)/arch/armv7/init/init.S +crt0s = $(src)/arch/armv7/init.S ldscripts = ldscripts += $(src)/arch/armv7/romstage.ld diff --git a/src/arch/armv7/init.S b/src/arch/armv7/init.S new file mode 100644 index 0000000..033637e --- /dev/null +++ b/src/arch/armv7/init.S @@ -0,0 +1,94 @@ +/* + * Early initialization code for ARMv7 architecture. + * + * This file is based off of the OMAP3530/ARM Cortex start.S file from Das + * U-Boot, which itself got the file from armboot. + * + * Copyright (c) 2004 Texas Instruments <r-woodruff2(a)ti.com> + * Copyright (c) 2001 Marius Gröger <mag(a)sysgo.de> + * Copyright (c) 2002 Alex Züpke <azu(a)sysgo.de> + * Copyright (c) 2002 Gary Jennejohn <garyj(a)denx.de> + * Copyright (c) 2003 Richard Woodruff <r-woodruff2(a)ti.com> + * Copyright (c) 2003 Kshitij <kshitij(a)ti.com> + * Copyright (c) 2006-2008 Syed Mohammed Khasim <x0khasim(a)ti.com> + * Copyright (c) 2013 The Chromium OS Authors + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define __ASSEMBLY__ +#include <system.h> + +.globl _start +_start: b reset + ldr pc, _undefined_instruction + ldr pc, _software_interrupt + ldr pc, _prefetch_abort + ldr pc, _data_abort + ldr pc, _not_used + ldr pc, _irq + ldr pc, _fiq +_undefined_instruction: .word _undefined_instruction +_software_interrupt: .word _software_interrupt +_prefetch_abort: .word _prefetch_abort +_data_abort: .word _data_abort +_not_used: .word _not_used +_irq: .word _irq +_fiq: .word _fiq +_pad: .word 0x12345678 /* now 16*4=64 */ + + .balignl 16,0xdeadbeef + +reset: + /* + * set the cpu to SVC32 mode + */ + mrs r0, cpsr + bic r0, r0, #0x1f + orr r0, r0, #0xd3 + msr cpsr,r0 + + /* + * From Cortex-A Series Programmer's Guide: + * Only CPU 0 performs initialization. Other CPUs go into WFI + * to do this, first work out which CPU this is + * this code typically is run before any other initialization step + */ + mrc p15, 0, r1, c0, c0, 5 @ Read Multiprocessor Affinity Register + and r1, r1, #0x3 @ Extract CPU ID bits + cmp r1, #0 + bne wait_for_interrupt @ If this is not core0, wait + + /* Set V=0 in CP15 SCTRL register - for VBAR to point to vector */ + mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTRL Register + bic r0, #CR_V @ V = 0 + mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTRL Register + + /* Set vector address in CP15 VBAR register */ + ldr r0, =_start + mcr p15, 0, r0, c12, c0, 0 @Set VBAR + +/* Set stackpointer in internal RAM to call board_init_f */ +call_board_init_f: + ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + mov sp, r0 + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ + ldr r0,=0x00000000 + bl board_init_f + +wait_for_interrupt: + wfi + mov pc, lr @ back to my caller diff --git a/src/arch/armv7/init/init.S b/src/arch/armv7/init/init.S deleted file mode 100644 index 033637e..0000000 --- a/src/arch/armv7/init/init.S +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Early initialization code for ARMv7 architecture. - * - * This file is based off of the OMAP3530/ARM Cortex start.S file from Das - * U-Boot, which itself got the file from armboot. - * - * Copyright (c) 2004 Texas Instruments <r-woodruff2(a)ti.com> - * Copyright (c) 2001 Marius Gröger <mag(a)sysgo.de> - * Copyright (c) 2002 Alex Züpke <azu(a)sysgo.de> - * Copyright (c) 2002 Gary Jennejohn <garyj(a)denx.de> - * Copyright (c) 2003 Richard Woodruff <r-woodruff2(a)ti.com> - * Copyright (c) 2003 Kshitij <kshitij(a)ti.com> - * Copyright (c) 2006-2008 Syed Mohammed Khasim <x0khasim(a)ti.com> - * Copyright (c) 2013 The Chromium OS Authors - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#define __ASSEMBLY__ -#include <system.h> - -.globl _start -_start: b reset - ldr pc, _undefined_instruction - ldr pc, _software_interrupt - ldr pc, _prefetch_abort - ldr pc, _data_abort - ldr pc, _not_used - ldr pc, _irq - ldr pc, _fiq -_undefined_instruction: .word _undefined_instruction -_software_interrupt: .word _software_interrupt -_prefetch_abort: .word _prefetch_abort -_data_abort: .word _data_abort -_not_used: .word _not_used -_irq: .word _irq -_fiq: .word _fiq -_pad: .word 0x12345678 /* now 16*4=64 */ - - .balignl 16,0xdeadbeef - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0, cpsr - bic r0, r0, #0x1f - orr r0, r0, #0xd3 - msr cpsr,r0 - - /* - * From Cortex-A Series Programmer's Guide: - * Only CPU 0 performs initialization. Other CPUs go into WFI - * to do this, first work out which CPU this is - * this code typically is run before any other initialization step - */ - mrc p15, 0, r1, c0, c0, 5 @ Read Multiprocessor Affinity Register - and r1, r1, #0x3 @ Extract CPU ID bits - cmp r1, #0 - bne wait_for_interrupt @ If this is not core0, wait - - /* Set V=0 in CP15 SCTRL register - for VBAR to point to vector */ - mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTRL Register - bic r0, #CR_V @ V = 0 - mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTRL Register - - /* Set vector address in CP15 VBAR register */ - ldr r0, =_start - mcr p15, 0, r0, c12, c0, 0 @Set VBAR - -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - mov sp, r0 - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - bl board_init_f - -wait_for_interrupt: - wfi - mov pc, lr @ back to my caller

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New patch to review for coreboot: 8cec335 Revert "armv7: pass bootblock offset from Kconfig into cbfstool"
by Ronald G. Minnich 04 Jan '13

04 Jan '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2104 -gerrit commit 8cec3356101932a414ea87bce317107f8f65675f Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Fri Jan 4 22:17:38 2013 +0100 Revert "armv7: pass bootblock offset from Kconfig into cbfstool" This reverts commit ec8d35fe911ab35a5f40fd5b452f5463857b244a We are almost certain that this is not necessary. Change-Id: I70e94f883be95655da00a0b127ed9ffd7c81c63b --- src/arch/armv7/Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 245cd8a..1a1271f 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -49,7 +49,7 @@ prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file))) $(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $(CBFSTOOL) $@.tmp create -m armv7 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \ -B $(objcbfs)/bootblock.bin -a 64 \ - -o $(CONFIG_BOOTBLOCK_OFFSET) + -o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) )) $(prebuild-files) true mv $@.tmp $@ else

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Patch merged into coreboot/master: 853f469 ARMv7: Make ABI compatible to reference toolchain
by gerrit＠coreboot.org 04 Jan '13

04 Jan '13

the following patch was just integrated into master: commit 853f4698a8ef9366178b83b0c42a3f662dc45c95 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jan 4 12:19:23 2013 -0800 ARMv7: Make ABI compatible to reference toolchain Our reference toolchain uses -mabi=aapcs whereas we started forcing -mabi=aapcs-linux. Drop this to prevent ABI incompatibility. Also drop -fno-common since that's set in the top level Makefile.inc already. Change-Id: I4afdcf5da9a5d86c2f9e5de5c7d523ccd2f5f1e0 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Reviewed-on: http://review.coreboot.org/2103 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Fri Jan 4 21:55:31 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Fri Jan 4 22:14:19 2013, giving +2 See http://review.coreboot.org/2103 for details. -gerrit

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Patch merged into coreboot/master: 3a8badc ARMv7: drop libgcc copy
by gerrit＠coreboot.org 04 Jan '13

04 Jan '13

the following patch was just integrated into master: commit 3a8badc26519cd900d4f01c87c212973a1aea00c Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jan 4 12:10:28 2013 -0800 ARMv7: drop libgcc copy We accidently checked in some files from libgcc as well as a Makefile from u-boot and a duplicate implementation of div0. Drop all those files to reduce the confusion. Change-Id: I8ff6eabbced6f663813f8cc55f19c81839d03477 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Reviewed-on: http://review.coreboot.org/2102 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Fri Jan 4 21:37:57 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Fri Jan 4 22:13:43 2013, giving +2 See http://review.coreboot.org/2102 for details. -gerrit

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New patch to review for coreboot: 516ec9f ARMv7: Make ABI compatible to reference toolchain
by Stefan Reinauer 04 Jan '13

04 Jan '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2103 -gerrit commit 516ec9fc1c6ab825b2301b6f75b602f1b83d8539 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jan 4 12:19:23 2013 -0800 ARMv7: Make ABI compatible to reference toolchain Our reference toolchain uses -mabi=aapcs whereas we started forcing -mabi=aapcs-linux. Drop this to prevent ABI incompatibility. Also drop -fno-common since that's set in the top level Makefile.inc already. Change-Id: I4afdcf5da9a5d86c2f9e5de5c7d523ccd2f5f1e0 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/arch/armv7/Makefile.inc | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 9e57244..9bca71c 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -139,9 +139,7 @@ endif # done CFLAGS += \ - -fno-common\ -ffixed-r8\ - -mabi=aapcs-linux\ -march=armv7-a\ -marm\ -mno-unaligned-access\

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Patch set updated for coreboot: 6d2a96a armv7: invoke intermediate build rules
by Stefan Reinauer 04 Jan '13

04 Jan '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2095 -gerrit commit 6d2a96a7fc49be322082be8c46dfdfcbe55a8f53 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 2 17:48:49 2013 -0800 armv7: invoke intermediate build rules This adds $$(INTERMEDIATE) as a pre-requisite for coreboot.rom on armv7. It is modeled after the $(obj)/coreboot.rom rule for x86. Change-Id: I483a88035fa2288829b6e042e51ef932c8c4f23c Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 9bca71c..7b6a120 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -58,7 +58,7 @@ $(obj)/coreboot.pre1: $(CBFSTOOL) mv $(obj)/coreboot.rom $@ endif -$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) +$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) @printf " CBFS $(subst $(obj)/,,$(@))\n" cp $(obj)/coreboot.pre $@.tmp if [ -f $(objcbfs)/coreboot_ap.elf ]; \

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coreboot January 2013