coreboot January 2013

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Patch set updated for coreboot: a2a7360 exynos5250: un-comment a lot of code which was left out earlier
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2126 -gerrit commit a2a73605a99753f2da054e5014e554a2c7422f9b Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 17:42:02 2013 -0800 exynos5250: un-comment a lot of code which was left out earlier Turns out initializing power rails is necessary, even for getting serial output. Change-Id: I3042c1001ae43b1e793ee6cb90bb79b8db0f8fd1 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5250/power.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/src/cpu/samsung/exynos5250/power.c b/src/cpu/samsung/exynos5250/power.c index 7d294ed..7c61655 100644 --- a/src/cpu/samsung/exynos5250/power.c +++ b/src/cpu/samsung/exynos5250/power.c @@ -31,6 +31,9 @@ #include <cpu/samsung/exynos5-common/spl.h> #include <drivers/maxim/max77686/max77686.h> +#include "device/i2c.h" +#include "cpu/samsung/s5p-common/s3c24x0_i2c.h" + static void ps_hold_setup(void) { struct exynos5_power *power = @@ -138,21 +141,16 @@ int power_init(void) { int error = 0; - /* FIXME(dhendrix): not necessary for initial bringup... */ -#if 0 -#ifdef CONFIG_SPL_BUILD - struct spl_machine_param *param = spl_get_machine_params(); - + /* + * FIXME(dhendrix): We will re-factor the caller of power_init() + * to start from a board-specific romstage file and do the i2c + * early setup. There is no reason CPU power init code should + * mess with board-specific i2c parameters. + */ /* Set the i2c register address base so i2c works before FDT */ - i2c_set_early_reg(param->i2c_base); -#endif -#endif + i2c_set_early_reg(0x12c60000); ps_hold_setup(); - - /* FIXME(dhendrix): not necessary for initial bringup... */ -#if 0 - /* init the i2c so that we can program pmic chip */ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); /* @@ -183,9 +181,10 @@ int power_init(void) REG_ENABLE, MAX77686_MV); error |= max77686_volsetting(PMIC_LDO10, CONFIG_VDD_LDO10_MV, REG_ENABLE, MAX77686_MV); -#endif - if (error != 0) + if (error != 0) { + power_shutdown(); printk(BIOS_ERR, "power init failed\n"); + } return error; }

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Patch set updated for coreboot: 34c2a87 size optimizations for max77686
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2124 -gerrit commit 34c2a874f5382009450d6c51dfe26df10560db29 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 16:26:26 2013 -0800 size optimizations for max77686 This contains some size optimizations for the Maxim MAX77686 driver: - change max77686_para.vol_{min,div} from u32 to u16 (currently their max value is 50000 so it should be fine) - remove max77686_para.regnum which takes 4 bytes for each and is not used (Patch was originally written by Hung-Te Lin, I'm just uploading it) Change-Id: I24044427c49467e99380d1f60ebc59e69c285b22 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/drivers/maxim/max77686/max77686.c | 88 ++++++++++++++++++----------------- src/drivers/maxim/max77686/max77686.h | 5 +- 2 files changed, 47 insertions(+), 46 deletions(-) diff --git a/src/drivers/maxim/max77686/max77686.c b/src/drivers/maxim/max77686/max77686.c index 8fbcb8f..16fa7f5 100644 --- a/src/drivers/maxim/max77686/max77686.c +++ b/src/drivers/maxim/max77686/max77686.c @@ -21,9 +21,12 @@ * MA 02111-1307 USA */ +#include <arch/io.h> #include <common.h> -#include <smbus.h> -#include <max77686.h> +//#include <smbus.h> +#include <device/i2c.h> + +#include "max77686.h" /* Chip register numbers (not exported from this module) */ enum { @@ -39,45 +42,45 @@ enum { * Max77686 parameters values * see max77686.h for parameters details */ -struct max77686_para max77686_param[] = {/*{regnum, vol_addr, vol_bitpos, +struct max77686_para max77686_param[] = {/*{vol_addr, vol_bitpos, vol_bitmask, reg_enaddr, reg_enbitpos, reg_enbitmask, reg_enbiton, reg_enbitoff, vol_min, vol_div}*/ - {PMIC_BUCK1, 0x11, 0x0, 0x3F, 0x10, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {PMIC_BUCK2, 0x14, 0x0, 0xFF, 0x12, 0x4, 0x3, 0x1, 0x0, 600, 12500}, - {PMIC_BUCK3, 0x1E, 0x0, 0xFF, 0x1C, 0x4, 0x3, 0x1, 0x0, 600, 12500}, - {PMIC_BUCK4, 0x28, 0x0, 0xFF, 0x26, 0x4, 0x3, 0x1, 0x0, 600, 12500}, - {PMIC_BUCK5, 0x31, 0x0, 0x3F, 0x30, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {PMIC_BUCK6, 0x33, 0x0, 0x3F, 0x32, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {PMIC_BUCK7, 0x35, 0x0, 0x3F, 0x34, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {PMIC_BUCK8, 0x37, 0x0, 0x3F, 0x36, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {PMIC_BUCK9, 0x39, 0x0, 0x3F, 0x38, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {PMIC_LDO1, 0x40, 0x0, 0x3F, 0x40, 0x6, 0x3, 0x3, 0x0, 800, 25000}, - {PMIC_LDO2, 0x41, 0x0, 0x3F, 0x41, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {PMIC_LDO3, 0x42, 0x0, 0x3F, 0x42, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO4, 0x43, 0x0, 0x3F, 0x43, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO5, 0x44, 0x0, 0x3F, 0x44, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO6, 0x45, 0x0, 0x3F, 0x45, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {PMIC_LDO7, 0x46, 0x0, 0x3F, 0x46, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {PMIC_LDO8, 0x47, 0x0, 0x3F, 0x47, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {PMIC_LDO9, 0x48, 0x0, 0x3F, 0x48, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO10, 0x49, 0x0, 0x3F, 0x49, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {PMIC_LDO11, 0x4A, 0x0, 0x3F, 0x4A, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {PMIC_LDO12, 0x4B, 0x0, 0x3F, 0x4B, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {PMIC_LDO13, 0x4C, 0x0, 0x3F, 0x4C, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO14, 0x4D, 0x0, 0x3F, 0x4D, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {PMIC_LDO15, 0x4E, 0x0, 0x3F, 0x4E, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {PMIC_LDO16, 0x4F, 0x0, 0x3F, 0x4F, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {PMIC_LDO17, 0x50, 0x0, 0x3F, 0x50, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO18, 0x51, 0x0, 0x3F, 0x51, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO19, 0x52, 0x0, 0x3F, 0x52, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO20, 0x53, 0x0, 0x3F, 0x53, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO21, 0x54, 0x0, 0x3F, 0x54, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO22, 0x55, 0x0, 0x3F, 0x55, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO23, 0x56, 0x0, 0x3F, 0x56, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO24, 0x57, 0x0, 0x3F, 0x57, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO25, 0x58, 0x0, 0x3F, 0x58, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO26, 0x59, 0x0, 0x3F, 0x59, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_EN32KHZ_CP, 0x0, 0x0, 0x0, 0x7F, 0x1, 0x1, 0x1, 0x0, 0x0, 0x0}, + {/* PMIC_BUCK1 */ 0x11, 0x0, 0x3F, 0x10, 0x0, 0x3, 0x3, 0x0, 750, 50000}, + {/* PMIC_BUCK2 */ 0x14, 0x0, 0xFF, 0x12, 0x4, 0x3, 0x1, 0x0, 600, 12500}, + {/* PMIC_BUCK3 */ 0x1E, 0x0, 0xFF, 0x1C, 0x4, 0x3, 0x1, 0x0, 600, 12500}, + {/* PMIC_BUCK4 */ 0x28, 0x0, 0xFF, 0x26, 0x4, 0x3, 0x1, 0x0, 600, 12500}, + {/* PMIC_BUCK5 */ 0x31, 0x0, 0x3F, 0x30, 0x0, 0x3, 0x3, 0x0, 750, 50000}, + {/* PMIC_BUCK6 */ 0x33, 0x0, 0x3F, 0x32, 0x0, 0x3, 0x3, 0x0, 750, 50000}, + {/* PMIC_BUCK7 */ 0x35, 0x0, 0x3F, 0x34, 0x0, 0x3, 0x3, 0x0, 750, 50000}, + {/* PMIC_BUCK8 */ 0x37, 0x0, 0x3F, 0x36, 0x0, 0x3, 0x3, 0x0, 750, 50000}, + {/* PMIC_BUCK9 */ 0x39, 0x0, 0x3F, 0x38, 0x0, 0x3, 0x3, 0x0, 750, 50000}, + {/* PMIC_LDO1 */ 0x40, 0x0, 0x3F, 0x40, 0x6, 0x3, 0x3, 0x0, 800, 25000}, + {/* PMIC_LDO2 */ 0x41, 0x0, 0x3F, 0x41, 0x6, 0x3, 0x1, 0x0, 800, 25000}, + {/* PMIC_LDO3 */ 0x42, 0x0, 0x3F, 0x42, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO4 */ 0x43, 0x0, 0x3F, 0x43, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO5 */ 0x44, 0x0, 0x3F, 0x44, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO6 */ 0x45, 0x0, 0x3F, 0x45, 0x6, 0x3, 0x1, 0x0, 800, 25000}, + {/* PMIC_LDO7 */ 0x46, 0x0, 0x3F, 0x46, 0x6, 0x3, 0x1, 0x0, 800, 25000}, + {/* PMIC_LDO8 */ 0x47, 0x0, 0x3F, 0x47, 0x6, 0x3, 0x1, 0x0, 800, 25000}, + {/* PMIC_LDO9 */ 0x48, 0x0, 0x3F, 0x48, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO10 */ 0x49, 0x0, 0x3F, 0x49, 0x6, 0x3, 0x1, 0x0, 800, 50000}, + {/* PMIC_LDO11 */ 0x4A, 0x0, 0x3F, 0x4A, 0x6, 0x3, 0x1, 0x0, 800, 50000}, + {/* PMIC_LDO12 */ 0x4B, 0x0, 0x3F, 0x4B, 0x6, 0x3, 0x1, 0x0, 800, 50000}, + {/* PMIC_LDO13 */ 0x4C, 0x0, 0x3F, 0x4C, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO14 */ 0x4D, 0x0, 0x3F, 0x4D, 0x6, 0x3, 0x1, 0x0, 800, 50000}, + {/* PMIC_LDO15 */ 0x4E, 0x0, 0x3F, 0x4E, 0x6, 0x3, 0x1, 0x0, 800, 25000}, + {/* PMIC_LDO16 */ 0x4F, 0x0, 0x3F, 0x4F, 0x6, 0x3, 0x1, 0x0, 800, 50000}, + {/* PMIC_LDO17 */ 0x50, 0x0, 0x3F, 0x50, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO18 */ 0x51, 0x0, 0x3F, 0x51, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO19 */ 0x52, 0x0, 0x3F, 0x52, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO20 */ 0x53, 0x0, 0x3F, 0x53, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO21 */ 0x54, 0x0, 0x3F, 0x54, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO22 */ 0x55, 0x0, 0x3F, 0x55, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO23 */ 0x56, 0x0, 0x3F, 0x56, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO24 */ 0x57, 0x0, 0x3F, 0x57, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO25 */ 0x58, 0x0, 0x3F, 0x58, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO26 */ 0x59, 0x0, 0x3F, 0x59, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_EN32KHZ_CP */ 0x0, 0x0, 0x0, 0x7F, 0x1, 0x1, 0x1, 0x0, 0x0, 0x0}, }; /* @@ -174,15 +177,15 @@ static int max77686_do_volsetting(enum max77686_regnum reg, unsigned int volt, } if (volt_units == MAX77686_UV) - vol_level = volt - pmic->vol_min * 1000; + vol_level = volt - (u32)pmic->vol_min * 1000; else - vol_level = (volt - pmic->vol_min) * 1000; + vol_level = (volt - (u32)pmic->vol_min) * 1000; if (vol_level < 0) { debug("Not a valid voltage level to set\n"); return -1; } - vol_level /= pmic->vol_div; + vol_level /= (u32)pmic->vol_div; clrsetbits_8(&read_data, pmic->vol_bitmask << pmic->vol_bitpos, vol_level << pmic->vol_bitpos); @@ -198,7 +201,6 @@ static int max77686_do_volsetting(enum max77686_regnum reg, unsigned int volt, debug("Failed to enable buck/ldo.\n"); return -1; } - return 0; } diff --git a/src/drivers/maxim/max77686/max77686.h b/src/drivers/maxim/max77686/max77686.h index 345471e..ee53e27 100644 --- a/src/drivers/maxim/max77686/max77686.h +++ b/src/drivers/maxim/max77686/max77686.h @@ -77,7 +77,6 @@ enum max77686_regnum { * @param vol_div voltage division value of given buck/ldo */ struct max77686_para { - enum max77686_regnum regnum; u8 vol_addr; u8 vol_bitpos; u8 vol_bitmask; @@ -86,8 +85,8 @@ struct max77686_para { u8 reg_enbitmask; u8 reg_enbiton; u8 reg_enbitoff; - u32 vol_min; - u32 vol_div; + u16 vol_min; + u16 vol_div; }; /* I2C device address for pmic max77686 */

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Re: [coreboot] Permanent solution of the UEFI Secure Boot problem?!
by Peter Stuge 10 Jan '13

10 Jan '13

Svetoslav Trochev wrote: > In my experience 10 people buying same laptop will have zero > impact, but 1 person buying 10 laptops gets notice right away, > especially if the order is placed with small OEM. .. > What do you guys think? I think your numbers are off by four or five orders of magnitude. //Peter

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New patch to review for coreboot: 085bfb1 exynos5250: clean-ups for clock_init
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2127 -gerrit commit 085bfb17120cfb001cf949d3fba593908bd9e4ac Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 18:06:41 2013 -0800 exynos5250: clean-ups for clock_init This does some clean-up for the exynos5250 clock_init.c: - No global data. - Remove some unused #includes - Hard-code the memory type for Elpida DRAM. This will need to be fixed eventually (or the system will be unstable), but is good enough for early bring-up and until we finish other re-factoring. Change-Id: Icd2cf8ba35058cbd1131666db311dfb77ef1a160 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5250/clock_init.c | 27 ++++++++------------------- 1 file changed, 8 insertions(+), 19 deletions(-) diff --git a/src/cpu/samsung/exynos5250/clock_init.c b/src/cpu/samsung/exynos5250/clock_init.c index fd2a90f..ea91bb4 100644 --- a/src/cpu/samsung/exynos5250/clock_init.c +++ b/src/cpu/samsung/exynos5250/clock_init.c @@ -22,18 +22,6 @@ * MA 02111-1307 USA */ -#if 0 -#include <common.h> -#include <config.h> -//#include <fdtdec.h> -#include <arch/io.h> -#include <asm/arch/board.h> -#include <asm/arch/clk.h> -#include <asm/arch/clock.h> -#include <cpu/samsung/exynos5250/cpu.h> -#include <asm/arch/gpio.h> -#include <asm/arch-exynos/spl.h> -#endif #include <delay.h> #include <stdlib.h> #include <types.h> @@ -51,8 +39,6 @@ #include "clock_init.h" #include "setup.h" -//DECLARE_GLOBAL_DATA_PTR; - struct arm_clk_ratios arm_clk_ratios[] = { { .arm_freq_mhz = 600, @@ -585,10 +571,16 @@ struct mem_timings mem_timings[] = { */ #define BOARD_REV_ELPIDA_MEMORY 3 #define BOARD_REV_SAMSUNG_MEMORY 4 + +static inline int board_get_revision(void) +{ + /* FIXME: yuck! */ + return BOARD_REV_ELPIDA_MEMORY; +} + static int autodetect_memory(void) { -// int board_rev = board_get_revision(); - int board_rev = BOARD_REV_ELPIDA_MEMORY; + int board_rev = board_get_revision(); if (board_rev == -1) return -1; @@ -749,9 +741,6 @@ struct mem_timings *clock_get_mem_timings(void) return mem; } } - /* TODO: Call panic() here */ - while (1) - ; return NULL; }

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New patch to review for coreboot: 2b4d1a5 exynos5250: un-comment a lot of code which was left out earlier
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2126 -gerrit commit 2b4d1a5b22ef505979c1e9f6b414239cabd4c996 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 17:42:02 2013 -0800 exynos5250: un-comment a lot of code which was left out earlier Turns out initializing power rails is necessary, even for getting serial output. Change-Id: I3042c1001ae43b1e793ee6cb90bb79b8db0f8fd1 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5250/power.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/src/cpu/samsung/exynos5250/power.c b/src/cpu/samsung/exynos5250/power.c index 7d294ed..7c61655 100644 --- a/src/cpu/samsung/exynos5250/power.c +++ b/src/cpu/samsung/exynos5250/power.c @@ -31,6 +31,9 @@ #include <cpu/samsung/exynos5-common/spl.h> #include <drivers/maxim/max77686/max77686.h> +#include "device/i2c.h" +#include "cpu/samsung/s5p-common/s3c24x0_i2c.h" + static void ps_hold_setup(void) { struct exynos5_power *power = @@ -138,21 +141,16 @@ int power_init(void) { int error = 0; - /* FIXME(dhendrix): not necessary for initial bringup... */ -#if 0 -#ifdef CONFIG_SPL_BUILD - struct spl_machine_param *param = spl_get_machine_params(); - + /* + * FIXME(dhendrix): We will re-factor the caller of power_init() + * to start from a board-specific romstage file and do the i2c + * early setup. There is no reason CPU power init code should + * mess with board-specific i2c parameters. + */ /* Set the i2c register address base so i2c works before FDT */ - i2c_set_early_reg(param->i2c_base); -#endif -#endif + i2c_set_early_reg(0x12c60000); ps_hold_setup(); - - /* FIXME(dhendrix): not necessary for initial bringup... */ -#if 0 - /* init the i2c so that we can program pmic chip */ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); /* @@ -183,9 +181,10 @@ int power_init(void) REG_ENABLE, MAX77686_MV); error |= max77686_volsetting(PMIC_LDO10, CONFIG_VDD_LDO10_MV, REG_ENABLE, MAX77686_MV); -#endif - if (error != 0) + if (error != 0) { + power_shutdown(); printk(BIOS_ERR, "power init failed\n"); + } return error; }

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Patch set updated for coreboot: 3dd43a2 snow: add max77686 driver in romstage and ramstage
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2123 -gerrit commit 3dd43a235e06c8b3c9956c4d4d24c21048e9ee97 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 16:22:12 2013 -0800 snow: add max77686 driver in romstage and ramstage Change-Id: Id3e20b1ab5d85cfd22e2dae2750f32007b7f8f74 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/drivers/maxim/max77686/Makefile.inc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/drivers/maxim/max77686/Makefile.inc b/src/drivers/maxim/max77686/Makefile.inc index b67595f..a5d7b90 100644 --- a/src/drivers/maxim/max77686/Makefile.inc +++ b/src/drivers/maxim/max77686/Makefile.inc @@ -17,4 +17,5 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -ramstage-$(CONFIG_DRIVER_MAXIM_77686) += max77686.c +romstage-$(CONFIG_DRIVER_MAXIM_MAX77686) += max77686.c +ramstage-$(CONFIG_DRIVER_MAXIM_MAX77686) += max77686.c

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Patch set updated for coreboot: ab85357 armv7: update board_init_f function signature
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2122 -gerrit commit ab85357c40d283dad38483bffe69a839f71fb91f Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 16:14:00 2013 -0800 armv7: update board_init_f function signature We don't pass arguments when we jump out of assembly code. Change-Id: Iccf3a6f713e260b08f9ff47e8b542b9e96369166 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/include/common.h | 3 ++- src/cpu/samsung/exynos5-common/spl_boot.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/src/arch/armv7/include/common.h b/src/arch/armv7/include/common.h index e21cfb0..6a590d6 100644 --- a/src/arch/armv7/include/common.h +++ b/src/arch/armv7/include/common.h @@ -164,7 +164,8 @@ void init_cmd_timeout(void); void reset_cmd_timeout(void); /* arch/$(ARCH)/lib/board.c */ -void board_init_f (ulong); +void board_init_f (void); +//void board_init_f (ulong); //void board_init_f (ulong) __attribute__ ((noreturn)); void board_init_r (gd_t *, ulong) __attribute__ ((noreturn)); int checkboard (void); diff --git a/src/cpu/samsung/exynos5-common/spl_boot.c b/src/cpu/samsung/exynos5-common/spl_boot.c index a734d5c..9b9bc23 100644 --- a/src/cpu/samsung/exynos5-common/spl_boot.c +++ b/src/cpu/samsung/exynos5-common/spl_boot.c @@ -308,7 +308,8 @@ static int __def_board_wakeup_permitted(void) int board_wakeup_permitted(void) __attribute__((weak, alias("__def_board_wakeup_permitted"))); -void board_init_f(unsigned long bootflag) +//void board_init_f(unsigned long bootflag) +void board_init_f(void) { /* * The gd struct is only needed for serial initialization. Since this

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Patch set updated for coreboot: f185078 armv7: delete some unused files
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2121 -gerrit commit f185078c090601ac597240700c99330c389bed79 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 16:12:23 2013 -0800 armv7: delete some unused files Change-Id: I4601b97cbd7dbfb6ee742b3920d2aac4ac49b958 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/start.S | 542 ----------------------------- src/cpu/samsung/exynos5250/Makefile.inc | 3 - src/cpu/samsung/exynos5250/lowlevel_init.S | 32 -- src/cpu/samsung/exynos5250/spl.c | 41 --- 4 files changed, 618 deletions(-) diff --git a/src/arch/armv7/start.S b/src/arch/armv7/start.S deleted file mode 100644 index 8af48eb..0000000 --- a/src/arch/armv7/start.S +++ /dev/null @@ -1,542 +0,0 @@ -/* - * armboot - Startup Code for OMAP3530/ARM Cortex CPU-core - * - * Copyright (c) 2004 Texas Instruments <r-woodruff2(a)ti.com> - * - * Copyright (c) 2001 Marius Gröger <mag(a)sysgo.de> - * Copyright (c) 2002 Alex Züpke <azu(a)sysgo.de> - * Copyright (c) 2002 Gary Jennejohn <garyj(a)denx.de> - * Copyright (c) 2003 Richard Woodruff <r-woodruff2(a)ti.com> - * Copyright (c) 2003 Kshitij <kshitij(a)ti.com> - * Copyright (c) 2006-2008 Syed Mohammed Khasim <x0khasim(a)ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <system.h> - -.globl _start -_start: b reset - ldr pc, _undefined_instruction - ldr pc, _software_interrupt - ldr pc, _prefetch_abort - ldr pc, _data_abort - ldr pc, _not_used - ldr pc, _irq - ldr pc, _fiq -#ifdef CONFIG_SPL_BUILD -_undefined_instruction: .word _undefined_instruction -_software_interrupt: .word _software_interrupt -_prefetch_abort: .word _prefetch_abort -_data_abort: .word _data_abort -_not_used: .word _not_used -_irq: .word _irq -_fiq: .word _fiq -_pad: .word 0x12345678 /* now 16*4=64 */ -#else -_undefined_instruction: .word undefined_instruction -_software_interrupt: .word software_interrupt -_prefetch_abort: .word prefetch_abort -_data_abort: .word data_abort -_not_used: .word not_used -_irq: .word irq -_fiq: .word fiq -_pad: .word 0x12345678 /* now 16*4=64 */ -#endif /* CONFIG_SPL_BUILD */ - -.global _end_vect -_end_vect: - - .balignl 16,0xdeadbeef -/************************************************************************* - * - * Startup Code (reset vector) - * - * do important init only if we don't start from memory! - * setup Memory and board specific bits prior to relocation. - * relocate armboot to ram - * setup stack - * - *************************************************************************/ - -.globl _TEXT_BASE -_TEXT_BASE: - .word CONFIG_SYS_TEXT_BASE - -/* - * These are defined in the board-specific linker script. - */ -.globl _bss_start_ofs -_bss_start_ofs: - .word _bss - _start - -.global _image_copy_end_ofs -_image_copy_end_ofs: - .word __image_copy_end - _start - -.globl _bss_end_ofs -_bss_end_ofs: - .word _ebss - _start -# .word __bss_end__ - _start - -.globl _end_ofs -_end_ofs: - .word _end - _start - -#ifdef CONFIG_USE_IRQ -/* IRQ stack memory (calculated at run-time) */ -.globl IRQ_STACK_START -IRQ_STACK_START: - .word 0x0badc0de - -/* IRQ stack memory (calculated at run-time) */ -.globl FIQ_STACK_START -FIQ_STACK_START: - .word 0x0badc0de -#endif - -/* IRQ stack memory (calculated at run-time) + 8 bytes */ -.globl IRQ_STACK_START_IN -IRQ_STACK_START_IN: - .word 0x0badc0de - -/* - * the actual reset code - */ - -reset: -/* bl save_boot_params */ - /* - * set the cpu to SVC32 mode - */ - mrs r0, cpsr - bic r0, r0, #0x1f - orr r0, r0, #0xd3 - msr cpsr,r0 - -#if !defined(CONFIG_TEGRA2) -/* - * Setup vector: - * (OMAP4 spl TEXT_BASE is not 32 byte aligned. - * Continue to use ROM code vector only in OMAP4 spl) - */ -#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) - /* Set V=0 in CP15 SCTRL register - for VBAR to point to vector */ - mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTRL Register - bic r0, #CR_V @ V = 0 - mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTRL Register - - /* Set vector address in CP15 VBAR register */ - ldr r0, =_start - mcr p15, 0, r0, c12, c0, 0 @Set VBAR -#endif -#endif /* !Tegra2 */ - - /* the mask ROM code should have PLL and others stable */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - /* - * FIXME(dhendrix): Do we need to explicitly disable icache/dcache - * first? See example 15-3 in Cortex-A programmers guide... - */ - bl cpu_init_cp15 - bl cpu_init_crit -#endif - -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - bl board_init_f - -/*------------------------------------------------------------------------------*/ - -/* - * void relocate_code (addr_sp, gd, addr_moni) - * - * This "function" does not return, instead it continues in RAM - * after relocating the monitor code. - * - */ - .globl relocate_code -relocate_code: - mov r4, r0 /* save addr_sp */ - mov r5, r1 /* save addr of gd */ - mov r6, r2 /* save addr of destination */ - - /* Set up the stack */ -stack_setup: - mov sp, r4 - - adr r0, _start - subs r9, r6, r0 /* r9 <- relocation offset */ - beq clear_bss /* skip relocation */ - mov r1, r6 /* r1 <- scratch for copy_loop */ - ldr r3, _image_copy_end_ofs - add r2, r0, r3 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r1!, {r9-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop - -#ifndef CONFIG_SPL_BUILD - /* - * fix .rel.dyn relocations - */ - ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r6, r0 /* r9 <- relocation offset */ - ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ - add r10, r10, r0 /* r10 <- sym table in FLASH */ - ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ - add r2, r2, r0 /* r2 <- rel dyn start in FLASH */ - ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ - add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ -fixloop: - ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ - add r0, r0, r9 /* r0 <- location to fix up in RAM */ - ldr r1, [r2, #4] - and r7, r1, #0xff - cmp r7, #23 /* relative fixup? */ - beq fixrel - cmp r7, #2 /* absolute fixup? */ - beq fixabs - /* ignore unknown type of fixup */ - b fixnext -fixabs: - /* absolute fix: set location to (offset) symbol value */ - mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ - add r1, r10, r1 /* r1 <- address of symbol in table */ - ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r1, r9 /* r1 <- relocated sym addr */ - b fixnext -fixrel: - /* relative fix: increase location by offset */ - ldr r1, [r0] - add r1, r1, r9 -fixnext: - str r1, [r0] - add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ - cmp r2, r3 - blo fixloop - b clear_bss -_rel_dyn_start_ofs: - .word __rel_dyn_start - _start -_rel_dyn_end_ofs: - .word __rel_dyn_end - _start -_dynsym_start_ofs: - .word __dynsym_start - _start - -#endif /* #ifndef CONFIG_SPL_BUILD */ - -clear_bss: -#ifdef CONFIG_SPL_BUILD - /* No relocation for SPL */ - ldr r0, =_bss - ldr r1, =_ebss -#else - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 -#endif - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - bne clbss_l - -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ -jump_2_ram: -/* - * If I-cache is enabled invalidate it - */ -#ifndef CONFIG_SYS_ICACHE_OFF - mcr p15, 0, r0, c7, c5, 0 @ invalidate icache - mcr p15, 0, r0, c7, c10, 4 @ DSB - mcr p15, 0, r0, c7, c5, 4 @ ISB -#endif - ldr r0, _board_init_r_ofs - adr r1, _start - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ - mov pc, lr - -_board_init_r_ofs: - .word board_init_r - _start - -/************************************************************************* - * - * cpu_init_cp15 - * - * Setup CP15 registers (cache, MMU, TLBs). The I-cache is turned on unless - * CONFIG_SYS_ICACHE_OFF is defined. - * - *************************************************************************/ -.globl cpu_init_cp15 -cpu_init_cp15: - /* - * Invalidate L1 I/D - */ - mov r0, #0 @ set up for MCR - mcr p15, 0, r0, c8, c7, 0 @ invalidate TLBs - mcr p15, 0, r0, c7, c5, 0 @ invalidate icache - mcr p15, 0, r0, c7, c5, 6 @ invalidate BP array - mcr p15, 0, r0, c7, c10, 4 @ DSB - mcr p15, 0, r0, c7, c5, 4 @ ISB - - /* - * disable MMU stuff and caches - */ - mrc p15, 0, r0, c1, c0, 0 - bic r0, r0, #0x00002000 @ clear bits 13 (--V-) - bic r0, r0, #0x00000007 @ clear bits 2:0 (-CAM) - orr r0, r0, #0x00000002 @ set bit 1 (--A-) Align - orr r0, r0, #0x00000800 @ set bit 11 (Z---) BTB -#ifdef CONFIG_SYS_ICACHE_OFF - bic r0, r0, #0x00001000 @ clear bit 12 (I) I-cache -#else - orr r0, r0, #0x00001000 @ set bit 12 (I) I-cache -#endif - mcr p15, 0, r0, c1, c0, 0 - mov pc, lr @ back to my caller - - -#ifndef CONFIG_SKIP_LOWLEVEL_INIT -/************************************************************************* - * - * CPU_init_critical registers - * - * setup important registers - * setup memory timing - * - *************************************************************************/ -cpu_init_crit: - /* - * Jump to board specific initialization... - * The Mask ROM will have already initialized - * basic memory. Go here to bump up clock rate and handle - * wake up conditions. - */ - mov ip, lr @ persevere link reg across call - bl lowlevel_init @ go setup pll,mux,memory - mov lr, ip @ restore link - mov pc, lr @ back to my caller -#endif - -#ifndef CONFIG_SPL_BUILD -/* - ************************************************************************* - * - * Interrupt handling - * - ************************************************************************* - */ -@ -@ IRQ stack frame. -@ -#define S_FRAME_SIZE 72 - -#define S_OLD_R0 68 -#define S_PSR 64 -#define S_PC 60 -#define S_LR 56 -#define S_SP 52 - -#define S_IP 48 -#define S_FP 44 -#define S_R10 40 -#define S_R9 36 -#define S_R8 32 -#define S_R7 28 -#define S_R6 24 -#define S_R5 20 -#define S_R4 16 -#define S_R3 12 -#define S_R2 8 -#define S_R1 4 -#define S_R0 0 - -#define MODE_SVC 0x13 -#define I_BIT 0x80 - -/* - * use bad_save_user_regs for abort/prefetch/undef/swi ... - * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling - */ - - .macro bad_save_user_regs - sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current - @ user stack - stmia sp, {r0 - r12} @ Save user registers (now in - @ svc mode) r0-r12 - ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort - @ stack - ldmia r2, {r2 - r3} @ get values for "aborted" pc - @ and cpsr (into parm regs) - add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack - - add r5, sp, #S_SP - mov r1, lr - stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr - mov r0, sp @ save current stack into r0 - @ (param register) - .endm - - .macro irq_save_user_regs - sub sp, sp, #S_FRAME_SIZE - stmia sp, {r0 - r12} @ Calling r0-r12 - add r8, sp, #S_PC @ !! R8 NEEDS to be saved !! - @ a reserved stack spot would - @ be good. - stmdb r8, {sp, lr}^ @ Calling SP, LR - str lr, [r8, #0] @ Save calling PC - mrs r6, spsr - str r6, [r8, #4] @ Save CPSR - str r0, [r8, #8] @ Save OLD_R0 - mov r0, sp - .endm - - .macro irq_restore_user_regs - ldmia sp, {r0 - lr}^ @ Calling r0 - lr - mov r0, r0 - ldr lr, [sp, #S_PC] @ Get PC - add sp, sp, #S_FRAME_SIZE - subs pc, lr, #4 @ return & move spsr_svc into - @ cpsr - .endm - - .macro get_bad_stack - ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter - @ in banked mode) - - str lr, [r13] @ save caller lr in position 0 - @ of saved stack - mrs lr, spsr @ get the spsr - str lr, [r13, #4] @ save spsr in position 1 of - @ saved stack - - mov r13, #MODE_SVC @ prepare SVC-Mode - @ msr spsr_c, r13 - msr spsr, r13 @ switch modes, make sure - @ moves will execute - mov lr, pc @ capture return pc - movs pc, lr @ jump to next instruction & - @ switch modes. - .endm - - .macro get_bad_stack_swi - sub r13, r13, #4 @ space on current stack for - @ scratch reg. - str r0, [r13] @ save R0's value. - ldr r0, IRQ_STACK_START_IN @ get data regions start - @ spots for abort stack - str lr, [r0] @ save caller lr in position 0 - @ of saved stack - mrs r0, spsr @ get the spsr - str lr, [r0, #4] @ save spsr in position 1 of - @ saved stack - ldr r0, [r13] @ restore r0 - add r13, r13, #4 @ pop stack entry - .endm - - .macro get_irq_stack @ setup IRQ stack - ldr sp, IRQ_STACK_START - .endm - - .macro get_fiq_stack @ setup FIQ stack - ldr sp, FIQ_STACK_START - .endm - -/* - * exception handlers - */ - .align 5 -undefined_instruction: - get_bad_stack - bad_save_user_regs - bl do_undefined_instruction - - .align 5 -software_interrupt: - get_bad_stack_swi - bad_save_user_regs - bl do_software_interrupt - - .align 5 -prefetch_abort: - get_bad_stack - bad_save_user_regs - bl do_prefetch_abort - - .align 5 -data_abort: - get_bad_stack - bad_save_user_regs - bl do_data_abort - - .align 5 -not_used: - get_bad_stack - bad_save_user_regs - bl do_not_used - -#ifdef CONFIG_USE_IRQ - - .align 5 -irq: - get_irq_stack - irq_save_user_regs - bl do_irq - irq_restore_user_regs - - .align 5 -fiq: - get_fiq_stack - /* someone ought to write a more effective fiq_save_user_regs */ - irq_save_user_regs - bl do_fiq - irq_restore_user_regs - -#else - - .align 5 -irq: - get_bad_stack - bad_save_user_regs - bl do_irq - - .align 5 -fiq: - get_bad_stack - bad_save_user_regs - bl do_fiq - -#endif /* CONFIG_USE_IRQ */ -#endif /* CONFIG_SPL_BUILD */ diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 1ff2327..d419f28 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -6,7 +6,6 @@ INTERMEDIATE += exynos5250_add_bl1 romstage-y += clock.c romstage-y += clock_init.c romstage-y += exynos_cache.c -romstage-y += lowlevel_init.S romstage-y += lowlevel_init_c.c romstage-y += pinmux.c romstage-y += power.c @@ -17,13 +16,11 @@ romstage-y += uart.c #ramstage-y += clock_init.c #ramstage-y += power.c #ramstage-y += uart.c -##ramstage-y += spl.c #ramstage-y += pinmux.c ##ramstage-y += tzpc_init.c ramstage-y += clock.c ramstage-y += clock_init.c ramstage-y += exynos_cache.c -ramstage-y += lowlevel_init.S ramstage-y += lowlevel_init_c.c ramstage-y += pinmux.c ramstage-y += power.c diff --git a/src/cpu/samsung/exynos5250/lowlevel_init.S b/src/cpu/samsung/exynos5250/lowlevel_init.S deleted file mode 100644 index 883db9d..0000000 --- a/src/cpu/samsung/exynos5250/lowlevel_init.S +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Lowlevel setup for SMDK5250 board based on S5PC520 - * - * Copyright (C) 2012 Samsung Electronics - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - .globl lowlevel_init -lowlevel_init: - /* - * Set the stack pointer, although it will be overwriten by the caller - * It seems we will not boot if this function is empty. - */ - ldr sp, =CONFIG_IRAM_STACK - mov pc, lr diff --git a/src/cpu/samsung/exynos5250/spl.c b/src/cpu/samsung/exynos5250/spl.c deleted file mode 100644 index 00b584a..0000000 --- a/src/cpu/samsung/exynos5250/spl.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (C) 2012 Samsung Electronics - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* FIXME(dhendrix): file unneeded? */ -#if 0 -#include <asm/types.h> -#include <asm/arch-exynos/cpu.h> -#include <asm/arch-exynos/spl.h> - -/* Get the u-boot size from the SPL parameter table */ -unsigned int exynos_get_uboot_size(void) -{ - struct spl_machine_param *param = spl_get_machine_params(); - - return param->uboot_size; -} - -/* Get the boot device from the SPL parameter table */ -enum boot_mode exynos_get_boot_device(void) -{ - struct spl_machine_param *param = spl_get_machine_params(); - - return param->boot_source; -} -#endif

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Patch set updated for coreboot: cb4d51b size optimizations for max77686
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2124 -gerrit commit cb4d51b7b7877df7a3d523f13c3597801c6b4daf Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 16:26:26 2013 -0800 size optimizations for max77686 This contains some size optimizations for the Maxim MAX77686 driver: - change max77686_para.vol_{min,div} from u32 to u16 (currently their max value is 50000 so it should be fine) - remove max77686_para.regnum which takes 4 bytes for each and is not used (Patch was originally written by Hung-Te Lin, I'm just uploading it) Change-Id: I24044427c49467e99380d1f60ebc59e69c285b22 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/drivers/maxim/max77686/max77686.c | 88 ++++++++++++++++++----------------- src/drivers/maxim/max77686/max77686.h | 5 +- 2 files changed, 47 insertions(+), 46 deletions(-) diff --git a/src/drivers/maxim/max77686/max77686.c b/src/drivers/maxim/max77686/max77686.c index 8fbcb8f..16fa7f5 100644 --- a/src/drivers/maxim/max77686/max77686.c +++ b/src/drivers/maxim/max77686/max77686.c @@ -21,9 +21,12 @@ * MA 02111-1307 USA */ +#include <arch/io.h> #include <common.h> -#include <smbus.h> -#include <max77686.h> +//#include <smbus.h> +#include <device/i2c.h> + +#include "max77686.h" /* Chip register numbers (not exported from this module) */ enum { @@ -39,45 +42,45 @@ enum { * Max77686 parameters values * see max77686.h for parameters details */ -struct max77686_para max77686_param[] = {/*{regnum, vol_addr, vol_bitpos, +struct max77686_para max77686_param[] = {/*{vol_addr, vol_bitpos, vol_bitmask, reg_enaddr, reg_enbitpos, reg_enbitmask, reg_enbiton, reg_enbitoff, vol_min, vol_div}*/ - {PMIC_BUCK1, 0x11, 0x0, 0x3F, 0x10, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {PMIC_BUCK2, 0x14, 0x0, 0xFF, 0x12, 0x4, 0x3, 0x1, 0x0, 600, 12500}, - {PMIC_BUCK3, 0x1E, 0x0, 0xFF, 0x1C, 0x4, 0x3, 0x1, 0x0, 600, 12500}, - {PMIC_BUCK4, 0x28, 0x0, 0xFF, 0x26, 0x4, 0x3, 0x1, 0x0, 600, 12500}, - {PMIC_BUCK5, 0x31, 0x0, 0x3F, 0x30, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {PMIC_BUCK6, 0x33, 0x0, 0x3F, 0x32, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {PMIC_BUCK7, 0x35, 0x0, 0x3F, 0x34, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {PMIC_BUCK8, 0x37, 0x0, 0x3F, 0x36, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {PMIC_BUCK9, 0x39, 0x0, 0x3F, 0x38, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {PMIC_LDO1, 0x40, 0x0, 0x3F, 0x40, 0x6, 0x3, 0x3, 0x0, 800, 25000}, - {PMIC_LDO2, 0x41, 0x0, 0x3F, 0x41, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {PMIC_LDO3, 0x42, 0x0, 0x3F, 0x42, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO4, 0x43, 0x0, 0x3F, 0x43, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO5, 0x44, 0x0, 0x3F, 0x44, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO6, 0x45, 0x0, 0x3F, 0x45, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {PMIC_LDO7, 0x46, 0x0, 0x3F, 0x46, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {PMIC_LDO8, 0x47, 0x0, 0x3F, 0x47, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {PMIC_LDO9, 0x48, 0x0, 0x3F, 0x48, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO10, 0x49, 0x0, 0x3F, 0x49, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {PMIC_LDO11, 0x4A, 0x0, 0x3F, 0x4A, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {PMIC_LDO12, 0x4B, 0x0, 0x3F, 0x4B, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {PMIC_LDO13, 0x4C, 0x0, 0x3F, 0x4C, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO14, 0x4D, 0x0, 0x3F, 0x4D, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {PMIC_LDO15, 0x4E, 0x0, 0x3F, 0x4E, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {PMIC_LDO16, 0x4F, 0x0, 0x3F, 0x4F, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {PMIC_LDO17, 0x50, 0x0, 0x3F, 0x50, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO18, 0x51, 0x0, 0x3F, 0x51, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO19, 0x52, 0x0, 0x3F, 0x52, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO20, 0x53, 0x0, 0x3F, 0x53, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO21, 0x54, 0x0, 0x3F, 0x54, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO22, 0x55, 0x0, 0x3F, 0x55, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO23, 0x56, 0x0, 0x3F, 0x56, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO24, 0x57, 0x0, 0x3F, 0x57, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO25, 0x58, 0x0, 0x3F, 0x58, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_LDO26, 0x59, 0x0, 0x3F, 0x59, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {PMIC_EN32KHZ_CP, 0x0, 0x0, 0x0, 0x7F, 0x1, 0x1, 0x1, 0x0, 0x0, 0x0}, + {/* PMIC_BUCK1 */ 0x11, 0x0, 0x3F, 0x10, 0x0, 0x3, 0x3, 0x0, 750, 50000}, + {/* PMIC_BUCK2 */ 0x14, 0x0, 0xFF, 0x12, 0x4, 0x3, 0x1, 0x0, 600, 12500}, + {/* PMIC_BUCK3 */ 0x1E, 0x0, 0xFF, 0x1C, 0x4, 0x3, 0x1, 0x0, 600, 12500}, + {/* PMIC_BUCK4 */ 0x28, 0x0, 0xFF, 0x26, 0x4, 0x3, 0x1, 0x0, 600, 12500}, + {/* PMIC_BUCK5 */ 0x31, 0x0, 0x3F, 0x30, 0x0, 0x3, 0x3, 0x0, 750, 50000}, + {/* PMIC_BUCK6 */ 0x33, 0x0, 0x3F, 0x32, 0x0, 0x3, 0x3, 0x0, 750, 50000}, + {/* PMIC_BUCK7 */ 0x35, 0x0, 0x3F, 0x34, 0x0, 0x3, 0x3, 0x0, 750, 50000}, + {/* PMIC_BUCK8 */ 0x37, 0x0, 0x3F, 0x36, 0x0, 0x3, 0x3, 0x0, 750, 50000}, + {/* PMIC_BUCK9 */ 0x39, 0x0, 0x3F, 0x38, 0x0, 0x3, 0x3, 0x0, 750, 50000}, + {/* PMIC_LDO1 */ 0x40, 0x0, 0x3F, 0x40, 0x6, 0x3, 0x3, 0x0, 800, 25000}, + {/* PMIC_LDO2 */ 0x41, 0x0, 0x3F, 0x41, 0x6, 0x3, 0x1, 0x0, 800, 25000}, + {/* PMIC_LDO3 */ 0x42, 0x0, 0x3F, 0x42, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO4 */ 0x43, 0x0, 0x3F, 0x43, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO5 */ 0x44, 0x0, 0x3F, 0x44, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO6 */ 0x45, 0x0, 0x3F, 0x45, 0x6, 0x3, 0x1, 0x0, 800, 25000}, + {/* PMIC_LDO7 */ 0x46, 0x0, 0x3F, 0x46, 0x6, 0x3, 0x1, 0x0, 800, 25000}, + {/* PMIC_LDO8 */ 0x47, 0x0, 0x3F, 0x47, 0x6, 0x3, 0x1, 0x0, 800, 25000}, + {/* PMIC_LDO9 */ 0x48, 0x0, 0x3F, 0x48, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO10 */ 0x49, 0x0, 0x3F, 0x49, 0x6, 0x3, 0x1, 0x0, 800, 50000}, + {/* PMIC_LDO11 */ 0x4A, 0x0, 0x3F, 0x4A, 0x6, 0x3, 0x1, 0x0, 800, 50000}, + {/* PMIC_LDO12 */ 0x4B, 0x0, 0x3F, 0x4B, 0x6, 0x3, 0x1, 0x0, 800, 50000}, + {/* PMIC_LDO13 */ 0x4C, 0x0, 0x3F, 0x4C, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO14 */ 0x4D, 0x0, 0x3F, 0x4D, 0x6, 0x3, 0x1, 0x0, 800, 50000}, + {/* PMIC_LDO15 */ 0x4E, 0x0, 0x3F, 0x4E, 0x6, 0x3, 0x1, 0x0, 800, 25000}, + {/* PMIC_LDO16 */ 0x4F, 0x0, 0x3F, 0x4F, 0x6, 0x3, 0x1, 0x0, 800, 50000}, + {/* PMIC_LDO17 */ 0x50, 0x0, 0x3F, 0x50, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO18 */ 0x51, 0x0, 0x3F, 0x51, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO19 */ 0x52, 0x0, 0x3F, 0x52, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO20 */ 0x53, 0x0, 0x3F, 0x53, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO21 */ 0x54, 0x0, 0x3F, 0x54, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO22 */ 0x55, 0x0, 0x3F, 0x55, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO23 */ 0x56, 0x0, 0x3F, 0x56, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO24 */ 0x57, 0x0, 0x3F, 0x57, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO25 */ 0x58, 0x0, 0x3F, 0x58, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_LDO26 */ 0x59, 0x0, 0x3F, 0x59, 0x6, 0x3, 0x3, 0x0, 800, 50000}, + {/* PMIC_EN32KHZ_CP */ 0x0, 0x0, 0x0, 0x7F, 0x1, 0x1, 0x1, 0x0, 0x0, 0x0}, }; /* @@ -174,15 +177,15 @@ static int max77686_do_volsetting(enum max77686_regnum reg, unsigned int volt, } if (volt_units == MAX77686_UV) - vol_level = volt - pmic->vol_min * 1000; + vol_level = volt - (u32)pmic->vol_min * 1000; else - vol_level = (volt - pmic->vol_min) * 1000; + vol_level = (volt - (u32)pmic->vol_min) * 1000; if (vol_level < 0) { debug("Not a valid voltage level to set\n"); return -1; } - vol_level /= pmic->vol_div; + vol_level /= (u32)pmic->vol_div; clrsetbits_8(&read_data, pmic->vol_bitmask << pmic->vol_bitpos, vol_level << pmic->vol_bitpos); @@ -198,7 +201,6 @@ static int max77686_do_volsetting(enum max77686_regnum reg, unsigned int volt, debug("Failed to enable buck/ldo.\n"); return -1; } - return 0; } diff --git a/src/drivers/maxim/max77686/max77686.h b/src/drivers/maxim/max77686/max77686.h index 345471e..ee53e27 100644 --- a/src/drivers/maxim/max77686/max77686.h +++ b/src/drivers/maxim/max77686/max77686.h @@ -77,7 +77,6 @@ enum max77686_regnum { * @param vol_div voltage division value of given buck/ldo */ struct max77686_para { - enum max77686_regnum regnum; u8 vol_addr; u8 vol_bitpos; u8 vol_bitmask; @@ -86,8 +85,8 @@ struct max77686_para { u8 reg_enbitmask; u8 reg_enbiton; u8 reg_enbitoff; - u32 vol_min; - u32 vol_div; + u16 vol_min; + u16 vol_div; }; /* I2C device address for pmic max77686 */

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New patch to review for coreboot: 0969480 armv7: dynamically calculate the branch offset in cbfstool
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2125 -gerrit commit 0969480ea0dc788f0406a6f0479759108ab2a903 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 17:45:19 2013 -0800 armv7: dynamically calculate the branch offset in cbfstool This tidies up the ARMV7 case when creating cbfs: - Calculate the offset using the size of the master header and offsets rather than using a magic constant. - Re-order some assignments so things happen in a logical order. Change-Id: Id9cdbc3389c8bb504fa99436c9771936cc4c1c23 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- util/cbfstool/common.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c index 3b63e54..195cda1 100644 --- a/util/cbfstool/common.c +++ b/util/cbfstool/common.c @@ -565,22 +565,23 @@ int create_cbfs_image(const char *romfile, uint32_t _romsize, /* Set up physical/virtual mapping */ offset = romarea; - // should be aligned to align but then we need to dynamically - // create the jump to the bootblock - loadfile(bootblock, &bootblocksize, romarea + offs + 0x20 + - sizeof(struct cbfs_header), SEEK_SET); - master_header = (struct cbfs_header *)(romarea + offs + 0x20); + // should be aligned to align uint32_t *arm_vec = (uint32_t *)(romarea + offs); + master_header = (struct cbfs_header *)(romarea + offs + 0x20); + loadfile(bootblock, &bootblocksize, romarea + offs + 0x20 + + sizeof(struct cbfs_header), SEEK_SET); + /* * Encoding for this branch instruction is: * 31:28 - condition (0xe for always/unconditional) - * 27:24 - 0xa + * 27:24 - Branch (0xa, encoding A1) * 23: 0 - sign-extended offset (in multiples of 4) * * When executing the branch, the PC will read as the address * of current instruction + 8. */ - arm_vec[0] = htonl(0x0e0000ea); // branch to . + 64 bytes + uint32_t imm = ((0x20 + sizeof(struct cbfs_header)) - 8) / 4; + arm_vec[0] = imm | (0xa << 24) | (0xe << 28); master_header->magic = ntohl(CBFS_HEADER_MAGIC); master_header->version = ntohl(CBFS_HEADER_VERSION);

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coreboot January 2013