coreboot January 2013

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New patch to review for coreboot: 6c8fbaf exynos5250: Temporarily remove intermediate rule in Makefile
by David Hendricks 11 Jan '13

11 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2132 -gerrit commit 6c8fbafc544d947b7b2e3a87d20b58561edebad0 Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Jan 10 15:00:23 2013 -0800 exynos5250: Temporarily remove intermediate rule in Makefile This cannot be used until we get the BL1 mess sorted out. Change-Id: I2490addb31256e27caa89ebb5b1501296e6903bd Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5250/Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index d419f28..1b915a3 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -1,7 +1,7 @@ # Run an intermediate step when producing coreboot.rom # that adds additional components to the final firmware # image outside of CBFS -INTERMEDIATE += exynos5250_add_bl1 +#INTERMEDIATE += exynos5250_add_bl1 romstage-y += clock.c romstage-y += clock_init.c

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Patch merged into coreboot/master: 8a5ee9c armv7: replace magic constant for romstage location
by gerrit＠coreboot.org 10 Jan '13

10 Jan '13

the following patch was just integrated into master: commit 8a5ee9ce04cb88a57cf0a0d8a405c9865c99c01a Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Jan 10 11:44:58 2013 -0800 armv7: replace magic constant for romstage location This replaces 0x02023400 with an SoC-specific Kconfig variable. Change-Id: I21482d54a1e1fa6c4437c030ddae2b0bb3331551 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/2130 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Thu Jan 10 21:23:50 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Jan 10 23:13:39 2013, giving +2 See http://review.coreboot.org/2130 for details. -gerrit

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Patch merged into coreboot/master: d6b0889 add a few entries to .gitignore
by gerrit＠coreboot.org 10 Jan '13

10 Jan '13

the following patch was just integrated into master: commit d6b0889febfce600fe56fa2fe4785a19fb84174a Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Jan 10 11:32:31 2013 -0800 add a few entries to .gitignore - Development friendly files (tags, clang_complete) - Cross-compile stuff (xgcc, tarballs) This patch was originally written by Stefan. Change-Id: I4229414c94ee04a4f38a748369c4ac90fda57aea Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Reviewed-on: http://review.coreboot.org/2128 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Thu Jan 10 20:39:43 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Thu Jan 10 22:51:19 2013, giving +2 See http://review.coreboot.org/2128 for details. -gerrit

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Patch merged into coreboot/master: 1dcb697 armv7: add *(.data) back into .romdata section
by gerrit＠coreboot.org 10 Jan '13

10 Jan '13

the following patch was just integrated into master: commit 1dcb697a24973be03453aded2923816e2f6aca62 Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Jan 10 12:13:21 2013 -0800 armv7: add *(.data) back into .romdata section This doesn't seem to be strictly required (so far), but makes sense. Change-Id: I18416c427ff886507ae09c7fc1a018baf94af24a Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/2131 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Thu Jan 10 21:31:34 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Jan 10 22:33:13 2013, giving +2 See http://review.coreboot.org/2131 for details. -gerrit

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New patch to review for coreboot: f49e7ad armv7: add *(.data) back into .romdata section
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2131 -gerrit commit f49e7ad68a317ec166658fc11265999a3ee5e01a Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Jan 10 12:13:21 2013 -0800 armv7: add *(.data) back into .romdata section This doesn't seem to be strictly required (so far), but makes sense. Change-Id: I18416c427ff886507ae09c7fc1a018baf94af24a Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/romstage.ld | 1 + 1 file changed, 1 insertion(+) diff --git a/src/arch/armv7/romstage.ld b/src/arch/armv7/romstage.ld index 5d045b5..b63a78e 100644 --- a/src/arch/armv7/romstage.ld +++ b/src/arch/armv7/romstage.ld @@ -49,6 +49,7 @@ SECTIONS .romdata . : { *(.rodata); *(.machine_param); + *(.data); . = ALIGN(8); _erom = .; }

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New patch to review for coreboot: 08cf2c5 armv7: replace magic constant for romstage location
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2130 -gerrit commit 08cf2c5d57576183c04d69882f23464c082bcda9 Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Jan 10 11:44:58 2013 -0800 armv7: replace magic constant for romstage location This replaces 0x02023400 with an SoC-specific Kconfig variable. Change-Id: I21482d54a1e1fa6c4437c030ddae2b0bb3331551 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/romstage.ld | 3 +-- src/mainboard/google/snow/Kconfig | 4 ++++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/arch/armv7/romstage.ld b/src/arch/armv7/romstage.ld index d2b69d7..5d045b5 100644 --- a/src/arch/armv7/romstage.ld +++ b/src/arch/armv7/romstage.ld @@ -39,8 +39,7 @@ ENTRY(_start) SECTIONS { - /* FIXME: replace this with CPU-specific Kconfig variable */ - . = 0x02023400; /* Exynos5 */ + . = CONFIG_ROMSTAGE_BASE; .romtext . : { _rom = .; diff --git a/src/mainboard/google/snow/Kconfig b/src/mainboard/google/snow/Kconfig index 4a7fced..21cdfa5 100644 --- a/src/mainboard/google/snow/Kconfig +++ b/src/mainboard/google/snow/Kconfig @@ -63,6 +63,10 @@ config SPL_TEXT_BASE help Location of SPL. Default location is within iRAM region. +config ROMSTAGE_BASE + hex + default SPL_TEXT_BASE + # FIXME: increased "SPL" size to get around build issues #config SPL_MAX_SIZE # hex "SPL executable max size"

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New patch to review for coreboot: 8bb8a42 add a few entries to .gitignore
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2128 -gerrit commit 8bb8a425d11ebf64a11697aec35314997f6bf51a Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Jan 10 11:32:31 2013 -0800 add a few entries to .gitignore - Development friendly files (tags, clang_complete) - Cross-compile stuff (xgcc, tarballs) This patch was originally written by Stefan. Change-Id: I4229414c94ee04a4f38a748369c4ac90fda57aea Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> --- .gitignore | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/.gitignore b/.gitignore index 259dac9..e57e32f 100644 --- a/.gitignore +++ b/.gitignore @@ -28,6 +28,7 @@ util/crossgcc/Python-*/ util/crossgcc/tarballs/ util/crossgcc/w32api-*/ util/crossgcc/xgcc/ + *.\# *.bin *.debug @@ -36,6 +37,14 @@ util/crossgcc/xgcc/ *.out *.swp +# Development friendly files +tags +.clang_complete + +# Cross-compile toolkits +xgcc/ +tarballs/ + # # KDE editors create lots of backup files whenever # a file is edited, so just ignore them

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Patch merged into coreboot/master: c82ec0e armv7: update board_init_f function signature
by gerrit＠coreboot.org 10 Jan '13

10 Jan '13

the following patch was just integrated into master: commit c82ec0ed33eddfff8dfb20de81376a329bc7f51e Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 16:14:00 2013 -0800 armv7: update board_init_f function signature We don't pass arguments when we jump out of assembly code. Change-Id: Iccf3a6f713e260b08f9ff47e8b542b9e96369166 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/2122 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Thu Jan 10 20:12:01 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Jan 10 20:27:07 2013, giving +2 See http://review.coreboot.org/2122 for details. -gerrit

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Patch set updated for coreboot: 0de577a armv7: update board_init_f function signature
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2122 -gerrit commit 0de577af9306dfa0bcda6dd45e96130dd2f23e0e Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 16:14:00 2013 -0800 armv7: update board_init_f function signature We don't pass arguments when we jump out of assembly code. Change-Id: Iccf3a6f713e260b08f9ff47e8b542b9e96369166 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/include/common.h | 3 +-- src/cpu/samsung/exynos5-common/spl_boot.c | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/src/arch/armv7/include/common.h b/src/arch/armv7/include/common.h index e21cfb0..2d4d020 100644 --- a/src/arch/armv7/include/common.h +++ b/src/arch/armv7/include/common.h @@ -164,8 +164,7 @@ void init_cmd_timeout(void); void reset_cmd_timeout(void); /* arch/$(ARCH)/lib/board.c */ -void board_init_f (ulong); -//void board_init_f (ulong) __attribute__ ((noreturn)); +void board_init_f (void); void board_init_r (gd_t *, ulong) __attribute__ ((noreturn)); int checkboard (void); int checkflash (void); diff --git a/src/cpu/samsung/exynos5-common/spl_boot.c b/src/cpu/samsung/exynos5-common/spl_boot.c index a734d5c..ecff871 100644 --- a/src/cpu/samsung/exynos5-common/spl_boot.c +++ b/src/cpu/samsung/exynos5-common/spl_boot.c @@ -308,7 +308,7 @@ static int __def_board_wakeup_permitted(void) int board_wakeup_permitted(void) __attribute__((weak, alias("__def_board_wakeup_permitted"))); -void board_init_f(unsigned long bootflag) +void board_init_f(void) { /* * The gd struct is only needed for serial initialization. Since this

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Re: [coreboot] Permanent solution of the UEFI Secure Boot problem?!
by ron minnich 10 Jan '13

10 Jan '13

Get a chromebook. It runs coreboot. You can rebulid and reflash the bios. It has a secure boot you can turn on and off. It's a state of the art machine with excellent build quality. I replaced my Mac Air with a samsung xe550, I put in it normal mode and run Linux in a chroot and it's great. All my coreboot, Plan 9, and Go work is done on this chromebook. It runs my personal build of coreboot. or, Get tbe GETAC laptops that use coreboot. They're even more open than the chromebook -- there's no binary blob. They're heavy and have poor battery life but they're pretty open. or, Get an older thinkpad that uses coreboot. or, find a laptop that mostly uses coreboot supported chipsets. Spend a year trying to get all the proprietary bits working (EC for example). You will learn a lot. or, get an ARM-based laptop and help us with the ongoing ARM port of coreboot. A samsung ARM chromebook or EFIKA might be nice. One of the things that people don't always realize is that hardware design is really, really hard -- far harder than it was 10 years ago. It's pretty easy to put together a board that boots most of the time. But add in the effort to make a real laptop that people want to use, with packaging and cooling and emissions and wifi and pointer device and so on, and then taking that through regulatory hurdles and all the other bits, well, that's another problem entirely. Peter's estimate is quite good. So get one of the laptops that coreboot supports and start there. Unless you're at a company that does design routinely it's going to be almost impossible to get something done in a timely manner, and, when you're done, it's unlikely anyone will care. I talked to Mark years ago about the laptop issue, but I ended up concluding that ubuntu was not going to be able to contribute a lot to the effort. ron

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coreboot January 2013