coreboot January 2013

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Patch merged into coreboot/master: 9ad1f56 armv7: dynamically calculate the branch offset in cbfstool
by gerrit＠coreboot.org 10 Jan '13

10 Jan '13

the following patch was just integrated into master: commit 9ad1f56951df3d3877b9ae588909b1cb059c1cd7 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 17:45:19 2013 -0800 armv7: dynamically calculate the branch offset in cbfstool This tidies up the ARMV7 case when creating cbfs: - Calculate the offset using the size of the master header and offsets rather than using a magic constant. - Re-order some assignments so things happen in a logical order. Change-Id: Id9cdbc3389c8bb504fa99436c9771936cc4c1c23 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/2125 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Thu Jan 10 03:03:30 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Jan 10 18:01:13 2013, giving +2 See http://review.coreboot.org/2125 for details. -gerrit

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Patch merged into coreboot/master: 8bc10b7 armv7: delete some unused files
by gerrit＠coreboot.org 10 Jan '13

10 Jan '13

the following patch was just integrated into master: commit 8bc10b74dc36cdefdfb5a1c4457d44d9ec32fa15 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 16:12:23 2013 -0800 armv7: delete some unused files Change-Id: I4601b97cbd7dbfb6ee742b3920d2aac4ac49b958 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/2121 Tested-by: build bot (Jenkins) Reviewed-by: Hung-Te Lin <hungte(a)chromium.org> Build-Tested: build bot (Jenkins) at Thu Jan 10 03:27:12 2013, giving +1 Reviewed-By: Hung-Te Lin <hungte(a)chromium.org> at Thu Jan 10 12:18:51 2013, giving +2 See http://review.coreboot.org/2121 for details. -gerrit

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Re: [coreboot] Permanent solution of the UEFI Secure Boot problem?!
by Maciej Grela 10 Jan '13

10 Jan '13

2013/1/9 Svetoslav Trochev <svetoslav.trochev(a)gmail.com>: > Hi Everyone and Happy New Year. > > This summer I'm planning to buy new laptop. > Also ongoing debates related to UEFI transition and current implementation > of 'Secure Boot' requirement imposed by Microsoft's Windows 8 certification > got me thinking and I would like to share my idea and see how many people > have similar thoughts. Basically boils down to create Coreboot Reference > Hardware for development, testing and daily use of coreboot. Here is my plan > (warning it is not very well thought through): > > 1. See how many people are ready to buy new hardware and are interested to > work on coreboot advancement. [...] > What do you guys think? Am I completely crazy to believe that we can make > material change in our industry? Hi, this seems to be exactly what these guys were doing: https://wiki.ubuntu.com/FreeSoftwareLaptop They even mention coreboot as their BIOS. Have you investigated what is going on with this project? -- Maciej Grela

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Re: [coreboot] Permanent solution of the UEFI Secure Boot problem?!
by Peter Stuge 10 Jan '13

10 Jan '13

Svetoslav Trochev wrote: > I think we have different understanding of 'notice right away'. I don't. > What I'm looking at this stage is contact inside OEM who is open to > listen and willing to help. I don't expect any special treatment > with order of 10 laptops. You will not get any special treatment with an order of 1000 laptops either. The numbers are too small for any OEM to extract the required information from their ODM. Your only real hope of having a modern laptop with coreboot is IMO to port the existing support for modern platforms onto some laptops with that hardware. Starting from zero experience with PC firmware I'd say that it is roughly one man-year of work. Of course it can be paralellized, if you can find others who want to work together with you. Gerrit eagerly anticipates all patches! //Peter

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Patch merged into coreboot/master: 4868a11 snow: add max77686 driver in romstage and ramstage
by gerrit＠coreboot.org 10 Jan '13

10 Jan '13

the following patch was just integrated into master: commit 4868a1179dc1c70ed10cc56cdbc7bfd4fb5fef24 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 16:22:12 2013 -0800 snow: add max77686 driver in romstage and ramstage Change-Id: Id3e20b1ab5d85cfd22e2dae2750f32007b7f8f74 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/2123 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Thu Jan 10 05:38:57 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Jan 10 05:57:05 2013, giving +2 See http://review.coreboot.org/2123 for details. -gerrit

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Patch merged into coreboot/master: 5f6d857 exynos5250: clean-ups for clock_init
by gerrit＠coreboot.org 10 Jan '13

10 Jan '13

the following patch was just integrated into master: commit 5f6d857deaac61b53cfa4e8cbc0abaa63e14fd9b Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 18:06:41 2013 -0800 exynos5250: clean-ups for clock_init This does some clean-up for the exynos5250 clock_init.c: - No global data. - Remove some unused #includes - Hard-code the memory type for Elpida DRAM. This will need to be fixed eventually (or the system will be unstable), but is good enough for early bring-up and until we finish other re-factoring. Change-Id: Icd2cf8ba35058cbd1131666db311dfb77ef1a160 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/2127 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Thu Jan 10 05:31:46 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Jan 10 05:56:30 2013, giving +2 See http://review.coreboot.org/2127 for details. -gerrit

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Patch merged into coreboot/master: 27094b0 exynos5250: un-comment a lot of code which was left out earlier
by gerrit＠coreboot.org 10 Jan '13

10 Jan '13

the following patch was just integrated into master: commit 27094b0afe25caf38e323d5f350be7d89aace366 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 17:42:02 2013 -0800 exynos5250: un-comment a lot of code which was left out earlier Turns out initializing power rails is necessary, even for getting serial output. Change-Id: I3042c1001ae43b1e793ee6cb90bb79b8db0f8fd1 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/2126 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Thu Jan 10 05:25:19 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Jan 10 05:55:46 2013, giving +2 See http://review.coreboot.org/2126 for details. -gerrit

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Patch merged into coreboot/master: 1d5390e size optimizations for max77686
by gerrit＠coreboot.org 10 Jan '13

10 Jan '13

the following patch was just integrated into master: commit 1d5390ecc85f7d0fc25d1a5cbe62ae6fa1abf5e2 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 16:26:26 2013 -0800 size optimizations for max77686 This contains some size optimizations for the Maxim MAX77686 driver: - change max77686_para.vol_{min,div} from u32 to u16 (currently their max value is 50000 so it should be fine) - remove max77686_para.regnum which takes 4 bytes for each and is not used (Patch was originally written by Hung-Te Lin, I'm just uploading it) Change-Id: I24044427c49467e99380d1f60ebc59e69c285b22 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/2124 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Thu Jan 10 05:18:21 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Jan 10 05:54:52 2013, giving +2 See http://review.coreboot.org/2124 for details. -gerrit

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Patch set updated for coreboot: 8cd2350 snow: add max77686 driver in romstage and ramstage
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2123 -gerrit commit 8cd23504fc4459af47f7ea6552baeac148e91de5 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 16:22:12 2013 -0800 snow: add max77686 driver in romstage and ramstage Change-Id: Id3e20b1ab5d85cfd22e2dae2750f32007b7f8f74 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/drivers/maxim/max77686/Makefile.inc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/drivers/maxim/max77686/Makefile.inc b/src/drivers/maxim/max77686/Makefile.inc index b67595f..a5d7b90 100644 --- a/src/drivers/maxim/max77686/Makefile.inc +++ b/src/drivers/maxim/max77686/Makefile.inc @@ -17,4 +17,5 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -ramstage-$(CONFIG_DRIVER_MAXIM_77686) += max77686.c +romstage-$(CONFIG_DRIVER_MAXIM_MAX77686) += max77686.c +ramstage-$(CONFIG_DRIVER_MAXIM_MAX77686) += max77686.c

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Patch set updated for coreboot: 775bfbd exynos5250: clean-ups for clock_init
by David Hendricks 10 Jan '13

10 Jan '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2127 -gerrit commit 775bfbdd6c8a6958b733e272e9ede3cdad9e4fc5 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Jan 9 18:06:41 2013 -0800 exynos5250: clean-ups for clock_init This does some clean-up for the exynos5250 clock_init.c: - No global data. - Remove some unused #includes - Hard-code the memory type for Elpida DRAM. This will need to be fixed eventually (or the system will be unstable), but is good enough for early bring-up and until we finish other re-factoring. Change-Id: Icd2cf8ba35058cbd1131666db311dfb77ef1a160 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5250/clock_init.c | 27 ++++++++------------------- 1 file changed, 8 insertions(+), 19 deletions(-) diff --git a/src/cpu/samsung/exynos5250/clock_init.c b/src/cpu/samsung/exynos5250/clock_init.c index fd2a90f..ea91bb4 100644 --- a/src/cpu/samsung/exynos5250/clock_init.c +++ b/src/cpu/samsung/exynos5250/clock_init.c @@ -22,18 +22,6 @@ * MA 02111-1307 USA */ -#if 0 -#include <common.h> -#include <config.h> -//#include <fdtdec.h> -#include <arch/io.h> -#include <asm/arch/board.h> -#include <asm/arch/clk.h> -#include <asm/arch/clock.h> -#include <cpu/samsung/exynos5250/cpu.h> -#include <asm/arch/gpio.h> -#include <asm/arch-exynos/spl.h> -#endif #include <delay.h> #include <stdlib.h> #include <types.h> @@ -51,8 +39,6 @@ #include "clock_init.h" #include "setup.h" -//DECLARE_GLOBAL_DATA_PTR; - struct arm_clk_ratios arm_clk_ratios[] = { { .arm_freq_mhz = 600, @@ -585,10 +571,16 @@ struct mem_timings mem_timings[] = { */ #define BOARD_REV_ELPIDA_MEMORY 3 #define BOARD_REV_SAMSUNG_MEMORY 4 + +static inline int board_get_revision(void) +{ + /* FIXME: yuck! */ + return BOARD_REV_ELPIDA_MEMORY; +} + static int autodetect_memory(void) { -// int board_rev = board_get_revision(); - int board_rev = BOARD_REV_ELPIDA_MEMORY; + int board_rev = board_get_revision(); if (board_rev == -1) return -1; @@ -749,9 +741,6 @@ struct mem_timings *clock_get_mem_timings(void) return mem; } } - /* TODO: Call panic() here */ - while (1) - ; return NULL; }

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coreboot January 2013