coreboot March 2012

coreboot@coreboot.org

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718 discussions

Patch merged into coreboot/master: 27f7df3 i82801gx: Use CMOS variable if available for power-on on power failure
by gerrit＠coreboot.org 24 Mar '12

24 Mar '12

the following patch was just integrated into master: commit 27f7df35deee7b4ddb78cb4404414bc3295af2a1 Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Tue Nov 22 10:28:46 2011 +0100 i82801gx: Use CMOS variable if available for power-on on power failure We used a hard coded value for some reason. Don't do that, but use CMOS instead. Change-Id: Ib83aa07a3e55bed075150354a060317ebc9d5ba7 Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> Build-Tested: build bot (Jenkins) at Sat Mar 24 15:54:51 2012, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Sat Mar 24 20:37:40 2012, giving +2 See http://review.coreboot.org/443 for details. -gerrit

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#135: Flashrom deletes MAC addresses on Tyan Tomcat n3400B (S2925-E)
by coreboot 24 Mar '12

24 Mar '12

#135: Flashrom deletes MAC addresses on Tyan Tomcat n3400B (S2925-E) ---------------------------------+------------------------------------------ Reporter: Jan@… | Owner: somebody Type: defect | Status: new Priority: major | Milestone: Component: flashrom | Version: v2 Keywords: | Dependencies: Patchstatus: there is no patch | ---------------------------------+------------------------------------------ I've tried updating the BIOS of a Tomcat n3400B (S2925-E). The update itself worked fine, but the MAC addresses of the onboard NVidia-Gigabit Ethernet chips were set to bogus values (66:55:44:33:22:11 or something like that) afterwards. Restoring the old flash backup worked. This does not happen with the official update tool from Tyan. -- Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/135> coreboot <http://www.coreboot.org/>

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Patch merged into coreboot/master: 0f446f7 printf: Remove some L modifier uses
by gerrit＠coreboot.org 24 Mar '12

24 Mar '12

the following patch was just integrated into master: commit 0f446f71c39bd8bff9a399826e584a2863217ca7 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sun Mar 11 19:31:03 2012 +0100 printf: Remove some L modifier uses We use the L modifier in a non-standard way (for long long instead of long double, which we have no business with). clang complains, to reduce its use, to make emulation/qemu-x86 happier. Long term, we should consider eliminating public uses of 'L' (but internal use in vtxprintf to denote long long is fine) Change-Id: If9a17d9ae9925cdc8736445e7d5eedc59c7028c6 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/781 for details. -gerrit

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Re: [coreboot] Can we push using http user/password authentication
by Bao, Zheng 24 Mar '12

24 Mar '12

Hi, Actually, I have done all the settings, including http password. After I run git push, it says, Counting objects: 5, done. Delta compression using up to 4 threads. Compressing objects: 100% (3/3), done. Writing objects: 100% (3/3), 480 bytes, done. Total 3 (delta 2), reused 0 (delta 0) That is all. No error report. But I think it need says more: To http://review.coreboot.org/p/coreboot.git * [new branch] HEAD -> refs/for/master Any settings I missed? Zheng > -----Original Message----- > From: thomasg [mailto:thomas@gstaedtner.net] > Sent: Friday, March 23, 2012 4:46 PM > To: Bao, Zheng > Cc: coreboot(a)coreboot.org > Subject: Re: [coreboot] Can we push using http user/password > authentication > > On Fri, Mar 23, 2012 at 07:33, Bao, Zheng <Zheng.Bao(a)amd.com> wrote: > > Hi, > > These commits are uploaded at my home by ssh:29418. In our lab, it is > blocked by firewall. But I cannot go back home every time when I need > to push. > > > > Zheng > > > >> -----Original Message----- > >> From: coreboot-bounces(a)coreboot.org [mailto:coreboot- > >> bounces(a)coreboot.org] On Behalf Of pk > >> Sent: Friday, March 23, 2012 2:11 PM > >> To: coreboot(a)coreboot.org > >> Subject: Re: [coreboot] Can we push using http user/password > >> authentication > >> > >> On 2012-03-23 04:31, Bao, Zheng wrote: > >> > Hi, > >> > In our lab, we need to get access the repository > >> >by http because of the firewall. I tried to push > >> >my commit through http. It didn't say anything wrong. > >> >But I cannot see my change on gerrit. I am wondering > >> >if http really works. Does it? > >> > >> Hi, > >> > >> I'm just a lurker on this mail list... but I can see gerrit commits > >> mailed to this list. > >> > >> Cut from an example: > >> > >> "Zheng Bao (zheng.bao(a)amd.com) just uploaded a new patch set to > gerrit, > >> which you can find at http://review.coreboot.org/620 > >> > >> -gerrit > >> > >> commit e384f2026c59b7e7f774f34f6f9e9287bdc8868b > >> Author: zbao <fishbaozi(a)gmail.com> > >> Date: ? Thu Mar 22 18:33:33 2012 +0800 > >> > >> ? ? Add sb800 spi support." > >> > >> HTH > >> > >> Best regards > >> > >> Peter K > >> > >> -- > >> coreboot mailing list: coreboot(a)coreboot.org > >> http://www.coreboot.org/mailman/listinfo/coreboot > > > > > > > > -- > > coreboot mailing list: coreboot(a)coreboot.org > > http://www.coreboot.org/mailman/listinfo/coreboot > > Generally this works for Gerrit, not 100% sure if it is correctly > configured for coreboots gerrit instance. > You have to use the URI http://review.coreboot.org/p/coreboot.git > You will also have to generate a HTTP password at > http://review.coreboot.org/#/settings/http-password > Lastly at least git 1.6.6 is required for this to work. > > Hope this helps.

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Patch set updated for coreboot: 98907a6 i82801gx: Support power-on-after-power-fail better
by Patrick Georgi 24 Mar '12

24 Mar '12

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/444 -gerrit commit 98907a679ecb191ab7f7d93d7c325079d9f69107 Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Tue Nov 22 10:52:43 2011 +0100 i82801gx: Support power-on-after-power-fail better Changing CMOS value for power-on-after-power-fail was only honored after reboot, which is counter intuitive (set from "enable" to "disable", power-off, replug device -> device turns on; and similar cases). Change-Id: If1d88c1c34c3333b636ed3ec1e1fb9bea394e615 Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> --- src/southbridge/intel/i82801gx/smihandler.c | 14 +++++++------- 1 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c index 5cc25e7..401c9ad 100644 --- a/src/southbridge/intel/i82801gx/smihandler.c +++ b/src/southbridge/intel/i82801gx/smihandler.c @@ -316,16 +316,16 @@ static void southbridge_smi_sleep(unsigned int node, smm_state_save_area_t *stat outl(0, pmbase + GPE0_EN); - /* Should we keep the power state after a power loss? - * In case the setting is "ON" or "OFF" we don't have - * to do anything. But if it's "KEEP" we have to switch - * to "OFF" before entering S5. + /* Always set the flag in case CMOS was changed on runtime. For + * "KEEP", switch to "OFF" - KEEP is software emulated */ - if (s5pwr == MAINBOARD_POWER_KEEP) { - reg8 = pcie_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3); + reg8 = pcie_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3); + if (s5pwr == MAINBOARD_POWER_ON) { + reg8 &= ~1; + } else { reg8 |= 1; - pcie_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3, reg8); } + pcie_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3, reg8); /* also iterates over all bridges on bus 0 */ busmaster_disable_on_bus(0);

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Patch set updated for coreboot: 27f7df3 i82801gx: Use CMOS variable if available for power-on on power failure
by Patrick Georgi 24 Mar '12

24 Mar '12

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/443 -gerrit commit 27f7df35deee7b4ddb78cb4404414bc3295af2a1 Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Tue Nov 22 10:28:46 2011 +0100 i82801gx: Use CMOS variable if available for power-on on power failure We used a hard coded value for some reason. Don't do that, but use CMOS instead. Change-Id: Ib83aa07a3e55bed075150354a060317ebc9d5ba7 Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> --- src/southbridge/intel/i82801gx/smihandler.c | 12 ++++++++---- 1 files changed, 8 insertions(+), 4 deletions(-) diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c index 48375e4..5cc25e7 100644 --- a/src/southbridge/intel/i82801gx/smihandler.c +++ b/src/southbridge/intel/i82801gx/smihandler.c @@ -279,12 +279,16 @@ static void southbridge_smi_sleep(unsigned int node, smm_state_save_area_t *stat u8 reg8; u32 reg32; u8 slp_typ; - /* FIXME: the power state on boot should be read from - * CMOS or even better from GNVS. Right now it's hard - * coded at compile time. - */ u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL; + // save and recover RTC port values + u8 tmp70, tmp72; + tmp70 = inb(0x70); + tmp72 = inb(0x72); + get_option(&s5pwr, "power_on_after_fail"); + outb(tmp70, 0x70); + outb(tmp72, 0x72); + /* First, disable further SMIs */ reg8 = inb(pmbase + SMI_EN); reg8 &= ~SLP_SMI_EN;

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Re: [coreboot] porting asus l1n64
by Julian Shulika 24 Mar '12

24 Mar '12

Hi. Please,scomeone,add these files to coreboot project (attached archive). I've fount that Asus L1N64 is very similar to Asus M2N-E as hardware (mcp+ite8716f+adt7475) and pcb So I fix m2n-e files for diffrent socket *Socket_F*, add *select DIMM_REGISTERED* , turn on *device pci e.0 on end* I can't read any information from i2c-tools . I have the similar log from Asus M2N-E, I could continue after I replaced memory stick to last dimm. At this board Asus L1n64 two first dimms connect to CPU0,others - to CPU1, I've tried all variants - nothing change. Maybe someone can explain how these two mcp55 aree connected between them to nforce 680a. Scheme of this board,look at attached image Log from serial, system turned off then coreboot-4.0-2135-gccee625-dirty Thu Mar 22 20:45:03 EDT 2012 starting... *sysinfo range: [000cf000,000cf730] bsp_apicid=0x00 Enabling routing table for node 00 done. Enabling UP settings coherent_ht_finalize done core0 started: started ap apicid: * AP 01started SBLink=01 NC node|link=00 busn=40 NC node|link=01 entering optimize_link_incoherent_ht sysinfo->link_pair_num=0x2 entering ht_optimize_link pos=0xaa, unfiltered freq_cap=0x8075 pos=0xaa, filtered freq_cap=0x75 pos=0x52, unfiltered freq_cap=0x807f pos=0x52, filtered freq_cap=0x7f freq_cap1=0x75, freq_cap2=0x7f dev1 old_freq=0x0, freq=0x6, needs_reset=0x1 dev2 old_freq=0x0, freq=0x6, needs_reset=0x1 width_cap1=0x11, width_cap2=0x11 dev1 input ln_width1=0x4, ln_width2=0x4 dev1 input width=0x1 dev1 output ln_width1=0x4, ln_width2=0x4 dev1 input|output width=0x11 old dev1 input|output width=0x11 dev2 input|output width=0x11 old dev2 input|output width=0x11 after ht_optimize_link for link pair 0, reset_needed=0x1 entering ht_optimize_link pos=0x8a, unfiltered freq_cap=0x8075 pos=0x8a, filtered freq_cap=0x75 pos=0x52, unfiltered freq_cap=0x807f pos=0x52, filtered freq_cap=0x7f freq_cap1=0x75, freq_cap2=0x7f dev1 old_freq=0x0, freq=0x6, needs_reset=0x1 dev2 old_freq=0x0, freq=0x6, needs_reset=0x1 width_cap1=0x11, width_cap2=0x11 dev1 input ln_width1=0x4, ln_width2=0x4 dev1 input width=0x1 dev1 output ln_width1=0x4, ln_width2=0x4 dev1 input|output width=0x11 old dev1 input|output width=0x11 dev2 input|output width=0x11 old dev2 input|output width=0x11 after ht_optimize_link for link pair 1, reset_needed=0x1 after optimize_link_read_pointers_chain, reset_needed=0x1 mcp55_num:01

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Can we push using http user/password authentication
by Bao, Zheng 24 Mar '12

24 Mar '12

Hi, In our lab, we need to get access the repository by http because of the firewall. I tried to push my commit through http. It didn't say anything wrong. But I cannot see my change on gerrit. I am wondering if http really works. Does it? Zheng

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Re: [coreboot] GSoC 2012
by Marc Jones 23 Mar '12

23 Mar '12

On Sat, Mar 17, 2012 at 9:45 AM, Marc Jones <marcj303(a)gmail.com> wrote: > coreboot was not selected to participate in GSoC 2012. This is > disappointing new for the project. I do not know why we were not > selected this year. I will attend the post selection meeting to see > what we can do to improve our chances of selection next year. > > Students, thank you for your interest in coreboot. We are happy that > you are engaging with our community. I hope that you continue > exploring your interest in coreboot. Please let us know what we can do > to assist you in your learning. > > Feel free to send me questions, comments, or concerns. > > Regards, > Marc > > http://google-opensource.blogspot.com/ We attended the GSoC rejection meeting this morning. The main feedback was to improve our projects ideas page. Our ideas were not flushed out enough and we didn't have a complete mentors list/assignment. The ideas page weighed more heavily than the org applications this year. It seems that (now) most orgs do a good job on the application, so the ideas page and mentor list is the defereniator. GSoC snuck up on me this year and I did a called for mentors too late. We were not organized well enough, early enough. I think that is my fault and I apologize. This year, we have the opportunity to put more thought into the direction of coreboot and projects, flushout the idea on the wiki and be more prepaired for next year. I can use your help in this. Please start editing the wiki. Regards, Marc -- http://se-eng.com

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Re: [coreboot] Can we push using http user/password authentication
by thomasg 23 Mar '12

23 Mar '12

On Fri, Mar 23, 2012 at 10:54, Bao, Zheng <Zheng.Bao(a)amd.com> wrote: > Hi, > Actually, I have done all the settings, including http password. > After I run git push, it says, > > Counting objects: 5, done. > Delta compression using up to 4 threads. > Compressing objects: 100% (3/3), done. > Writing objects: 100% (3/3), 480 bytes, done. > Total 3 (delta 2), reused 0 (delta 0) > > That is all. No error report. But I think it need says more: > > To http://review.coreboot.org/p/coreboot.git > * [new branch] HEAD -> refs/for/master > > Any settings I missed? > > Zheng > Hi Zheng, At the very least it should prompt for your HTTP password. It looks to me like a configuration problem with coreboots gerrit instance, possibly a proxy/webserver misconfiguration. Checking out via HTTP works just fine, unfortunately I can't test pushing because I have nothing relevant to push :) CCing Stefan Reinauer as he is the admin of the machine running gerrit I think, maybe he can look into it (hope I don't overstep my boundaries here). ~thomasg > >> -----Original Message----- >> From: thomasg [mailto:thomas@gstaedtner.net] >> Sent: Friday, March 23, 2012 4:46 PM >> To: Bao, Zheng >> Cc: coreboot(a)coreboot.org >> Subject: Re: [coreboot] Can we push using http user/password >> authentication >> >> On Fri, Mar 23, 2012 at 07:33, Bao, Zheng <Zheng.Bao(a)amd.com> wrote: >> > Hi, >> > These commits are uploaded at my home by ssh:29418. In our lab, it is >> blocked by firewall. But I cannot go back home every time when I need >> to push. >> > >> > Zheng >> > >> >> -----Original Message----- >> >> From: coreboot-bounces(a)coreboot.org [mailto:coreboot- >> >> bounces(a)coreboot.org] On Behalf Of pk >> >> Sent: Friday, March 23, 2012 2:11 PM >> >> To: coreboot(a)coreboot.org >> >> Subject: Re: [coreboot] Can we push using http user/password >> >> authentication >> >> >> >> On 2012-03-23 04:31, Bao, Zheng wrote: >> >> > Hi, >> >> > In our lab, we need to get access the repository >> >> >by http because of the firewall. I tried to push >> >> >my commit through http. It didn't say anything wrong. >> >> >But I cannot see my change on gerrit. I am wondering >> >> >if http really works. Does it? >> >> >> >> Hi, >> >> >> >> I'm just a lurker on this mail list... but I can see gerrit commits >> >> mailed to this list. >> >> >> >> Cut from an example: >> >> >> >> "Zheng Bao (zheng.bao(a)amd.com) just uploaded a new patch set to >> gerrit, >> >> which you can find at http://review.coreboot.org/620 >> >> >> >> -gerrit >> >> >> >> commit e384f2026c59b7e7f774f34f6f9e9287bdc8868b >> >> Author: zbao <fishbaozi(a)gmail.com> >> >> Date: ? Thu Mar 22 18:33:33 2012 +0800 >> >> >> >> ? ? Add sb800 spi support." >> >> >> >> HTH >> >> >> >> Best regards >> >> >> >> Peter K >> >> >> >> -- >> >> coreboot mailing list: coreboot(a)coreboot.org >> >> http://www.coreboot.org/mailman/listinfo/coreboot >> > >> > >> > >> > -- >> > coreboot mailing list: coreboot(a)coreboot.org >> > http://www.coreboot.org/mailman/listinfo/coreboot >> >> Generally this works for Gerrit, not 100% sure if it is correctly >> configured for coreboots gerrit instance. >> You have to use the URI http://review.coreboot.org/p/coreboot.git >> You will also have to generate a HTTP password at >> http://review.coreboot.org/#/settings/http-password >> Lastly at least git 1.6.6 is required for this to work. >> >> Hope this helps. >

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coreboot March 2012