coreboot October 2012

coreboot@coreboot.org

34 participants
312 discussions

Re: [coreboot] Generic AMD E350 Support
by David Hendricks 16 Oct '12

16 Oct '12

On Tue, Oct 16, 2012 at 5:01 PM, Graeme Russ <graeme.russ(a)gmail.com> wrote: > Hi Peter, > > On Wed, Oct 17, 2012 at 10:57 AM, Peter Stuge <peter(a)stuge.se> wrote: > > Graeme Russ wrote: > >> I've taken some hi-res photos using a DLSR with a macro lens. > > > > Where can I see them? Can upload at http://ge.tt/ or another favorite > > image hoster. > > I'll hopefully upload them tonight (10 hours or so) > BTW -- try to peak under the southbridge heatsink if it's not too much of a hassle. -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

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Re: [coreboot] Generic AMD E350 Support
by Peter Stuge 16 Oct '12

16 Oct '12

Graeme Russ wrote: > I cannot even identify the flash chip. If you take a photo we can help point it out. You're looking for a part number matching 25.?F(08|16|32) on a chip that might have an ink dot on it. //Peter

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Re: [coreboot] Generic AMD E350 Support
by Graeme Russ 16 Oct '12

16 Oct '12

Hi Peter, On Tue, Oct 16, 2012 at 4:22 PM, Graeme Russ <graeme.russ(a)gmail.com> wrote: > Hi Peter, > > On Tue, Oct 16, 2012 at 1:51 PM, Peter Stuge <peter(a)stuge.se> wrote: >> Graeme Russ wrote: >>> I have an in-circuit SPI programmer, but there is no header on the >>> motherboard to get at the flash chip - I may need to jury-rig some >>> kind of connection to the flash chip (as soon as I locate it). >> >> The flash chip may be socketed, in which case you can glue a knob to >> it for easy moving back and forth. > > No such luck - None of the chips are socketed :( I'm thinking I may be > able to use a very fine tipped soldering iron to attach a jumper > header. Even worse - I cannot even identify the flash chip. I've looked at the part numbers for all the 8-pin chips (SPI flash chips are typically 8-pin SOIC). I've found a RT9214 PWM controller and an LM358G dual op-amp and a few I can't get Google hits on (still trying). Regards, Graeme

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Re: [coreboot] #188: gcc-4.7 miscompiles coreboot on -Os, -O1, -O2, -O3 in 3 different ways
by Peter Stuge 16 Oct '12

16 Oct '12

Hristo Venev wrote: > It turned out that gcc was trying to use a xmm register. But I had set > coreboot to > build for qemu. This means SSE is disabled. If I enable SSE from > .config, it gets > initialized in romstage (I think) so it even compiles with gcc > -march=corei7 -O3. > Maybe -march should be set by Kconfig according to the CPU. Please send patches to fix this. That would be great. //Peter

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Re: [coreboot] [SeaBIOS] USB Problems geode lx800
by Kevin O'Connor 16 Oct '12

16 Oct '12

On Sun, Oct 14, 2012 at 07:48:00PM +0000, Christian Gmeiner wrote: > On 11 Oct 2012 16:42, "Christian Gmeiner" <christian.gmeiner(a)gmail.com> > wrote: > > 2012/10/11 Christian Gmeiner <christian.gmeiner(a)gmail.com>: > > > 2012/10/11 Kevin O'Connor <kevin(a)koconnor.net>: > > >> On Tue, Oct 09, 2012 at 02:31:05PM +0200, Christian Gmeiner wrote: > > >>> 2012/10/9 Kevin O'Connor <kevin(a)koconnor.net>: > > >>> > On Mon, Oct 08, 2012 at 02:14:03PM +0200, Christian Gmeiner wrote: > > >>> >> HI all > > >>> >> > > >>> >> I am running into some usb problems with coreboot & seabios: > > >>> > Can you set the debug level to 8 and post the whole log? Also, for > > >>> > timeout issues, having timestamps (via tools/readserial.py tool) > > >>> > sometimes helps. [...] > Kevin do you have an idea what could be wrong? I haven't had a chance to take a look at it. Something odd is going on, as it appears the transfer that's failing isn't even being started. I'll see if I can take a look this week. -Kevin

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Re: [coreboot] Generic AMD E350 Support
by Peter Stuge 15 Oct '12

15 Oct '12

Graeme Russ wrote: > I have an in-circuit SPI programmer, but there is no header on the > motherboard to get at the flash chip - I may need to jury-rig some > kind of connection to the flash chip (as soon as I locate it). The flash chip may be socketed, in which case you can glue a knob to it for easy moving back and forth. > Can I assume a particular south-bridge chip I think there is only one chip. > > Depending on your experience and skill should expect to spend some > > months on the project. > > I have a fair bit of experience (x86 port of U-Boot) so once I get > access to the Flash, I should be able to hack it pretty quickly. Maybe you'll be interested in Rudolf's work on making U-Boot run as a coreboot payload. > Does the E350M1 port fully support booting and running Linux > (including PCIe etc.)? Yes, it's rather complete, there may still be a glitch or two, but it's pretty good. //Peter

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Re: [coreboot] Generic AMD E350 Support
by ron minnich 15 Oct '12

15 Oct '12

Install linux and fine out. Run the usual lspci -xxx and -v -v and so on, and run every other tool that applies and save all the output. You'll need it :-) ron

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Re: [coreboot] Generic AMD E350 Support
by Peter Stuge 15 Oct '12

15 Oct '12

Graeme Russ wrote: > E350, I'm inclined to assume that this could be used as a solid > foundation for the I35CT. Is this a valid assumption to make? Sure. > What would be the best approach to porting coreboot to the I35CT? Build an E350M1 image and try it out. > What tricks and traps can I expect? The board will not boot and you will need to learn how to debug firmware. You will also need to study the AMD-contributed code under vendorcode/ and try to make sense of the hundreds of settings that you will need to adapt to your board design, after you have reverse engineered how the mainboard layout differs from the E350M1. Absolute minimum requirements are some kind of flash programmer and a null modem serial cable. A logic analyzer is helpful. Depending on your experience and skill should expect to spend some months on the project. //Peter

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Patch merged into coreboot/master: 386758f Update SeaBIOS stable to the release-1.7.1 commit
by gerrit＠coreboot.org 15 Oct '12

15 Oct '12

the following patch was just integrated into master: commit 386758f46625a3e61b44bc9342f48d261e895091 Author: Peter Stuge <peter(a)stuge.se> Date: Tue Oct 16 02:25:07 2012 +0200 Update SeaBIOS stable to the release-1.7.1 commit Change-Id: I0dffe89c31e45914f795d9ad8efb787b5fdbb7a8 Signed-off-by: Peter Stuge <peter(a)stuge.se> Build-Tested: build bot (Jenkins) at Tue Oct 16 03:21:06 2012, giving +1 Reviewed-By: Peter Stuge <peter(a)stuge.se> at Tue Oct 16 03:31:05 2012, giving +2 See http://review.coreboot.org/1583 for details. -gerrit

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Generic AMD E350 Support
by Graeme Russ 15 Oct '12

15 Oct '12

Hi Guys, I have just purchased a AMD E350 based motherboard (an I35CT from Qotom). I plan to use this board as the basis of a 100% FLOSS media centre (coreboot + Linux + XBMC). I notice that there are already support for the Asus E35M1 - Given the highly integrated nature of the E350, I'm inclined to assume that this could be used as a solid foundation for the I35CT. Is this a valid assumption to make? What would be the best approach to porting coreboot to the I35CT? What tricks and traps can I expect? Regards, Graeme

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coreboot October 2012