coreboot January 2012

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Patch merged into coreboot/master: cc61aab vga: removed inclusion of .c files
by gerrit＠coreboot.org 27 Jan '12

27 Jan '12

the following patch was just integrated into master: commit cc61aab7ee914f435b30eeaad42d93730a4eb9f6 Author: Vikram Narayanan <vikram186(a)gmail.com> Date: Wed Jan 25 20:40:40 2012 +0530 vga: removed inclusion of .c files Add local vga.h for prototypes. Change-Id: I5ff627c6420d4b7fd1bc9a537f406ef6d9597522 Signed-off-by: Vikram Narayanan <vikram186(a)gmail.com> Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Build-Tested: build bot (Jenkins) at Fri Jan 27 18:17:09 2012, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Fri Jan 27 20:07:00 2012, giving +2 See http://review.coreboot.org/588 for details. -gerrit

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Re: [coreboot] Inagua: Synchronize AMD/inagua mainboard.
by Marc Jones 27 Jan '12

27 Jan '12

On Fri, Jan 27, 2012 at 7:43 AM, Wolfgang Kamp - datakamp <wmkamp(a)datakamp.de> wrote: > > > Hello Marc, > > in the meantime I debugged my Ubuntu restart problem a little bit further. > > The issue seems to be hardware dependant because the Persimmon platform with T56N APU and A55E Hudson works fine and > a similar platform (Qseven card) with T40E APU and Hudson A50E does not. I can use nearly the same coreboot build. > > Things getting strange in the file .../f14/Proc/Mem/NB/ON/mndcton.c function MemNStitchMemoryON > > if ((MemNGetBitFieldNb (NBPtr, BFCSBaseAddr0Reg + q) & 7) == 0) { HERE WE FAIL!!, BFCSBaseAddr0Reg is not zero!! > > This leads later to > > PutEventLog (AGESA_FATAL, MEM_ERROR_NO_DIMM_FOUND_ON_SYSTEM, 0, 0, 0, 0, &NBPtr->MemPtr->StdHeader); HERE ALL ENDS!!! > > And here ends all with no memory. > > On Persimmon BFCSBaseAddr0Reg is zero so we are getting in the IF branch and things going on. > > > BOOLEAN > MemNStitchMemoryON ( > IN OUT MEM_NB_BLOCK *NBPtr > ) > { > UINT32 NxtCSBase; > UINT32 CurCSBase; > UINT32 CsSize; > UINT32 BiggestBank; > UINT8 p; > UINT8 q; > UINT8 BiggestDimm; > DIE_STRUCT *MCTPtr; > DCT_STRUCT *DCTPtr; > MCTPtr = NBPtr->MCTPtr; > DCTPtr = NBPtr->DCTPtr; > > DCTPtr->Timings.CsEnabled = 0; > NxtCSBase = 0; > for (p = 0; p < MAX_CS_PER_CHANNEL_ON; p++) { > BiggestBank = 0; > BiggestDimm = 0; > for (q = 0; q < MAX_CS_PER_CHANNEL_ON; q++) { > printk(BIOS_DEBUG, "q = %x, Timings.CsPresent = %x, Timings.CsTestFail = %x\n", q, DCTPtr->Timings.CsPresent, DCTPtr->Timings.CsTestFail); //kamod > if (((DCTPtr->Timings.CsPresent & ~DCTPtr->Timings.CsTestFail) & ((UINT16)1 << q)) != 0) { > printk(BIOS_DEBUG, "1st IF is true \n"); //kamod > if ((MemNGetBitFieldNb (NBPtr, BFCSBaseAddr0Reg + q) & 7) == 0) { HERE WE FAIL!!, BFCSBaseAddr0Reg is not zero > // (CSEnable|Spare==1)bank is not enabled yet > printk(BIOS_DEBUG, "2nd IF is true \n"); //kamod > CsSize = MemNGetBitFieldNb (NBPtr, BFCSMask0Reg + (q >> 1)); > printk(BIOS_DEBUG, "CsSize = %x \n", CsSize); //kamod > if (CsSize != 0) { > CsSize += ((UINT32)1 << 19); > CsSize &= 0xFFF80000; > } > if (CsSize > BiggestBank) { > BiggestBank = CsSize; > BiggestDimm = q; > } > } > } > } > > if (BiggestBank != 0) { > CurCSBase = NxtCSBase; > CurCSBase |= ((UINT32)1 << BFCSEnable); > NxtCSBase += BiggestBank; > if ((BiggestDimm & 1) != 0) { > if ((DCTPtr->Timings.DimmMirrorPresent & (1 << (BiggestDimm >> 1))) != 0) { > CurCSBase |= ((UINT32)1 << BFOnDimmMirror); > } > } > MemNSetBitFieldNb (NBPtr, BFCSBaseAddr0Reg + BiggestDimm, CurCSBase); > DCTPtr->Timings.CsEnabled |= (1 << BiggestDimm); > } > if ((DCTPtr->Timings.CsTestFail & ((UINT16)1 << p)) != 0) { > MemNSetBitFieldNb (NBPtr, (BFCSBaseAddr0Reg + p), (UINT32)1 << BFTestFail); > } > } > > if (NxtCSBase != 0) { > DCTPtr->Timings.DctMemSize = NxtCSBase >> 8; // Scale base address from [39:8] to [47:16] > NBPtr->MCTPtr->NodeMemSize += NBPtr->DCTPtr->Timings.DctMemSize; > NBPtr->MCTPtr->NodeSysLimit = NBPtr->MCTPtr->NodeMemSize - 1; > } else { > printk(BIOS_DEBUG, "NxtCSBase = %x \n", NxtCSBase); //kamod > PutEventLog (AGESA_FATAL, MEM_ERROR_NO_DIMM_FOUND_ON_SYSTEM, 0, 0, 0, 0, &NBPtr->MemPtr->StdHeader); HERE ALL ENDS!!! > SetMemError (AGESA_FATAL, MCTPtr); > } > > return (BOOLEAN) (MCTPtr->ErrCode < AGESA_FATAL); > } > > > What I have done was to change the way Ubuntu restarts. If I set reboot=acpi restart works. > That is strange. This isn't something I have seen before. I have been working on making the acpi tables better, but we have a ways to go. Following that function through, is it failing a PCI register read? How is Linux doing the reset? Maybe there is some missing southbridge configuration on that type of reset that leaves the CPU is a funny state? Marc > > Thanks > > Wolfgang > > > -----Ursprüngliche Nachricht----- > Von: coreboot-bounces+wmkamp=datakamp.de(a)coreboot.org [mailto:coreboot-bounces+wmkamp=datakamp.de@coreboot.org] Im Auftrag von Wolfgang Kamp - datakamp > Gesendet: Mittwoch, 25. Januar 2012 17:24 > An: coreboot(a)coreboot.org > Betreff: Re: [coreboot] Change in coreboot[master]: Inagua: Synchronize AMD/inagua mainboard. > > > Hello Marc, > > my debugging shows that SPD reading is ok after Warmstart. This can not be the problem. > The error check reports 7 errors when system hangs. Is there a problem with cache as RAM? > Is the buffer of SPD data corrupt? > I don't know what code here really does. > Have you an idea what I can do next? > > > mmflow.c > > //---------------------------------------------------------------- > // Check for errors and return > //---------------------------------------------------------------- > AGESA_TESTPOINT (TpProcMemEnd, &MemPtr->StdHeader); > for (Die = 0; Die < DieCount; Die++) { > if (NBPtr[Die].MCTPtr->ErrCode > Retval) { > Retval = NBPtr[Die].MCTPtr->ErrCode; > } > } > printk(BIOS_DEBUG, "TpProcMemEnd Retval = 0x%x \n", Retval); > return Retval; > } > > > Regards, > > Wolfgang > > > -----Ursprüngliche Nachricht----- > Von: Marc Jones [mailto:marcj303@gmail.com] > Gesendet: Dienstag, 24. Januar 2012 19:15 > An: Wolfgang Kamp - datakamp > Cc: coreboot(a)coreboot.org > Betreff: Re: [coreboot] Change in coreboot[master]: Inagua: Synchronize AMD/inagua mainboard. > > On Tue, Jan 24, 2012 at 5:38 AM, Wolfgang Kamp - datakamp <wmkamp(a)datakamp.de> wrote: >> >> Hi Marc, >> >> DIMM address and i2c address are ok. >> Please look at the log. I think the SB800 is unaccessable. >> >> Regards >> >> Wolfgang >> > > The sb800 is accessible, it is fetching rom and initializing devices that it sees: > > sb800_enable() PCI: 00:11.0 [1002/4390] enabled > sb800_enable() PCI: 00:12.0 [1002/4397] ops > PCI: 00:12.0 [1002/4397] enabled > sb800_enable() PCI: Static device PCI: 00:12.1 not found, disabling it. > sb800_enable() PCI: 00:12.2 [1002/4396] ops > PCI: 00:12.2 [1002/4396] enabled > sb800_enable() PCI: 00:13.0 [1002/4397] ops > PCI: 00:13.0 [1002/4397] enabled > sb800_enable() PCI: Static device PCI: 00:13.1 not found, disabling it. > sb800_enable() PCI: 00:13.2 [1002/4396] ops > PCI: 00:13.2 [1002/4396] enabled > sb800_enable() sm_init(). > . > PCI: 00:14.0 [1002/4385] enabled > sb800_enable() PCI: Static device PCI: 00:14.1 not found, disabling it. > sb800_enable() hda enabled > PCI: 00:14.2 [1002/4383] ops > PCI: 00:14.2 [1002/4383] enabled > > > !4.0 is the smbus device, so that is enabled. I think that you need to see what in the spd read fails. Also, see if you can read it earlier in the init. There could be a different device setting that causes the problem. Check that te SMbus enable is set as expected. Check that the PM registers that set the iobase are accessible. > > Marc > > >> -----Ursprüngliche Nachricht----- >> Von: Marc Jones [mailto:marcj303@gmail.com] >> Gesendet: Freitag, 20. Januar 2012 18:46 >> An: Wolfgang Kamp - datakamp >> Cc: coreboot(a)coreboot.org >> Betreff: Re: [coreboot] Change in coreboot[master]: Inagua: Synchronize AMD/inagua mainboard. >> >> On Fri, Jan 20, 2012 at 9:45 AM, Wolfgang Kamp - datakamp >> <wmkamp(a)datakamp.de> wrote: >>> Hello Marc, >>> >>> I reviewed the code and it looks good. >>> But real testing shows an issue with soft restart (UBUNTU). >>> The southbridge seems to hang. Coreboot stops because it could not read the SPI ROM of DIMM Module. >>> Please see logs. >>> The cold start log also reports errors but will successful boot Ubuntu. >>> >>> Regards >>> >>> Wolfgang >>> >> >> Woflgang, >> >> The ASSERTs in the passing case are non-critical failures for early >> heap use. These are AGESA bugs and have been reported to AMD, but they >> are not critical. >> >> As you said, The bad failure is this one: >> >> EventLog: EventClass = 7, EventInfo = 4011c00. >> Param1 = 0, Param2 = 0. >> Param3 = 0, Param4 = 0. >> >> Which is the SPD problem... >> #define MEM_ERROR_NO_DIMM_FOUND_ON_SYSTEM 0x04011C00 ///< No DIMMs >> have been found >> >> Can you check what happens in AmdMemoryReadSPD(), in dimmSpd.c? Does >> it check the correct dimm address? Is the i2c io address set >> correctly? >> >> Thanks, >> Marc >> >> >> >> >> >>> >>> >>> -----Ursprüngliche Nachricht----- >>> Von: gerrit code review [mailto:gerrit@coreboot.org] >>> Gesendet: Freitag, 20. Januar 2012 00:52 >>> An: Wolfgang Kamp - datakamp >>> Cc: Kerry Sheh >>> Betreff: Change in coreboot[master]: Inagua: Synchronize AMD/inagua mainboard. >>> >>> From Marc Jones <marcj303(a)gmail.com>: >>> >>> Hello Wolfgang Kamp, >>> >>> I'd like you to do a code review. Please visit >>> >>> http://review.coreboot.org/542 >>> >>> to review the following change. >>> >>> Change subject: Inagua: Synchronize AMD/inagua mainboard. >>> ..................................................................... >>> >>> Inagua: Synchronize AMD/inagua mainboard. >>> >>> AMD/persimmon mainboard code is derived from AMD/inagua mainbard. >>> Persimmom update a lot in the last few month, sync these modification to inagua. >>> >>> Change-Id: Ia038e5a2b9550fe81bb075f31e30b98354758e9e >>> Signed-off-by: Kerry Sheh <shekairui(a)gmail.com> >>> Signed-off-by: Kerry Sheh <kerry.she(a)amd.com> >>> --- >>> M src/mainboard/amd/inagua/BiosCallOuts.c >>> M src/mainboard/amd/inagua/BiosCallOuts.h >>> M src/mainboard/amd/inagua/Kconfig >>> M src/mainboard/amd/inagua/Makefile.inc >>> M src/mainboard/amd/inagua/OptionsIds.h >>> M src/mainboard/amd/inagua/PlatformGnbPcie.c >>> D src/mainboard/amd/inagua/acpi/ssdt2.asl >>> D src/mainboard/amd/inagua/acpi/ssdt3.asl >>> D src/mainboard/amd/inagua/acpi/ssdt4.asl >>> D src/mainboard/amd/inagua/acpi/ssdt5.asl >>> M src/mainboard/amd/inagua/acpi_tables.c >>> M src/mainboard/amd/inagua/agesawrapper.c >>> M src/mainboard/amd/inagua/agesawrapper.h >>> M src/mainboard/amd/inagua/buildOpts.c >>> M src/mainboard/amd/inagua/devicetree.cb >>> M src/mainboard/amd/inagua/dimmSpd.c >>> M src/mainboard/amd/inagua/dsdt.asl >>> M src/mainboard/amd/inagua/fadt.c >>> M src/mainboard/amd/inagua/get_bus_conf.c >>> M src/mainboard/amd/inagua/irq_tables.c >>> M src/mainboard/amd/inagua/mainboard.c >>> M src/mainboard/amd/inagua/mptable.c >>> M src/mainboard/amd/inagua/platform_cfg.h >>> M src/mainboard/amd/inagua/romstage.c >>> 24 files changed, 249 insertions(+), 717 deletions(-) >>> >>> >>> git pull ssh://review.coreboot.org:29418/coreboot >>> refs/changes/42/542/2 >>> -- >>> To view, visit http://review.coreboot.org/542 To unsubscribe, visit >>> http://review.coreboot.org/settings >>> >>> Gerrit-MessageType: newchange >>> Gerrit-Change-Id: Ia038e5a2b9550fe81bb075f31e30b98354758e9e >>> Gerrit-PatchSet: 2 >>> Gerrit-Project: coreboot >>> Gerrit-Branch: master >>> Gerrit-Owner: Kerry Sheh <shekairui(a)gmail.com> >>> Gerrit-Reviewer: Kerry Sheh <shekairui(a)gmail.com> >>> Gerrit-Reviewer: Wolfgang Kamp <wmkamp(a)datakamp.de> >>> Gerrit-Reviewer: build bot (Jenkins) >>> >>> >>> >>> >>> -- >>> coreboot mailing list: coreboot(a)coreboot.org >>> http://www.coreboot.org/mailman/listinfo/coreboot >> >> >> >> -- >> http://se-eng.com >> >> >> >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> http://www.coreboot.org/mailman/listinfo/coreboot > > > > -- > http://se-eng.com > > > > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot -- http://se-eng.com

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New patch to review for coreboot: f92871b Another indirection for normal/fallback bootblock
by Patrick Georgi 27 Jan '12

27 Jan '12

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/589 -gerrit commit f92871b7ea66f9bbce81bbc08734cae2adbf0969 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Jan 7 19:15:43 2012 +0100 Another indirection for normal/fallback bootblock Provide a way to redefine the names of normal and fallback via CBFS. This way updates can use some more expressive naming scheme (numbers, dates, version numbers) and replace the coreboot-stages file to point to the new version (with the current version as new "old"). If coreboot-stages doesn't exist, the default behaviour remains to use "normal" and "fallback". Change-Id: I77c134d79ed95831ad5098b7663c15e95d3b5a2a Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- src/arch/x86/init/bootblock_normal.c | 18 +++++++++++++++--- 1 files changed, 15 insertions(+), 3 deletions(-) diff --git a/src/arch/x86/init/bootblock_normal.c b/src/arch/x86/init/bootblock_normal.c index f8ae13b..19b3d5a 100644 --- a/src/arch/x86/init/bootblock_normal.c +++ b/src/arch/x86/init/bootblock_normal.c @@ -1,10 +1,16 @@ #include <bootblock_common.h> #include <pc80/mc146818rtc.h> +static const char *get_fallback(const char *stagelist) { + while (*stagelist) stagelist++; + return ++stagelist; +} + static void main(unsigned long bist) { unsigned long entry; int boot_mode; + const char *default_filenames = "normal/romstage\0fallback/romstage"; if (boot_cpu()) { bootblock_northbridge_init(); @@ -24,15 +30,21 @@ static void main(unsigned long bist) boot_mode = last_boot_normal(); } + char *filenames = (char *)walkcbfs("coreboot-stages"); + if (!filenames) { + filenames = default_filenames; + } + char *normal_candidate = filenames; + if (boot_mode) - entry = findstage("normal/romstage"); + entry = findstage(normal_candidate); else - entry = findstage("fallback/romstage"); + entry = findstage(get_fallback(normal_candidate)); if (entry) call(entry, bist); /* run fallback if normal can't be found */ - entry = findstage("fallback/romstage"); + entry = findstage(get_fallback(normal_candidate)); if (entry) call(entry, bist); /* duh. we're stuck */

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Patch set updated for coreboot: cc61aab vga: removed inclusion of .c files
by Vikram Narayanan 27 Jan '12

27 Jan '12

Vikram Narayanan (vikram186(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/588 -gerrit commit cc61aab7ee914f435b30eeaad42d93730a4eb9f6 Author: Vikram Narayanan <vikram186(a)gmail.com> Date: Wed Jan 25 20:40:40 2012 +0530 vga: removed inclusion of .c files Add local vga.h for prototypes. Change-Id: I5ff627c6420d4b7fd1bc9a537f406ef6d9597522 Signed-off-by: Vikram Narayanan <vikram186(a)gmail.com> Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/pc80/vga/Makefile.inc | 2 ++ src/pc80/vga/vga.c | 5 +---- src/pc80/vga/vga.h | 17 +++++++++++++++++ src/pc80/vga/vga_font_8x16.c | 20 ++++++++++++++++++++ src/pc80/vga/vga_palette.c | 29 ++++++++++++++++++++++------- 5 files changed, 62 insertions(+), 11 deletions(-) diff --git a/src/pc80/vga/Makefile.inc b/src/pc80/vga/Makefile.inc index bc68084..0ca7896 100644 --- a/src/pc80/vga/Makefile.inc +++ b/src/pc80/vga/Makefile.inc @@ -1,2 +1,4 @@ ramstage-y += vga_io.c +ramstage-$(CONFIG_VGA) += vga_palette.c +ramstage-$(CONFIG_VGA) += vga_font_8x16.c ramstage-$(CONFIG_VGA) += vga.c diff --git a/src/pc80/vga/vga.c b/src/pc80/vga/vga.c index f87ba66..9d64041 100644 --- a/src/pc80/vga/vga.c +++ b/src/pc80/vga/vga.c @@ -20,6 +20,7 @@ #include <pc80/vga_io.h> #include <string.h> +#include "vga.h" /* * pci io enable should've happened before @@ -69,8 +70,6 @@ vga_fb_clear(void) memset((void *)VGA_FB, 0x00, 0x8000); } -#include "vga_palette.c" - /* * */ @@ -181,8 +180,6 @@ vga_mode_set(int hdisplay, int hblankstart, int hsyncstart, int hsyncend, vga_cr_mask(0x09, 0x00, 0x80); /* disable doublescan */ } -#include "vga_font_8x16.c" - static void vga_font_8x16_load(void) { diff --git a/src/pc80/vga/vga.h b/src/pc80/vga/vga.h new file mode 100644 index 0000000..1e6e750 --- /dev/null +++ b/src/pc80/vga/vga.h @@ -0,0 +1,17 @@ +#ifndef _VGA_H +#define _VGA_H + +/* + * Basic palette. + */ +struct palette { + unsigned char red; + unsigned char green; + unsigned char blue; +}; + +extern const struct palette default_vga_palette[0x100]; + +extern const unsigned char vga_font_8x16[256][16]; + +#endif /* _VGA_H */ diff --git a/src/pc80/vga/vga_font_8x16.c b/src/pc80/vga/vga_font_8x16.c index 2bcaae4..d98bbee 100644 --- a/src/pc80/vga/vga_font_8x16.c +++ b/src/pc80/vga/vga_font_8x16.c @@ -1,3 +1,23 @@ +/* + * Copyright (C) 2007-2009 Luc Verhaegen <libv(a)skynet.be> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., 51 + * Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include "vga.h" + /**********************************************/ /* */ /* Font file generated by cpi2fnt */ diff --git a/src/pc80/vga/vga_palette.c b/src/pc80/vga/vga_palette.c index 01c9030..5f69728 100644 --- a/src/pc80/vga/vga_palette.c +++ b/src/pc80/vga/vga_palette.c @@ -1,13 +1,27 @@ /* - * Basic palette. + * Copyright (C) 2007-2009 Luc Verhaegen <libv(a)skynet.be> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., 51 + * Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -struct palette { - unsigned char red; - unsigned char green; - unsigned char blue; -}; -static const struct palette +#include "vga.h" + +/* + * Basic palette. + */ +const struct palette default_vga_palette[0x100] = { { 0x00, 0x00, 0x00}, { 0x00, 0x00, 0x2A}, @@ -259,3 +273,4 @@ default_vga_palette[0x100] = { { 0x0B, 0x0C, 0x20}, /* Pad with NULL */ }; +

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Patch set updated for coreboot: 76c976b vga: removed inclusion of .c files
by Stefan Reinauer 27 Jan '12

27 Jan '12

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/588 -gerrit commit 76c976b87d92902e39be9b2d5d60c13b1a81dd75 Author: Vikram Narayanan <vikram186(a)gmail.com> Date: Wed Jan 25 20:40:40 2012 +0530 vga: removed inclusion of .c files Add local vga.h for prototypes. Change-Id: I5ff627c6420d4b7fd1bc9a537f406ef6d9597522 Signed-off-by: Vikram Narayanan <vikram186(a)gmail.com> Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/pc80/vga/Makefile.inc | 2 ++ src/pc80/vga/vga.c | 5 +---- src/pc80/vga/vga.h | 17 +++++++++++++++++ src/pc80/vga/vga_font_8x16.c | 20 ++++++++++++++++++++ src/pc80/vga/vga_palette.c | 29 ++++++++++++++++++++++------- 5 files changed, 62 insertions(+), 11 deletions(-) diff --git a/src/pc80/vga/Makefile.inc b/src/pc80/vga/Makefile.inc index bc68084..0ca7896 100644 --- a/src/pc80/vga/Makefile.inc +++ b/src/pc80/vga/Makefile.inc @@ -1,2 +1,4 @@ ramstage-y += vga_io.c +ramstage-$(CONFIG_VGA) += vga_palette.c +ramstage-$(CONFIG_VGA) += vga_font_8x16.c ramstage-$(CONFIG_VGA) += vga.c diff --git a/src/pc80/vga/vga.c b/src/pc80/vga/vga.c index f87ba66..9d64041 100644 --- a/src/pc80/vga/vga.c +++ b/src/pc80/vga/vga.c @@ -20,6 +20,7 @@ #include <pc80/vga_io.h> #include <string.h> +#include "vga.h" /* * pci io enable should've happened before @@ -69,8 +70,6 @@ vga_fb_clear(void) memset((void *)VGA_FB, 0x00, 0x8000); } -#include "vga_palette.c" - /* * */ @@ -181,8 +180,6 @@ vga_mode_set(int hdisplay, int hblankstart, int hsyncstart, int hsyncend, vga_cr_mask(0x09, 0x00, 0x80); /* disable doublescan */ } -#include "vga_font_8x16.c" - static void vga_font_8x16_load(void) { diff --git a/src/pc80/vga/vga.h b/src/pc80/vga/vga.h new file mode 100644 index 0000000..4dd7f4b --- /dev/null +++ b/src/pc80/vga/vga.h @@ -0,0 +1,17 @@ +#ifndef VGA_H +#define VGA_H + +/* + * Basic palette. + */ +struct palette { + unsigned char red; + unsigned char green; + unsigned char blue; +}; + +extern const struct palette default_vga_palette[0x100]; + +extern const unsigned char vga_font_8x16[256][16]; + +#endif /* VGA_H */ diff --git a/src/pc80/vga/vga_font_8x16.c b/src/pc80/vga/vga_font_8x16.c index 2bcaae4..d98bbee 100644 --- a/src/pc80/vga/vga_font_8x16.c +++ b/src/pc80/vga/vga_font_8x16.c @@ -1,3 +1,23 @@ +/* + * Copyright (C) 2007-2009 Luc Verhaegen <libv(a)skynet.be> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., 51 + * Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include "vga.h" + /**********************************************/ /* */ /* Font file generated by cpi2fnt */ diff --git a/src/pc80/vga/vga_palette.c b/src/pc80/vga/vga_palette.c index 01c9030..5f69728 100644 --- a/src/pc80/vga/vga_palette.c +++ b/src/pc80/vga/vga_palette.c @@ -1,13 +1,27 @@ /* - * Basic palette. + * Copyright (C) 2007-2009 Luc Verhaegen <libv(a)skynet.be> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., 51 + * Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -struct palette { - unsigned char red; - unsigned char green; - unsigned char blue; -}; -static const struct palette +#include "vga.h" + +/* + * Basic palette. + */ +const struct palette default_vga_palette[0x100] = { { 0x00, 0x00, 0x00}, { 0x00, 0x00, 0x2A}, @@ -259,3 +273,4 @@ default_vga_palette[0x100] = { { 0x0B, 0x0C, 0x20}, /* Pad with NULL */ }; +

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New patch to review for coreboot: e8065cf vga: removed inclusion of .c files
by Stefan Reinauer 27 Jan '12

27 Jan '12

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/588 -gerrit commit e8065cf58f938e5d8b89e5598b267809b75ce863 Author: Vikram Narayanan <vikram186(a)gmail.com> Date: Wed Jan 25 20:40:40 2012 +0530 vga: removed inclusion of .c files Add local vga.h for prototypes. Change-Id: I5ff627c6420d4b7fd1bc9a537f406ef6d9597522 Signed-off-by: Vikram Narayanan <vikram186(a)gmail.com> Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/pc80/vga/Makefile.inc | 2 ++ src/pc80/vga/vga.c | 5 +---- src/pc80/vga/vga.h | 17 +++++++++++++++++ src/pc80/vga/vga_palette.c | 29 ++++++++++++++++++++++------- 4 files changed, 42 insertions(+), 11 deletions(-) diff --git a/src/pc80/vga/Makefile.inc b/src/pc80/vga/Makefile.inc index bc68084..0ca7896 100644 --- a/src/pc80/vga/Makefile.inc +++ b/src/pc80/vga/Makefile.inc @@ -1,2 +1,4 @@ ramstage-y += vga_io.c +ramstage-$(CONFIG_VGA) += vga_palette.c +ramstage-$(CONFIG_VGA) += vga_font_8x16.c ramstage-$(CONFIG_VGA) += vga.c diff --git a/src/pc80/vga/vga.c b/src/pc80/vga/vga.c index f87ba66..9d64041 100644 --- a/src/pc80/vga/vga.c +++ b/src/pc80/vga/vga.c @@ -20,6 +20,7 @@ #include <pc80/vga_io.h> #include <string.h> +#include "vga.h" /* * pci io enable should've happened before @@ -69,8 +70,6 @@ vga_fb_clear(void) memset((void *)VGA_FB, 0x00, 0x8000); } -#include "vga_palette.c" - /* * */ @@ -181,8 +180,6 @@ vga_mode_set(int hdisplay, int hblankstart, int hsyncstart, int hsyncend, vga_cr_mask(0x09, 0x00, 0x80); /* disable doublescan */ } -#include "vga_font_8x16.c" - static void vga_font_8x16_load(void) { diff --git a/src/pc80/vga/vga.h b/src/pc80/vga/vga.h new file mode 100644 index 0000000..4dd7f4b --- /dev/null +++ b/src/pc80/vga/vga.h @@ -0,0 +1,17 @@ +#ifndef VGA_H +#define VGA_H + +/* + * Basic palette. + */ +struct palette { + unsigned char red; + unsigned char green; + unsigned char blue; +}; + +extern const struct palette default_vga_palette[0x100]; + +extern const unsigned char vga_font_8x16[256][16]; + +#endif /* VGA_H */ diff --git a/src/pc80/vga/vga_palette.c b/src/pc80/vga/vga_palette.c index 01c9030..525f0f8 100644 --- a/src/pc80/vga/vga_palette.c +++ b/src/pc80/vga/vga_palette.c @@ -1,13 +1,27 @@ /* - * Basic palette. + * Copyright (C) 2007-2009 Luc Verhaegen <libv(a)skynet.be> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., 51 + * Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -struct palette { - unsigned char red; - unsigned char green; - unsigned char blue; -}; -static const struct palette +#include "vga_palette.h" + +/* + * Basic palette. + */ +const struct palette default_vga_palette[0x100] = { { 0x00, 0x00, 0x00}, { 0x00, 0x00, 0x2A}, @@ -259,3 +273,4 @@ default_vga_palette[0x100] = { { 0x0B, 0x0C, 0x20}, /* Pad with NULL */ }; +

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Re: [coreboot] Inagua: Synchronize AMD/inagua mainboard.
by Wolfgang Kamp - datakamp 27 Jan '12

27 Jan '12

Hello Marc, in the meantime I debugged my Ubuntu restart problem a little bit further. The issue seems to be hardware dependant because the Persimmon platform with T56N APU and A55E Hudson works fine and a similar platform (Qseven card) with T40E APU and Hudson A50E does not. I can use nearly the same coreboot build. Things getting strange in the file .../f14/Proc/Mem/NB/ON/mndcton.c function MemNStitchMemoryON if ((MemNGetBitFieldNb (NBPtr, BFCSBaseAddr0Reg + q) & 7) == 0) { HERE WE FAIL!!, BFCSBaseAddr0Reg is not zero!! This leads later to PutEventLog (AGESA_FATAL, MEM_ERROR_NO_DIMM_FOUND_ON_SYSTEM, 0, 0, 0, 0, &NBPtr->MemPtr->StdHeader); HERE ALL ENDS!!! And here ends all with no memory. On Persimmon BFCSBaseAddr0Reg is zero so we are getting in the IF branch and things going on. BOOLEAN MemNStitchMemoryON ( IN OUT MEM_NB_BLOCK *NBPtr ) { UINT32 NxtCSBase; UINT32 CurCSBase; UINT32 CsSize; UINT32 BiggestBank; UINT8 p; UINT8 q; UINT8 BiggestDimm; DIE_STRUCT *MCTPtr; DCT_STRUCT *DCTPtr; MCTPtr = NBPtr->MCTPtr; DCTPtr = NBPtr->DCTPtr; DCTPtr->Timings.CsEnabled = 0; NxtCSBase = 0; for (p = 0; p < MAX_CS_PER_CHANNEL_ON; p++) { BiggestBank = 0; BiggestDimm = 0; for (q = 0; q < MAX_CS_PER_CHANNEL_ON; q++) { printk(BIOS_DEBUG, "q = %x, Timings.CsPresent = %x, Timings.CsTestFail = %x\n", q, DCTPtr->Timings.CsPresent, DCTPtr->Timings.CsTestFail); //kamod if (((DCTPtr->Timings.CsPresent & ~DCTPtr->Timings.CsTestFail) & ((UINT16)1 << q)) != 0) { printk(BIOS_DEBUG, "1st IF is true \n"); //kamod if ((MemNGetBitFieldNb (NBPtr, BFCSBaseAddr0Reg + q) & 7) == 0) { HERE WE FAIL!!, BFCSBaseAddr0Reg is not zero // (CSEnable|Spare==1)bank is not enabled yet printk(BIOS_DEBUG, "2nd IF is true \n"); //kamod CsSize = MemNGetBitFieldNb (NBPtr, BFCSMask0Reg + (q >> 1)); printk(BIOS_DEBUG, "CsSize = %x \n", CsSize); //kamod if (CsSize != 0) { CsSize += ((UINT32)1 << 19); CsSize &= 0xFFF80000; } if (CsSize > BiggestBank) { BiggestBank = CsSize; BiggestDimm = q; } } } } if (BiggestBank != 0) { CurCSBase = NxtCSBase; CurCSBase |= ((UINT32)1 << BFCSEnable); NxtCSBase += BiggestBank; if ((BiggestDimm & 1) != 0) { if ((DCTPtr->Timings.DimmMirrorPresent & (1 << (BiggestDimm >> 1))) != 0) { CurCSBase |= ((UINT32)1 << BFOnDimmMirror); } } MemNSetBitFieldNb (NBPtr, BFCSBaseAddr0Reg + BiggestDimm, CurCSBase); DCTPtr->Timings.CsEnabled |= (1 << BiggestDimm); } if ((DCTPtr->Timings.CsTestFail & ((UINT16)1 << p)) != 0) { MemNSetBitFieldNb (NBPtr, (BFCSBaseAddr0Reg + p), (UINT32)1 << BFTestFail); } } if (NxtCSBase != 0) { DCTPtr->Timings.DctMemSize = NxtCSBase >> 8; // Scale base address from [39:8] to [47:16] NBPtr->MCTPtr->NodeMemSize += NBPtr->DCTPtr->Timings.DctMemSize; NBPtr->MCTPtr->NodeSysLimit = NBPtr->MCTPtr->NodeMemSize - 1; } else { printk(BIOS_DEBUG, "NxtCSBase = %x \n", NxtCSBase); //kamod PutEventLog (AGESA_FATAL, MEM_ERROR_NO_DIMM_FOUND_ON_SYSTEM, 0, 0, 0, 0, &NBPtr->MemPtr->StdHeader); HERE ALL ENDS!!! SetMemError (AGESA_FATAL, MCTPtr); } return (BOOLEAN) (MCTPtr->ErrCode < AGESA_FATAL); } What I have done was to change the way Ubuntu restarts. If I set reboot=acpi restart works. Thanks Wolfgang -----Ursprüngliche Nachricht----- Von: coreboot-bounces+wmkamp=datakamp.de(a)coreboot.org [mailto:coreboot-bounces+wmkamp=datakamp.de@coreboot.org] Im Auftrag von Wolfgang Kamp - datakamp Gesendet: Mittwoch, 25. Januar 2012 17:24 An: coreboot(a)coreboot.org Betreff: Re: [coreboot] Change in coreboot[master]: Inagua: Synchronize AMD/inagua mainboard. Hello Marc, my debugging shows that SPD reading is ok after Warmstart. This can not be the problem. The error check reports 7 errors when system hangs. Is there a problem with cache as RAM? Is the buffer of SPD data corrupt? I don't know what code here really does. Have you an idea what I can do next? mmflow.c //---------------------------------------------------------------- // Check for errors and return //---------------------------------------------------------------- AGESA_TESTPOINT (TpProcMemEnd, &MemPtr->StdHeader); for (Die = 0; Die < DieCount; Die++) { if (NBPtr[Die].MCTPtr->ErrCode > Retval) { Retval = NBPtr[Die].MCTPtr->ErrCode; } } printk(BIOS_DEBUG, "TpProcMemEnd Retval = 0x%x \n", Retval); return Retval; } Regards, Wolfgang -----Ursprüngliche Nachricht----- Von: Marc Jones [mailto:marcj303@gmail.com] Gesendet: Dienstag, 24. Januar 2012 19:15 An: Wolfgang Kamp - datakamp Cc: coreboot(a)coreboot.org Betreff: Re: [coreboot] Change in coreboot[master]: Inagua: Synchronize AMD/inagua mainboard. On Tue, Jan 24, 2012 at 5:38 AM, Wolfgang Kamp - datakamp <wmkamp(a)datakamp.de> wrote: > > Hi Marc, > > DIMM address and i2c address are ok. > Please look at the log. I think the SB800 is unaccessable. > > Regards > > Wolfgang > The sb800 is accessible, it is fetching rom and initializing devices that it sees: sb800_enable() PCI: 00:11.0 [1002/4390] enabled sb800_enable() PCI: 00:12.0 [1002/4397] ops PCI: 00:12.0 [1002/4397] enabled sb800_enable() PCI: Static device PCI: 00:12.1 not found, disabling it. sb800_enable() PCI: 00:12.2 [1002/4396] ops PCI: 00:12.2 [1002/4396] enabled sb800_enable() PCI: 00:13.0 [1002/4397] ops PCI: 00:13.0 [1002/4397] enabled sb800_enable() PCI: Static device PCI: 00:13.1 not found, disabling it. sb800_enable() PCI: 00:13.2 [1002/4396] ops PCI: 00:13.2 [1002/4396] enabled sb800_enable() sm_init(). . PCI: 00:14.0 [1002/4385] enabled sb800_enable() PCI: Static device PCI: 00:14.1 not found, disabling it. sb800_enable() hda enabled PCI: 00:14.2 [1002/4383] ops PCI: 00:14.2 [1002/4383] enabled !4.0 is the smbus device, so that is enabled. I think that you need to see what in the spd read fails. Also, see if you can read it earlier in the init. There could be a different device setting that causes the problem. Check that te SMbus enable is set as expected. Check that the PM registers that set the iobase are accessible. Marc > -----Ursprüngliche Nachricht----- > Von: Marc Jones [mailto:marcj303@gmail.com] > Gesendet: Freitag, 20. Januar 2012 18:46 > An: Wolfgang Kamp - datakamp > Cc: coreboot(a)coreboot.org > Betreff: Re: [coreboot] Change in coreboot[master]: Inagua: Synchronize AMD/inagua mainboard. > > On Fri, Jan 20, 2012 at 9:45 AM, Wolfgang Kamp - datakamp > <wmkamp(a)datakamp.de> wrote: >> Hello Marc, >> >> I reviewed the code and it looks good. >> But real testing shows an issue with soft restart (UBUNTU). >> The southbridge seems to hang. Coreboot stops because it could not read the SPI ROM of DIMM Module. >> Please see logs. >> The cold start log also reports errors but will successful boot Ubuntu. >> >> Regards >> >> Wolfgang >> > > Woflgang, > > The ASSERTs in the passing case are non-critical failures for early > heap use. These are AGESA bugs and have been reported to AMD, but they > are not critical. > > As you said, The bad failure is this one: > > EventLog: EventClass = 7, EventInfo = 4011c00. > Param1 = 0, Param2 = 0. > Param3 = 0, Param4 = 0. > > Which is the SPD problem... > #define MEM_ERROR_NO_DIMM_FOUND_ON_SYSTEM 0x04011C00 ///< No DIMMs > have been found > > Can you check what happens in AmdMemoryReadSPD(), in dimmSpd.c? Does > it check the correct dimm address? Is the i2c io address set > correctly? > > Thanks, > Marc > > > > > >> >> >> -----Ursprüngliche Nachricht----- >> Von: gerrit code review [mailto:gerrit@coreboot.org] >> Gesendet: Freitag, 20. Januar 2012 00:52 >> An: Wolfgang Kamp - datakamp >> Cc: Kerry Sheh >> Betreff: Change in coreboot[master]: Inagua: Synchronize AMD/inagua mainboard. >> >> From Marc Jones <marcj303(a)gmail.com>: >> >> Hello Wolfgang Kamp, >> >> I'd like you to do a code review. Please visit >> >> http://review.coreboot.org/542 >> >> to review the following change. >> >> Change subject: Inagua: Synchronize AMD/inagua mainboard. >> ..................................................................... >> >> Inagua: Synchronize AMD/inagua mainboard. >> >> AMD/persimmon mainboard code is derived from AMD/inagua mainbard. >> Persimmom update a lot in the last few month, sync these modification to inagua. >> >> Change-Id: Ia038e5a2b9550fe81bb075f31e30b98354758e9e >> Signed-off-by: Kerry Sheh <shekairui(a)gmail.com> >> Signed-off-by: Kerry Sheh <kerry.she(a)amd.com> >> --- >> M src/mainboard/amd/inagua/BiosCallOuts.c >> M src/mainboard/amd/inagua/BiosCallOuts.h >> M src/mainboard/amd/inagua/Kconfig >> M src/mainboard/amd/inagua/Makefile.inc >> M src/mainboard/amd/inagua/OptionsIds.h >> M src/mainboard/amd/inagua/PlatformGnbPcie.c >> D src/mainboard/amd/inagua/acpi/ssdt2.asl >> D src/mainboard/amd/inagua/acpi/ssdt3.asl >> D src/mainboard/amd/inagua/acpi/ssdt4.asl >> D src/mainboard/amd/inagua/acpi/ssdt5.asl >> M src/mainboard/amd/inagua/acpi_tables.c >> M src/mainboard/amd/inagua/agesawrapper.c >> M src/mainboard/amd/inagua/agesawrapper.h >> M src/mainboard/amd/inagua/buildOpts.c >> M src/mainboard/amd/inagua/devicetree.cb >> M src/mainboard/amd/inagua/dimmSpd.c >> M src/mainboard/amd/inagua/dsdt.asl >> M src/mainboard/amd/inagua/fadt.c >> M src/mainboard/amd/inagua/get_bus_conf.c >> M src/mainboard/amd/inagua/irq_tables.c >> M src/mainboard/amd/inagua/mainboard.c >> M src/mainboard/amd/inagua/mptable.c >> M src/mainboard/amd/inagua/platform_cfg.h >> M src/mainboard/amd/inagua/romstage.c >> 24 files changed, 249 insertions(+), 717 deletions(-) >> >> >> git pull ssh://review.coreboot.org:29418/coreboot >> refs/changes/42/542/2 >> -- >> To view, visit http://review.coreboot.org/542 To unsubscribe, visit >> http://review.coreboot.org/settings >> >> Gerrit-MessageType: newchange >> Gerrit-Change-Id: Ia038e5a2b9550fe81bb075f31e30b98354758e9e >> Gerrit-PatchSet: 2 >> Gerrit-Project: coreboot >> Gerrit-Branch: master >> Gerrit-Owner: Kerry Sheh <shekairui(a)gmail.com> >> Gerrit-Reviewer: Kerry Sheh <shekairui(a)gmail.com> >> Gerrit-Reviewer: Wolfgang Kamp <wmkamp(a)datakamp.de> >> Gerrit-Reviewer: build bot (Jenkins) >> >> >> >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> http://www.coreboot.org/mailman/listinfo/coreboot > > > > -- > http://se-eng.com > > > > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot -- http://se-eng.com

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Patch set updated for coreboot: 28d92e1 vga: removed inclusion of .c file
by Vikram Narayanan 27 Jan '12

27 Jan '12

Vikram Narayanan (vikram186(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/581 -gerrit commit 28d92e158bd1b0647d9fdd18b3e7fc7b054de165 Author: Vikram Narayanan <vikram186(a)gmail.com> Date: Wed Jan 25 20:40:40 2012 +0530 vga: removed inclusion of .c file Renamed vga_palette.c -> vga_palette.h Moved structure initialization to vga.c file. Made appropriate changes in vga.c Change-Id: If3e998e609e0a2fcbfad3df79fbbc755acd996c1 Signed-off-by: Vikram Narayanan <vikram186(a)gmail.com> --- src/pc80/vga/vga.c | 256 ++++++++++++++++++++++++++++++++++++++++++- src/pc80/vga/vga_palette.c | 261 -------------------------------------------- src/pc80/vga/vga_palette.h | 13 ++ 3 files changed, 267 insertions(+), 263 deletions(-) diff --git a/src/pc80/vga/vga.c b/src/pc80/vga/vga.c index f87ba66..80c1737 100644 --- a/src/pc80/vga/vga.c +++ b/src/pc80/vga/vga.c @@ -20,6 +20,260 @@ #include <pc80/vga_io.h> #include <string.h> +#include "vga_palette.h" + +static const struct palette +default_vga_palette[0x100] = { + { 0x00, 0x00, 0x00}, + { 0x00, 0x00, 0x2A}, + { 0x00, 0x2A, 0x00}, + { 0x00, 0x2A, 0x2A}, + { 0x2A, 0x00, 0x00}, + { 0x2A, 0x00, 0x2A}, + { 0x2A, 0x15, 0x00}, + { 0x2A, 0x2A, 0x2A}, + { 0x15, 0x15, 0x15}, + { 0x15, 0x15, 0x3F}, + { 0x15, 0x3F, 0x15}, + { 0x15, 0x3F, 0x3F}, + { 0x3F, 0x15, 0x15}, + { 0x3F, 0x15, 0x3F}, + { 0x3F, 0x3F, 0x15}, + { 0x3F, 0x3F, 0x3F}, + { 0x00, 0x00, 0x00}, + { 0x05, 0x05, 0x05}, + { 0x08, 0x08, 0x08}, + { 0x0B, 0x0B, 0x0B}, + { 0x0E, 0x0E, 0x0E}, + { 0x11, 0x11, 0x11}, + { 0x16, 0x16, 0x16}, + { 0x18, 0x18, 0x18}, + { 0x1C, 0x1C, 0x1C}, + { 0x20, 0x20, 0x20}, + { 0x24, 0x24, 0x24}, + { 0x28, 0x28, 0x28}, + { 0x2D, 0x2D, 0x2D}, + { 0x32, 0x32, 0x32}, + { 0x38, 0x38, 0x38}, + { 0x3F, 0x3F, 0x3F}, + { 0x00, 0x00, 0x3F}, + { 0x20, 0x00, 0x3F}, + { 0x1F, 0x00, 0x3F}, + { 0x2F, 0x00, 0x3F}, + { 0x3F, 0x00, 0x3F}, + { 0x3F, 0x00, 0x2F}, + { 0x3F, 0x00, 0x1F}, + { 0x3F, 0x00, 0x20}, + { 0x3F, 0x00, 0x00}, + { 0x3F, 0x20, 0x00}, + { 0x3F, 0x1F, 0x00}, + { 0x3F, 0x2F, 0x00}, + { 0x3F, 0x3F, 0x00}, + { 0x2F, 0x3F, 0x00}, + { 0x1F, 0x3F, 0x00}, + { 0x20, 0x3F, 0x00}, + { 0x00, 0x3F, 0x00}, + { 0x00, 0x3F, 0x20}, + { 0x00, 0x3F, 0x1F}, + { 0x00, 0x3F, 0x2F}, + { 0x00, 0x3F, 0x3F}, + { 0x00, 0x2F, 0x3F}, + { 0x00, 0x1F, 0x3F}, + { 0x00, 0x20, 0x3F}, + { 0x1F, 0x1F, 0x3F}, + { 0x27, 0x1F, 0x3F}, + { 0x2F, 0x1F, 0x3F}, + { 0x37, 0x1F, 0x3F}, + { 0x3F, 0x1F, 0x3F}, + { 0x3F, 0x1F, 0x37}, + { 0x3F, 0x1F, 0x2F}, + { 0x3F, 0x1F, 0x27}, + { 0x3F, 0x1F, 0x1F}, + { 0x3F, 0x27, 0x1F}, + { 0x3F, 0x2F, 0x1F}, + { 0x3F, 0x37, 0x1F}, + { 0x3F, 0x3F, 0x1F}, + { 0x37, 0x3F, 0x1F}, + { 0x2F, 0x3F, 0x1F}, + { 0x27, 0x3F, 0x1F}, + { 0x1F, 0x3F, 0x1F}, + { 0x1F, 0x3F, 0x27}, + { 0x1F, 0x3F, 0x2F}, + { 0x1F, 0x3F, 0x37}, + { 0x1F, 0x3F, 0x3F}, + { 0x1F, 0x37, 0x3F}, + { 0x1F, 0x2F, 0x3F}, + { 0x1F, 0x27, 0x3F}, + { 0x2D, 0x2D, 0x3F}, + { 0x31, 0x2D, 0x3F}, + { 0x36, 0x2D, 0x3F}, + { 0x3A, 0x2D, 0x3F}, + { 0x3F, 0x2D, 0x3F}, + { 0x3F, 0x2D, 0x3A}, + { 0x3F, 0x2D, 0x36}, + { 0x3F, 0x2D, 0x31}, + { 0x3F, 0x2D, 0x2D}, + { 0x3F, 0x31, 0x2D}, + { 0x3F, 0x36, 0x2D}, + { 0x3F, 0x3A, 0x2D}, + { 0x3F, 0x3F, 0x2D}, + { 0x3A, 0x3F, 0x2D}, + { 0x36, 0x3F, 0x2D}, + { 0x31, 0x3F, 0x2D}, + { 0x2D, 0x3F, 0x2D}, + { 0x2D, 0x3F, 0x31}, + { 0x2D, 0x3F, 0x36}, + { 0x2D, 0x3F, 0x3A}, + { 0x2D, 0x3F, 0x3F}, + { 0x2D, 0x3A, 0x3F}, + { 0x2D, 0x36, 0x3F}, + { 0x2D, 0x31, 0x3F}, + { 0x00, 0x00, 0x1C}, + { 0x07, 0x00, 0x1C}, + { 0x0E, 0x00, 0x1C}, + { 0x15, 0x00, 0x1C}, + { 0x1C, 0x00, 0x1C}, + { 0x1C, 0x00, 0x15}, + { 0x1C, 0x00, 0x0E}, + { 0x1C, 0x00, 0x07}, + { 0x1C, 0x00, 0x00}, + { 0x1C, 0x07, 0x00}, + { 0x1C, 0x0E, 0x00}, + { 0x1C, 0x15, 0x00}, + { 0x1C, 0x1C, 0x00}, + { 0x15, 0x1C, 0x00}, + { 0x0E, 0x1C, 0x00}, + { 0x07, 0x1C, 0x00}, + { 0x00, 0x1C, 0x00}, + { 0x00, 0x1C, 0x07}, + { 0x00, 0x1C, 0x0E}, + { 0x00, 0x1C, 0x15}, + { 0x00, 0x1C, 0x1C}, + { 0x00, 0x15, 0x1C}, + { 0x00, 0x0E, 0x1C}, + { 0x00, 0x07, 0x1C}, + { 0x0E, 0x0E, 0x1C}, + { 0x11, 0x0E, 0x1C}, + { 0x15, 0x0E, 0x1C}, + { 0x18, 0x0E, 0x1C}, + { 0x1C, 0x0E, 0x1C}, + { 0x1C, 0x0E, 0x18}, + { 0x1C, 0x0E, 0x15}, + { 0x1C, 0x0E, 0x11}, + { 0x1C, 0x0E, 0x0E}, + { 0x1C, 0x11, 0x0E}, + { 0x1C, 0x15, 0x0E}, + { 0x1C, 0x18, 0x0E}, + { 0x1C, 0x1C, 0x0E}, + { 0x18, 0x1C, 0x0E}, + { 0x15, 0x1C, 0x0E}, + { 0x11, 0x1C, 0x0E}, + { 0x0E, 0x1C, 0x0E}, + { 0x0E, 0x1C, 0x11}, + { 0x0E, 0x1C, 0x15}, + { 0x0E, 0x1C, 0x18}, + { 0x0E, 0x1C, 0x1C}, + { 0x0E, 0x18, 0x1C}, + { 0x0E, 0x15, 0x1C}, + { 0x0E, 0x11, 0x1C}, + { 0x16, 0x16, 0x1C}, + { 0x16, 0x16, 0x1C}, + { 0x18, 0x16, 0x1C}, + { 0x1A, 0x16, 0x1C}, + { 0x1C, 0x16, 0x1C}, + { 0x1C, 0x16, 0x1A}, + { 0x1C, 0x16, 0x18}, + { 0x1C, 0x16, 0x16}, + { 0x1C, 0x16, 0x16}, + { 0x1C, 0x16, 0x16}, + { 0x1C, 0x18, 0x16}, + { 0x1C, 0x1A, 0x16}, + { 0x1C, 0x1C, 0x16}, + { 0x1A, 0x1C, 0x16}, + { 0x18, 0x1C, 0x16}, + { 0x16, 0x1C, 0x16}, + { 0x16, 0x1C, 0x16}, + { 0x16, 0x1C, 0x16}, + { 0x16, 0x1C, 0x18}, + { 0x16, 0x1C, 0x1A}, + { 0x16, 0x1C, 0x1C}, + { 0x16, 0x1A, 0x1C}, + { 0x16, 0x18, 0x1C}, + { 0x16, 0x16, 0x1C}, + { 0x00, 0x00, 0x20}, + { 0x04, 0x00, 0x20}, + { 0x08, 0x00, 0x20}, + { 0x0C, 0x00, 0x20}, + { 0x20, 0x00, 0x20}, + { 0x20, 0x00, 0x0C}, + { 0x20, 0x00, 0x08}, + { 0x20, 0x00, 0x04}, + { 0x20, 0x00, 0x00}, + { 0x20, 0x04, 0x00}, + { 0x20, 0x08, 0x00}, + { 0x20, 0x0C, 0x00}, + { 0x20, 0x20, 0x00}, + { 0x0C, 0x20, 0x00}, + { 0x08, 0x20, 0x00}, + { 0x04, 0x20, 0x00}, + { 0x00, 0x20, 0x00}, + { 0x00, 0x20, 0x04}, + { 0x00, 0x20, 0x08}, + { 0x00, 0x20, 0x0C}, + { 0x00, 0x20, 0x20}, + { 0x00, 0x0C, 0x20}, + { 0x00, 0x08, 0x20}, + { 0x00, 0x04, 0x20}, + { 0x08, 0x08, 0x20}, + { 0x0A, 0x08, 0x20}, + { 0x0C, 0x08, 0x20}, + { 0x0E, 0x08, 0x20}, + { 0x20, 0x08, 0x20}, + { 0x20, 0x08, 0x0E}, + { 0x20, 0x08, 0x0C}, + { 0x20, 0x08, 0x0A}, + { 0x20, 0x08, 0x08}, + { 0x20, 0x0A, 0x08}, + { 0x20, 0x0C, 0x08}, + { 0x20, 0x0E, 0x08}, + { 0x20, 0x20, 0x08}, + { 0x0E, 0x20, 0x08}, + { 0x0C, 0x20, 0x08}, + { 0x0A, 0x20, 0x08}, + { 0x08, 0x20, 0x08}, + { 0x08, 0x20, 0x0A}, + { 0x08, 0x20, 0x0C}, + { 0x08, 0x20, 0x0E}, + { 0x08, 0x20, 0x20}, + { 0x08, 0x0E, 0x20}, + { 0x08, 0x0C, 0x20}, + { 0x08, 0x0A, 0x20}, + { 0x0B, 0x0B, 0x20}, + { 0x0C, 0x0B, 0x20}, + { 0x0D, 0x0B, 0x20}, + { 0x0F, 0x0B, 0x20}, + { 0x20, 0x0B, 0x20}, + { 0x20, 0x0B, 0x0F}, + { 0x20, 0x0B, 0x0D}, + { 0x20, 0x0B, 0x0C}, + { 0x20, 0x0B, 0x0B}, + { 0x20, 0x0C, 0x0B}, + { 0x20, 0x0D, 0x0B}, + { 0x20, 0x0F, 0x0B}, + { 0x20, 0x20, 0x0B}, + { 0x0F, 0x20, 0x0B}, + { 0x0D, 0x20, 0x0B}, + { 0x0C, 0x20, 0x0B}, + { 0x0B, 0x20, 0x0B}, + { 0x0B, 0x20, 0x0C}, + { 0x0B, 0x20, 0x0D}, + { 0x0B, 0x20, 0x0F}, + { 0x0B, 0x20, 0x20}, + { 0x0B, 0x0F, 0x20}, + { 0x0B, 0x0D, 0x20}, + { 0x0B, 0x0C, 0x20}, + /* Pad with NULL */ +}; /* * pci io enable should've happened before @@ -69,8 +323,6 @@ vga_fb_clear(void) memset((void *)VGA_FB, 0x00, 0x8000); } -#include "vga_palette.c" - /* * */ diff --git a/src/pc80/vga/vga_palette.c b/src/pc80/vga/vga_palette.c deleted file mode 100644 index 01c9030..0000000 --- a/src/pc80/vga/vga_palette.c +++ /dev/null @@ -1,261 +0,0 @@ -/* - * Basic palette. - */ -struct palette { - unsigned char red; - unsigned char green; - unsigned char blue; -}; - -static const struct palette -default_vga_palette[0x100] = { - { 0x00, 0x00, 0x00}, - { 0x00, 0x00, 0x2A}, - { 0x00, 0x2A, 0x00}, - { 0x00, 0x2A, 0x2A}, - { 0x2A, 0x00, 0x00}, - { 0x2A, 0x00, 0x2A}, - { 0x2A, 0x15, 0x00}, - { 0x2A, 0x2A, 0x2A}, - { 0x15, 0x15, 0x15}, - { 0x15, 0x15, 0x3F}, - { 0x15, 0x3F, 0x15}, - { 0x15, 0x3F, 0x3F}, - { 0x3F, 0x15, 0x15}, - { 0x3F, 0x15, 0x3F}, - { 0x3F, 0x3F, 0x15}, - { 0x3F, 0x3F, 0x3F}, - { 0x00, 0x00, 0x00}, - { 0x05, 0x05, 0x05}, - { 0x08, 0x08, 0x08}, - { 0x0B, 0x0B, 0x0B}, - { 0x0E, 0x0E, 0x0E}, - { 0x11, 0x11, 0x11}, - { 0x16, 0x16, 0x16}, - { 0x18, 0x18, 0x18}, - { 0x1C, 0x1C, 0x1C}, - { 0x20, 0x20, 0x20}, - { 0x24, 0x24, 0x24}, - { 0x28, 0x28, 0x28}, - { 0x2D, 0x2D, 0x2D}, - { 0x32, 0x32, 0x32}, - { 0x38, 0x38, 0x38}, - { 0x3F, 0x3F, 0x3F}, - { 0x00, 0x00, 0x3F}, - { 0x20, 0x00, 0x3F}, - { 0x1F, 0x00, 0x3F}, - { 0x2F, 0x00, 0x3F}, - { 0x3F, 0x00, 0x3F}, - { 0x3F, 0x00, 0x2F}, - { 0x3F, 0x00, 0x1F}, - { 0x3F, 0x00, 0x20}, - { 0x3F, 0x00, 0x00}, - { 0x3F, 0x20, 0x00}, - { 0x3F, 0x1F, 0x00}, - { 0x3F, 0x2F, 0x00}, - { 0x3F, 0x3F, 0x00}, - { 0x2F, 0x3F, 0x00}, - { 0x1F, 0x3F, 0x00}, - { 0x20, 0x3F, 0x00}, - { 0x00, 0x3F, 0x00}, - { 0x00, 0x3F, 0x20}, - { 0x00, 0x3F, 0x1F}, - { 0x00, 0x3F, 0x2F}, - { 0x00, 0x3F, 0x3F}, - { 0x00, 0x2F, 0x3F}, - { 0x00, 0x1F, 0x3F}, - { 0x00, 0x20, 0x3F}, - { 0x1F, 0x1F, 0x3F}, - { 0x27, 0x1F, 0x3F}, - { 0x2F, 0x1F, 0x3F}, - { 0x37, 0x1F, 0x3F}, - { 0x3F, 0x1F, 0x3F}, - { 0x3F, 0x1F, 0x37}, - { 0x3F, 0x1F, 0x2F}, - { 0x3F, 0x1F, 0x27}, - { 0x3F, 0x1F, 0x1F}, - { 0x3F, 0x27, 0x1F}, - { 0x3F, 0x2F, 0x1F}, - { 0x3F, 0x37, 0x1F}, - { 0x3F, 0x3F, 0x1F}, - { 0x37, 0x3F, 0x1F}, - { 0x2F, 0x3F, 0x1F}, - { 0x27, 0x3F, 0x1F}, - { 0x1F, 0x3F, 0x1F}, - { 0x1F, 0x3F, 0x27}, - { 0x1F, 0x3F, 0x2F}, - { 0x1F, 0x3F, 0x37}, - { 0x1F, 0x3F, 0x3F}, - { 0x1F, 0x37, 0x3F}, - { 0x1F, 0x2F, 0x3F}, - { 0x1F, 0x27, 0x3F}, - { 0x2D, 0x2D, 0x3F}, - { 0x31, 0x2D, 0x3F}, - { 0x36, 0x2D, 0x3F}, - { 0x3A, 0x2D, 0x3F}, - { 0x3F, 0x2D, 0x3F}, - { 0x3F, 0x2D, 0x3A}, - { 0x3F, 0x2D, 0x36}, - { 0x3F, 0x2D, 0x31}, - { 0x3F, 0x2D, 0x2D}, - { 0x3F, 0x31, 0x2D}, - { 0x3F, 0x36, 0x2D}, - { 0x3F, 0x3A, 0x2D}, - { 0x3F, 0x3F, 0x2D}, - { 0x3A, 0x3F, 0x2D}, - { 0x36, 0x3F, 0x2D}, - { 0x31, 0x3F, 0x2D}, - { 0x2D, 0x3F, 0x2D}, - { 0x2D, 0x3F, 0x31}, - { 0x2D, 0x3F, 0x36}, - { 0x2D, 0x3F, 0x3A}, - { 0x2D, 0x3F, 0x3F}, - { 0x2D, 0x3A, 0x3F}, - { 0x2D, 0x36, 0x3F}, - { 0x2D, 0x31, 0x3F}, - { 0x00, 0x00, 0x1C}, - { 0x07, 0x00, 0x1C}, - { 0x0E, 0x00, 0x1C}, - { 0x15, 0x00, 0x1C}, - { 0x1C, 0x00, 0x1C}, - { 0x1C, 0x00, 0x15}, - { 0x1C, 0x00, 0x0E}, - { 0x1C, 0x00, 0x07}, - { 0x1C, 0x00, 0x00}, - { 0x1C, 0x07, 0x00}, - { 0x1C, 0x0E, 0x00}, - { 0x1C, 0x15, 0x00}, - { 0x1C, 0x1C, 0x00}, - { 0x15, 0x1C, 0x00}, - { 0x0E, 0x1C, 0x00}, - { 0x07, 0x1C, 0x00}, - { 0x00, 0x1C, 0x00}, - { 0x00, 0x1C, 0x07}, - { 0x00, 0x1C, 0x0E}, - { 0x00, 0x1C, 0x15}, - { 0x00, 0x1C, 0x1C}, - { 0x00, 0x15, 0x1C}, - { 0x00, 0x0E, 0x1C}, - { 0x00, 0x07, 0x1C}, - { 0x0E, 0x0E, 0x1C}, - { 0x11, 0x0E, 0x1C}, - { 0x15, 0x0E, 0x1C}, - { 0x18, 0x0E, 0x1C}, - { 0x1C, 0x0E, 0x1C}, - { 0x1C, 0x0E, 0x18}, - { 0x1C, 0x0E, 0x15}, - { 0x1C, 0x0E, 0x11}, - { 0x1C, 0x0E, 0x0E}, - { 0x1C, 0x11, 0x0E}, - { 0x1C, 0x15, 0x0E}, - { 0x1C, 0x18, 0x0E}, - { 0x1C, 0x1C, 0x0E}, - { 0x18, 0x1C, 0x0E}, - { 0x15, 0x1C, 0x0E}, - { 0x11, 0x1C, 0x0E}, - { 0x0E, 0x1C, 0x0E}, - { 0x0E, 0x1C, 0x11}, - { 0x0E, 0x1C, 0x15}, - { 0x0E, 0x1C, 0x18}, - { 0x0E, 0x1C, 0x1C}, - { 0x0E, 0x18, 0x1C}, - { 0x0E, 0x15, 0x1C}, - { 0x0E, 0x11, 0x1C}, - { 0x16, 0x16, 0x1C}, - { 0x16, 0x16, 0x1C}, - { 0x18, 0x16, 0x1C}, - { 0x1A, 0x16, 0x1C}, - { 0x1C, 0x16, 0x1C}, - { 0x1C, 0x16, 0x1A}, - { 0x1C, 0x16, 0x18}, - { 0x1C, 0x16, 0x16}, - { 0x1C, 0x16, 0x16}, - { 0x1C, 0x16, 0x16}, - { 0x1C, 0x18, 0x16}, - { 0x1C, 0x1A, 0x16}, - { 0x1C, 0x1C, 0x16}, - { 0x1A, 0x1C, 0x16}, - { 0x18, 0x1C, 0x16}, - { 0x16, 0x1C, 0x16}, - { 0x16, 0x1C, 0x16}, - { 0x16, 0x1C, 0x16}, - { 0x16, 0x1C, 0x18}, - { 0x16, 0x1C, 0x1A}, - { 0x16, 0x1C, 0x1C}, - { 0x16, 0x1A, 0x1C}, - { 0x16, 0x18, 0x1C}, - { 0x16, 0x16, 0x1C}, - { 0x00, 0x00, 0x20}, - { 0x04, 0x00, 0x20}, - { 0x08, 0x00, 0x20}, - { 0x0C, 0x00, 0x20}, - { 0x20, 0x00, 0x20}, - { 0x20, 0x00, 0x0C}, - { 0x20, 0x00, 0x08}, - { 0x20, 0x00, 0x04}, - { 0x20, 0x00, 0x00}, - { 0x20, 0x04, 0x00}, - { 0x20, 0x08, 0x00}, - { 0x20, 0x0C, 0x00}, - { 0x20, 0x20, 0x00}, - { 0x0C, 0x20, 0x00}, - { 0x08, 0x20, 0x00}, - { 0x04, 0x20, 0x00}, - { 0x00, 0x20, 0x00}, - { 0x00, 0x20, 0x04}, - { 0x00, 0x20, 0x08}, - { 0x00, 0x20, 0x0C}, - { 0x00, 0x20, 0x20}, - { 0x00, 0x0C, 0x20}, - { 0x00, 0x08, 0x20}, - { 0x00, 0x04, 0x20}, - { 0x08, 0x08, 0x20}, - { 0x0A, 0x08, 0x20}, - { 0x0C, 0x08, 0x20}, - { 0x0E, 0x08, 0x20}, - { 0x20, 0x08, 0x20}, - { 0x20, 0x08, 0x0E}, - { 0x20, 0x08, 0x0C}, - { 0x20, 0x08, 0x0A}, - { 0x20, 0x08, 0x08}, - { 0x20, 0x0A, 0x08}, - { 0x20, 0x0C, 0x08}, - { 0x20, 0x0E, 0x08}, - { 0x20, 0x20, 0x08}, - { 0x0E, 0x20, 0x08}, - { 0x0C, 0x20, 0x08}, - { 0x0A, 0x20, 0x08}, - { 0x08, 0x20, 0x08}, - { 0x08, 0x20, 0x0A}, - { 0x08, 0x20, 0x0C}, - { 0x08, 0x20, 0x0E}, - { 0x08, 0x20, 0x20}, - { 0x08, 0x0E, 0x20}, - { 0x08, 0x0C, 0x20}, - { 0x08, 0x0A, 0x20}, - { 0x0B, 0x0B, 0x20}, - { 0x0C, 0x0B, 0x20}, - { 0x0D, 0x0B, 0x20}, - { 0x0F, 0x0B, 0x20}, - { 0x20, 0x0B, 0x20}, - { 0x20, 0x0B, 0x0F}, - { 0x20, 0x0B, 0x0D}, - { 0x20, 0x0B, 0x0C}, - { 0x20, 0x0B, 0x0B}, - { 0x20, 0x0C, 0x0B}, - { 0x20, 0x0D, 0x0B}, - { 0x20, 0x0F, 0x0B}, - { 0x20, 0x20, 0x0B}, - { 0x0F, 0x20, 0x0B}, - { 0x0D, 0x20, 0x0B}, - { 0x0C, 0x20, 0x0B}, - { 0x0B, 0x20, 0x0B}, - { 0x0B, 0x20, 0x0C}, - { 0x0B, 0x20, 0x0D}, - { 0x0B, 0x20, 0x0F}, - { 0x0B, 0x20, 0x20}, - { 0x0B, 0x0F, 0x20}, - { 0x0B, 0x0D, 0x20}, - { 0x0B, 0x0C, 0x20}, - /* Pad with NULL */ -}; diff --git a/src/pc80/vga/vga_palette.h b/src/pc80/vga/vga_palette.h new file mode 100644 index 0000000..c3cd763 --- /dev/null +++ b/src/pc80/vga/vga_palette.h @@ -0,0 +1,13 @@ +#ifndef VGA_PALETTE_H +#define VGA_PALETTE_H + +/* + * Basic palette. + */ +struct palette { + unsigned char red; + unsigned char green; + unsigned char blue; +}; + +#endif /* VGA_PALETTE_H */

1 0

Support for Intel Atom E6xx with EG20 needed
by Software Developer 27 Jan '12

27 Jan '12

Hi, we're evaluating some bootloaders that we could use for our Intel E6xx with EG20 platform (its exactly the *Kontron* *nanoETXexpress-TT*). See here: http://us.kontron.com/products/computeronmodules/com+express/com+express+mi… Is it possible to use Coreboot on that platform? How great would be the effort to add such support in coreboot??? We want to use the bootloader to access our I2C eeprom, gpios, SD-Card (over SDIO), SATA-Flash, USB Stick and Ethernet. The bootloader will be used to update the product firmware. Thanks a lot, SoftwareDeveloper755.

1 0

Patch merged into coreboot/master: 1b785c7 Make Geode GX2 VGA setup work.
by gerrit＠coreboot.org 26 Jan '12

26 Jan '12

the following patch was just integrated into master: commit 1b785c7c7c007fab87e773d5ed7c0992b1caede1 Author: Nils Jacobs <njacobs8(a)adsltotaal.nl> Date: Wed Jan 25 22:26:35 2012 +0100 Make Geode GX2 VGA setup work. Add MSR register write for VGA memory setup Add missing license Add bit explanation Change-Id: I1cb36eeccd84f0056c829f50d9864047654ce906 Signed-off-by: Nils Jacobs <njacobs8(a)adsltotaal.nl> Build-Tested: build bot (Jenkins) at Wed Jan 25 23:32:20 2012, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Thu Jan 26 22:15:55 2012, giving +2 See http://review.coreboot.org/580 for details. -gerrit

1 0

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coreboot January 2012