coreboot July 2011

coreboot@coreboot.org

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244 discussions

New patch to review: 45a4244 T60: dont use X60 USB init flag
by Sven Schnelle 11 Jul '11

11 Jul '11

Sven Schnelle (svens(a)stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/92 -gerrit commit 45a424419a5647d5016b1462255b1241988d36df Author: Sven Schnelle <svens(a)stackframe.org> Date: Mon Jul 11 14:58:48 2011 +0200 T60: dont use X60 USB init flag ec byte 0x03, bit 2 seems to be only used on the X60s for USB switch initialization. Don't touch it on T60. Change-Id: Icb89a514757a0e06ccea200fde62a778fa8c268e Signed-off-by: Sven Schnelle <svens(a)stackframe.org> --- src/mainboard/lenovo/t60/devicetree.cb | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb index 3615e59..27ce46c 100644 --- a/src/mainboard/lenovo/t60/devicetree.cb +++ b/src/mainboard/lenovo/t60/devicetree.cb @@ -121,7 +121,7 @@ chip northbridge/intel/i945 register "config0" = "0xa6" register "config1" = "0x05" register "config2" = "0xa0" - register "config3" = "0x05" + register "config3" = "0x01" register "beepmask0" = "0xfe" register "beepmask1" = "0x96"

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Re: [coreboot] Unsupported MB?
by Corey Osgood 11 Jul '11

11 Jul '11

On Sun, Jul 10, 2011 at 11:35 PM, Aaron P <viautbellum(a)gmail.com> wrote: > Corey: > CPU-Z is one of the tools I've already used, but unfortunately it's only > giving me the southbridge. > > Greg: > Not for the next several days, but by that point I can just make a FreeBSD > CD. I realize at this point I may just have to wait. How about a USB flash drive? Is unetbootin an option? -Corey > > On Sun, Jul 10, 2011 at 10:10 PM, Corey Osgood <corey.osgood(a)gmail.com> > wrote: >> >> On Sun, Jul 10, 2011 at 10:05 PM, Aaron P <viautbellum(a)gmail.com> wrote: >> > Unfortunately, I'm on Windows, so I can't really really use the tools >> > listed >> > there. If necessary, for instance to rebuild coreboot, I have Debian and >> > FreeBSD on a VM, but obviously they can't access information about my >> > system. Most of the information is info I already inadvertently gathered >> > looking for my motherboard model and updating the BIOS. >> > >> > I've done a bit more digging, but I'm having trouble finding the >> > northbridge. >> > >> > On Sun, Jul 10, 2011 at 5:18 PM, Gregg Levine <gregg.drwho8(a)gmail.com> >> > wrote: >> >> >> >> On Sun, Jul 10, 2011 at 5:27 PM, Aaron P <viautbellum(a)gmail.com> wrote: >> >> > I've noticed that there are no AOpen motherboards on the list. Is >> >> > there >> >> > any >> >> > possibility of getting coreboot (and SeaBIOS) working on my old >> >> > AX4BS-V? >> >> > I'd >> >> > like to be able to boot the FreeBSD installer via USB, but my BIOS >> >> > doesn't >> >> > support booting from it. >> >> > >> >> > vendor: AOpen >> >> > model: AX4BS-V >> >> > >> >> > From CPU-Z: >> >> > CPU: Pentium 4 >> >> > Southbridge: Intel 82801BA (ICH2) >> >> > LPCIO: Winbond W83627HF >> >> > >> >> > from EZWinFlash: >> >> > Flash Type: SST 49LF002A /3.3V >> >> > >> >> > >> >> > -- >> >> > coreboot mailing list: coreboot(a)coreboot.org >> >> > http://www.coreboot.org/mailman/listinfo/coreboot >> >> > >> >> >> >> Hello! >> >> An admirable goal. However to help you better, (much better even) >> >> we'll need the information provided on the Wiki regarding your target. >> >> That information is found here http://www.coreboot.org/Support and >> >> most of what we need to know you've already provided. >> >> ----- >> >> Gregg C Levine gregg.drwho8(a)gmail.com >> >> "This signature fought the Time Wars, time and again." >> >> CPU-Z (google it) should tell you what the northbridge is, that's the >> most important bit at this point. >> >> -Corey > > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot >

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Re: [coreboot] Unsupported MB?
by Aaron P 11 Jul '11

11 Jul '11

Corey: CPU-Z is one of the tools I've already used, but unfortunately it's only giving me the southbridge. Greg: Not for the next several days, but by that point I can just make a FreeBSD CD. I realize at this point I may just have to wait. On Sun, Jul 10, 2011 at 10:10 PM, Corey Osgood <corey.osgood(a)gmail.com>wrote: > On Sun, Jul 10, 2011 at 10:05 PM, Aaron P <viautbellum(a)gmail.com> wrote: > > Unfortunately, I'm on Windows, so I can't really really use the tools > listed > > there. If necessary, for instance to rebuild coreboot, I have Debian and > > FreeBSD on a VM, but obviously they can't access information about my > > system. Most of the information is info I already inadvertently gathered > > looking for my motherboard model and updating the BIOS. > > > > I've done a bit more digging, but I'm having trouble finding the > > northbridge. > > > > On Sun, Jul 10, 2011 at 5:18 PM, Gregg Levine <gregg.drwho8(a)gmail.com> > > wrote: > >> > >> On Sun, Jul 10, 2011 at 5:27 PM, Aaron P <viautbellum(a)gmail.com> wrote: > >> > I've noticed that there are no AOpen motherboards on the list. Is > there > >> > any > >> > possibility of getting coreboot (and SeaBIOS) working on my old > AX4BS-V? > >> > I'd > >> > like to be able to boot the FreeBSD installer via USB, but my BIOS > >> > doesn't > >> > support booting from it. > >> > > >> > vendor: AOpen > >> > model: AX4BS-V > >> > > >> > From CPU-Z: > >> > CPU: Pentium 4 > >> > Southbridge: Intel 82801BA (ICH2) > >> > LPCIO: Winbond W83627HF > >> > > >> > from EZWinFlash: > >> > Flash Type: SST 49LF002A /3.3V > >> > > >> > > >> > -- > >> > coreboot mailing list: coreboot(a)coreboot.org > >> > http://www.coreboot.org/mailman/listinfo/coreboot > >> > > >> > >> Hello! > >> An admirable goal. However to help you better, (much better even) > >> we'll need the information provided on the Wiki regarding your target. > >> That information is found here http://www.coreboot.org/Support and > >> most of what we need to know you've already provided. > >> ----- > >> Gregg C Levine gregg.drwho8(a)gmail.com > >> "This signature fought the Time Wars, time and again." > > CPU-Z (google it) should tell you what the northbridge is, that's the > most important bit at this point. > > -Corey >

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Re: [coreboot] Unsupported MB?
by Corey Osgood 11 Jul '11

11 Jul '11

On Sun, Jul 10, 2011 at 10:05 PM, Aaron P <viautbellum(a)gmail.com> wrote: > Unfortunately, I'm on Windows, so I can't really really use the tools listed > there. If necessary, for instance to rebuild coreboot, I have Debian and > FreeBSD on a VM, but obviously they can't access information about my > system. Most of the information is info I already inadvertently gathered > looking for my motherboard model and updating the BIOS. > > I've done a bit more digging, but I'm having trouble finding the > northbridge. > > On Sun, Jul 10, 2011 at 5:18 PM, Gregg Levine <gregg.drwho8(a)gmail.com> > wrote: >> >> On Sun, Jul 10, 2011 at 5:27 PM, Aaron P <viautbellum(a)gmail.com> wrote: >> > I've noticed that there are no AOpen motherboards on the list. Is there >> > any >> > possibility of getting coreboot (and SeaBIOS) working on my old AX4BS-V? >> > I'd >> > like to be able to boot the FreeBSD installer via USB, but my BIOS >> > doesn't >> > support booting from it. >> > >> > vendor: AOpen >> > model: AX4BS-V >> > >> > From CPU-Z: >> > CPU: Pentium 4 >> > Southbridge: Intel 82801BA (ICH2) >> > LPCIO: Winbond W83627HF >> > >> > from EZWinFlash: >> > Flash Type: SST 49LF002A /3.3V >> > >> > >> > -- >> > coreboot mailing list: coreboot(a)coreboot.org >> > http://www.coreboot.org/mailman/listinfo/coreboot >> > >> >> Hello! >> An admirable goal. However to help you better, (much better even) >> we'll need the information provided on the Wiki regarding your target. >> That information is found here http://www.coreboot.org/Support and >> most of what we need to know you've already provided. >> ----- >> Gregg C Levine gregg.drwho8(a)gmail.com >> "This signature fought the Time Wars, time and again." CPU-Z (google it) should tell you what the northbridge is, that's the most important bit at this point. -Corey

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Re: [coreboot] Unsupported MB?
by Gregg Levine 11 Jul '11

11 Jul '11

On Sun, Jul 10, 2011 at 10:05 PM, Aaron P <viautbellum(a)gmail.com> wrote: > Unfortunately, I'm on Windows, so I can't really really use the tools listed > there. If necessary, for instance to rebuild coreboot, I have Debian and > FreeBSD on a VM, but obviously they can't access information about my > system. Most of the information is info I already inadvertently gathered > looking for my motherboard model and updating the BIOS. > > I've done a bit more digging, but I'm having trouble finding the > northbridge. > > On Sun, Jul 10, 2011 at 5:18 PM, Gregg Levine <gregg.drwho8(a)gmail.com> > wrote: >> >> On Sun, Jul 10, 2011 at 5:27 PM, Aaron P <viautbellum(a)gmail.com> wrote: >> > I've noticed that there are no AOpen motherboards on the list. Is there >> > any >> > possibility of getting coreboot (and SeaBIOS) working on my old AX4BS-V? >> > I'd >> > like to be able to boot the FreeBSD installer via USB, but my BIOS >> > doesn't >> > support booting from it. >> > >> > vendor: AOpen >> > model: AX4BS-V >> > >> > From CPU-Z: >> > CPU: Pentium 4 >> > Southbridge: Intel 82801BA (ICH2) >> > LPCIO: Winbond W83627HF >> > >> > from EZWinFlash: >> > Flash Type: SST 49LF002A /3.3V >> > >> > >> > -- >> > coreboot mailing list: coreboot(a)coreboot.org >> > http://www.coreboot.org/mailman/listinfo/coreboot >> > >> >> Hello! >> An admirable goal. However to help you better, (much better even) >> we'll need the information provided on the Wiki regarding your target. >> That information is found here http://www.coreboot.org/Support and >> most of what we need to know you've already provided. >> ----- Hello! Oh okay. Do you have the ability to create a bootable CD? The idea is that the information could be gathered via the same tools, while using a Live CD of Debian such as Knoppix or its relatives. ----- Gregg C Levine gregg.drwho8(a)gmail.com "This signature fought the Time Wars, time and again."

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Re: [coreboot] Unsupported MB?
by Aaron P 11 Jul '11

11 Jul '11

Unfortunately, I'm on Windows, so I can't really really use the tools listed there. If necessary, for instance to rebuild coreboot, I have Debian and FreeBSD on a VM, but obviously they can't access information about my system. Most of the information is info I already inadvertently gathered looking for my motherboard model and updating the BIOS. I've done a bit more digging, but I'm having trouble finding the northbridge. On Sun, Jul 10, 2011 at 5:18 PM, Gregg Levine <gregg.drwho8(a)gmail.com>wrote: > On Sun, Jul 10, 2011 at 5:27 PM, Aaron P <viautbellum(a)gmail.com> wrote: > > I've noticed that there are no AOpen motherboards on the list. Is there > any > > possibility of getting coreboot (and SeaBIOS) working on my old AX4BS-V? > I'd > > like to be able to boot the FreeBSD installer via USB, but my BIOS > doesn't > > support booting from it. > > > > vendor: AOpen > > model: AX4BS-V > > > > From CPU-Z: > > CPU: Pentium 4 > > Southbridge: Intel 82801BA (ICH2) > > LPCIO: Winbond W83627HF > > > > from EZWinFlash: > > Flash Type: SST 49LF002A /3.3V > > > > > > -- > > coreboot mailing list: coreboot(a)coreboot.org > > http://www.coreboot.org/mailman/listinfo/coreboot > > > > Hello! > An admirable goal. However to help you better, (much better even) > we'll need the information provided on the Wiki regarding your target. > That information is found here http://www.coreboot.org/Support and > most of what we need to know you've already provided. > ----- > Gregg C Levine gregg.drwho8(a)gmail.com > "This signature fought the Time Wars, time and again." > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot >

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Re: [coreboot] Unsupported MB?
by Gregg Levine 11 Jul '11

11 Jul '11

On Sun, Jul 10, 2011 at 5:27 PM, Aaron P <viautbellum(a)gmail.com> wrote: > I've noticed that there are no AOpen motherboards on the list. Is there any > possibility of getting coreboot (and SeaBIOS) working on my old AX4BS-V? I'd > like to be able to boot the FreeBSD installer via USB, but my BIOS doesn't > support booting from it. > > vendor: AOpen > model: AX4BS-V > > From CPU-Z: > CPU: Pentium 4 > Southbridge: Intel 82801BA (ICH2) > LPCIO: Winbond W83627HF > > from EZWinFlash: > Flash Type: SST 49LF002A /3.3V > > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot > Hello! An admirable goal. However to help you better, (much better even) we'll need the information provided on the Wiki regarding your target. That information is found here http://www.coreboot.org/Support and most of what we need to know you've already provided. ----- Gregg C Levine gregg.drwho8(a)gmail.com "This signature fought the Time Wars, time and again."

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Unsupported MB?
by Aaron P 10 Jul '11

10 Jul '11

I've noticed that there are no AOpen motherboards on the list. Is there any possibility of getting coreboot (and SeaBIOS) working on my old AX4BS-V? I'd like to be able to boot the FreeBSD installer via USB, but my BIOS doesn't support booting from it. vendor: AOpen model: AX4BS-V >From CPU-Z: CPU: Pentium 4 Southbridge: Intel 82801BA (ICH2) LPCIO: Winbond W83627HF from EZWinFlash: Flash Type: SST 49LF002A /3.3V

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Patch merged into master: 67576b4 ASRock E350M1: ACPI-related BSOD fix
by gerrit＠coreboot.org 10 Jul '11

10 Jul '11

the following patch was just integrated into master: commit 67576b4126a4c5be0df8236601ad0728fc1b24fd Author: Scott Duplichan <scott(a)notabs.org> Date: Sat Jul 9 20:14:20 2011 -0500 ASRock E350M1: ACPI-related BSOD fix On installing/starting Windows (tested with Win7 Ultimate) the system crashes with a Blue Screen of Death, reporting an ACPI BIOS error. From Scott Duplichan: To avoid the Windows BSOD, the uninitialized value TOM1 in the SSDT must be corrected. The attached patch does this. It uses the older patching method, and not the (possibly preferred) AML generation method. To simplify the patching operation, I moved the AML item 'TOM1' to the start of the SSDT. The patch also includes code to confirm the AML variable TOM1 is at the expected offset before patching. Also tested & working with Linux. Change-Id: I59cedc366e09d98f690b093d6a21fc0c864559c3 Signed-off-by: Scott Duplichan <scott(a)notabs.org> Acked-by: Marshall Buschman <mbuschman(a)lucidmachines.com> See http://review.coreboot.org/91 for details. -gerrit

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Patch set updated: 5f1cfd8 Do full flush on uart8250 only at end of printk.
by Anonymous Coward 10 Jul '11

10 Jul '11

Anonymous Coward (kevin(a)koconnor.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/90 -gerrit commit 5f1cfd8ee9d400f20a5aa30eb50b9afb5e2694db Author: Kevin O'Connor <kevin(a)koconnor.net> Date: Sat Jul 9 20:22:21 2011 -0400 Do full flush on uart8250 only at end of printk. The previous code does a full flush of the uart after every character. Unfortunately, this can cause transmission delays on some serial ports. This patch changes the code so that it does a flush at the end of every printk instead of at the end of every character. This reduces the time it takes to transmit serial messages (up to 9% on my Asrock e350m1 board). It also makes the transmission time more consistent which is important when performing timing tests via serial transmissions. Change-Id: I6b28488b905da68c6d68d7c517cc743cde567d70 Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/arch/x86/lib/romstage_console.c | 19 ++++++++++++++++--- src/console/uart8250_console.c | 6 ++++++ src/console/uart8250mem_console.c | 6 ++++++ src/include/uart8250.h | 2 ++ src/lib/uart8250.c | 5 ++++- src/lib/uart8250mem.c | 5 ++++- 6 files changed, 38 insertions(+), 5 deletions(-) diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c index a5f2e2b..8adb3ba 100644 --- a/src/arch/x86/lib/romstage_console.c +++ b/src/arch/x86/lib/romstage_console.c @@ -48,6 +48,19 @@ static void console_tx_byte(unsigned char byte) #endif } +static void console_tx_flush(void) +{ +#if CONFIG_CONSOLE_SERIAL8250MEM + uart8250_mem_tx_flush(CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000); +#endif +#if CONFIG_CONSOLE_SERIAL8250 + uart8250_tx_flush(CONFIG_TTYS0_BASE); +#endif +#if CONFIG_CONSOLE_NE2K + ne2k_transmit(CONFIG_CONSOLE_NE2K_IO_PORT); +#endif +} + int do_printk(int msg_level, const char *fmt, ...) { va_list args; @@ -60,8 +73,8 @@ int do_printk(int msg_level, const char *fmt, ...) va_start(args, fmt); i = vtxprintf(console_tx_byte, fmt, args); va_end(args); -#if CONFIG_CONSOLE_NE2K - ne2k_transmit(CONFIG_CONSOLE_NE2K_IO_PORT); -#endif + + console_tx_flush(); + return i; } diff --git a/src/console/uart8250_console.c b/src/console/uart8250_console.c index 4799ca6..330ed68 100644 --- a/src/console/uart8250_console.c +++ b/src/console/uart8250_console.c @@ -31,6 +31,11 @@ static void ttyS0_tx_byte(unsigned char data) uart8250_tx_byte(CONFIG_TTYS0_BASE, data); } +static void ttyS0_tx_flush(void) +{ + uart8250_tx_flush(CONFIG_TTYS0_BASE); +} + static unsigned char ttyS0_rx_byte(void) { return uart8250_rx_byte(CONFIG_TTYS0_BASE); @@ -44,6 +49,7 @@ static int ttyS0_tst_byte(void) static const struct console_driver uart8250_console __console = { .init = ttyS0_init, .tx_byte = ttyS0_tx_byte, + .tx_flush = ttyS0_tx_flush, .rx_byte = ttyS0_rx_byte, .tst_byte = ttyS0_tst_byte, }; diff --git a/src/console/uart8250mem_console.c b/src/console/uart8250mem_console.c index a6968dd..e622ad0 100644 --- a/src/console/uart8250mem_console.c +++ b/src/console/uart8250mem_console.c @@ -36,6 +36,11 @@ static void uartmem_tx_byte(unsigned char data) uart8250_mem_tx_byte(uart_bar, data); } +static void uartmem_tx_flush(void) +{ + uart8250_mem_tx_flush(uart_bar); +} + static unsigned char uartmem_rx_byte(void) { if (!uart_bar) @@ -55,6 +60,7 @@ static int uartmem_tst_byte(void) static const struct console_driver uart8250mem_console __console = { .init = uartmem_init, .tx_byte = uartmem_tx_byte, + .tx_flush = uartmem_tx_flush, .rx_byte = uartmem_rx_byte, .tst_byte = uartmem_tst_byte, }; diff --git a/src/include/uart8250.h b/src/include/uart8250.h index bbf2d8c..4a02179 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -131,6 +131,7 @@ unsigned char uart8250_rx_byte(unsigned base_port); int uart8250_can_rx_byte(unsigned base_port); void uart8250_tx_byte(unsigned base_port, unsigned char data); +void uart8250_tx_flush(unsigned base_port); /* Yes it is silly to have three different uart init functions. But we used to * have three different sets of uart code, so it's an improvement. @@ -142,6 +143,7 @@ void uart_init(void); unsigned char uart8250_mem_rx_byte(unsigned base_port); int uart8250_mem_can_rx_byte(unsigned base_port); void uart8250_mem_tx_byte(unsigned base_port, unsigned char data); +void uart8250_mem_tx_flush(unsigned base_port); void uart8250_mem_init(unsigned base_port, unsigned divisor); u32 uart_mem_init(void); diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c index 64e8854..e7ddd0b 100644 --- a/src/lib/uart8250.c +++ b/src/lib/uart8250.c @@ -48,7 +48,10 @@ void uart8250_tx_byte(unsigned base_port, unsigned char data) { uart8250_wait_to_tx_byte(base_port); outb(data, base_port + UART_TBR); - /* Make certain the data clears the fifos */ +} + +void uart8250_tx_flush(unsigned base_port) +{ uart8250_wait_until_sent(base_port); } diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c index 918308e..e79cb63 100644 --- a/src/lib/uart8250mem.c +++ b/src/lib/uart8250mem.c @@ -51,7 +51,10 @@ void uart8250_mem_tx_byte(unsigned base_port, unsigned char data) { uart8250_mem_wait_to_tx_byte(base_port); write8(base_port + UART_TBR, data); - /* Make certain the data clears the FIFOs */ +} + +void uart8250_mem_tx_flush(unsigned base_port) +{ uart8250_mem_wait_until_sent(base_port); }

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coreboot July 2011