coreboot July 2011

coreboot@coreboot.org

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244 discussions

Patch merged into master: 3b0c61f Relicense Makefile to match libpayload
by gerrit＠coreboot.org 01 Jul '11

01 Jul '11

the following patch was just integrated into master: commit 3b0c61fd62a2775f54877d458539a516d9e0980c Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Thu Jun 30 15:48:57 2011 +0200 Relicense Makefile to match libpayload libpayload's license is more liberal than coreboot's. If we are to use the coreboot build system for libpayload (bringing a couple of new features to libpayload), we should adopt it for this shared part even if not strictly necessary. Change-Id: I1349616861e193b3e01407debbec3d82e09e72c2 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/70 for details. -gerrit

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Patch set updated: 8de7fcd Workaround the errata #181.
by Cristian Măgherușan-Stanciu 01 Jul '11

01 Jul '11

Cristian Măgherușan-Stanciu (cristi.magherusan(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/69 -gerrit commit 8de7fcde0a1fcc5a56d5e8e03ed689253418c40c Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Wed Jun 29 23:59:13 2011 +0200 Workaround the errata #181. We use LDTSTOP# to trigger the FID/VID change on K8M890, because the FID/VID SMAF is blocked by not yet configured internal VGA. The memory controller is enabled later, nor the workaround makes any harm to non-affected CPUs. This update unbreaks compilation by declaring the tmp variable. Change-Id: Icf5d126b8c8cd9ece6af41d3129315a777c8cef2 Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Signed-off-by: Cristian Măgherușan-Stanciu <cristi.magherusan(a)gmail.com> --- src/mainboard/asus/m2v-mx_se/romstage.c | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c index 580d8fa..9825e2b 100644 --- a/src/mainboard/asus/m2v-mx_se/romstage.c +++ b/src/mainboard/asus/m2v-mx_se/romstage.c @@ -74,10 +74,15 @@ static inline int spd_read_byte(unsigned device, unsigned address) #define SB_VFSMAF 0 -/* this function might fail on some K8 CPUs with errata #181 */ static void ldtstop_sb(void) { print_debug("toggle LDTSTP#\n"); + + /* fix errata #181, disable DRAM controller it will get enabled later */ + u8 tmp = pci_read_config8(PCI_DEV(0, 0x18, 2), 0x94); + tmp |= (( 1 << 14) | (1 << 3)); + pci_write_config8(PCI_DEV(0, 0x18, 2), 0x94, tmp); + u8 reg = inb (VT8237R_ACPI_IO_BASE + 0x5c); reg = reg ^ (1 << 0); outb(reg, VT8237R_ACPI_IO_BASE + 0x5c);

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[PATCH] porting coreboot to ARM mid-term evaluations
by Hamo 01 Jul '11

01 Jul '11

Hi lists, Since it is too hard to get the detail information of Marvell CPU ( most of the information is covered under an NDA) , I decided to work on porting coreboot to Armltd Versatile PB. Most of its information is on the web of ARM ltd. and QEMU can emulate it so it is easy for me to test and use it. After applying those patches, we can now create a rom file only with bootblock. There is one problem when we add romstage to this rom file, I am trying to resolve this problem with the help of Patrick. Since no romstage and ramstage is in this rom file, no information will print to the screen. You can use the built-in gdb server in QEMU to trace the work of bootblock and walkcbfs. It is under vendor "Armltd" and mainboard "Versatile PB". Please test it and any comments are welcome. Thanks to you all for your kindly help.

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Re: [coreboot] New patch to review: f65442a We use LDTSTOP# to trigger the FID/VID change on K8M890, because the FID/VID SMAF is blocked by not yet configured internal VGA. Workaround the errata #181. The memory controller is enabled later, nor the w
by Cristian Măgherușan-Stanciu 01 Jul '11

01 Jul '11

Hi Ruik, Shouldn't we implement this in the generic AMD CPU code? Then all the motherboards would benefit from it, not only the Asus M2V-MX_SE. Cristi

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coreboot July 2011