coreboot July 2011

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Patch merged into master: 6974e42 Small SMM fixups
by gerrit＠coreboot.org 04 Jul '11

04 Jul '11

the following patch was just integrated into master: commit 6974e425a31b1c798dd05e346e9ca4521e31079f Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Sat Jul 2 16:03:24 2011 +0200 Small SMM fixups Align the spinlock to the 4 byte boundary (CPU will guarantee atomicity of XCHG). While at it add the PAUSE instruction to spinlock loop to hint the CPU we are just spinlocking. The rep nop could not be used because "as" complains that rep is used without string instructions. Change-Id: I325cd83de3a6557b1bee6758bc151bc81e874f8c Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> See http://review.coreboot.org/81 for details. -gerrit

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[RFC] use of SMM with SSE/MMX...
by Rudolf Marek 04 Jul '11

04 Jul '11

Hi all, The MMX/SSE/x87 is not handled in save state map. GCC might produce such instructions if it wants. Problem is what to do with that. Either we can compile all SMM code with -no-sse/mmx/fpu switches (I think those exists) or we could use the FXSAVE/FRSTORE instructions to backup the state. problem is that it needs 512 bytes / CPU. Either could put that on stack which is 0x400 bytes total and make it 2 times smaller or for AMD we have 0x200 bytes still free in the save state map, but not on Intel. Ideas? Thanks Rudolf

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Patch merged into master: 4345556 Fixes to the libpayload build system
by gerrit＠coreboot.org 03 Jul '11

03 Jul '11

the following patch was just integrated into master: commit 434555659991021344fcebd7fcef910c3ae78ae5 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Jul 2 00:29:09 2011 +0200 Fixes to the libpayload build system - its Makefile is part of the libpayload project - fix conversion bug in powerpc's Makefile.inc Change-Id: I84f2da092c3733ea7d0f232cb3768078cf13dfd5 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/79 for details. -gerrit

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New patch to review: 835a320 Enable SMI on M2V-MX SE
by Rudolf Marek 02 Jul '11

02 Jul '11

Rudolf Marek (r.marek(a)assembler.cz) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/83 -gerrit commit 835a320916cd7a5032750b1fe1ca0df37a33f198 Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Sat Jul 2 16:41:38 2011 +0200 Enable SMI on M2V-MX SE Finally the SMI routines are in good shape on AMD, lets enable this and later implement ACPI on/off SMI commands. Change-Id: I9848a7be908780353eead30c16fd2df8ea48f77e Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> --- src/mainboard/asus/m2v-mx_se/Kconfig | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/src/mainboard/asus/m2v-mx_se/Kconfig b/src/mainboard/asus/m2v-mx_se/Kconfig index 09157ee..1d8f367 100644 --- a/src/mainboard/asus/m2v-mx_se/Kconfig +++ b/src/mainboard/asus/m2v-mx_se/Kconfig @@ -30,6 +30,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SUPERIO_ITE_IT8712F select HAVE_OPTION_TABLE select HAVE_ACPI_TABLES + select HAVE_SMI_HANDLER select BOARD_ROMSIZE_KB_512 select RAMINIT_SYSINFO select VGA

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New patch to review: 77439f0 Make AMD SMM SMP aware
by Rudolf Marek 02 Jul '11

02 Jul '11

Rudolf Marek (r.marek(a)assembler.cz) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/82 -gerrit commit 77439f041fc6348cdaaa682d5cbe8c41f3f96241 Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Sat Jul 2 16:36:17 2011 +0200 Make AMD SMM SMP aware Move the SMM MSR init to a code run per CPU. Introduce global SMM_BASE define, later all 0xa0000 could be changed to use it. Remove the unnecessary test if the smm_init routine is called once (it is called by BSP only) and also remove if lock bit is set becuase this bit is cleared by INIT it seems. Add the defines for fam10h and famfh to respective files, we do not have any shared AMD MSR header file. Tested on M2V-MX SE with dualcore CPU. Change-Id: I1b2bf157d1cc79c566c9089689a9bfd9310f5683 Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> --- src/cpu/amd/model_10xxx/model_10xxx_init.c | 13 +++- src/cpu/amd/model_fxx/model_fxx_init.c | 16 ++++ src/cpu/amd/smm/smm_init.c | 124 ++++++++++------------------ src/include/cpu/amd/model_10xxx_msr.h | 4 + src/include/cpu/amd/model_fxx_msr.h | 4 + src/include/cpu/x86/smm.h | 3 + 6 files changed, 82 insertions(+), 82 deletions(-) diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c index a92852f..2e8bbfe 100644 --- a/src/cpu/amd/model_10xxx/model_10xxx_init.c +++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c @@ -24,6 +24,7 @@ #include <device/pci.h> #include <string.h> #include <cpu/x86/msr.h> +#include <cpu/x86/smm.h> #include <cpu/x86/pae.h> #include <pc80/mc146818rtc.h> #include <cpu/x86/lapic.h> @@ -118,7 +119,17 @@ static void model_10xxx_init(device_t dev) msr.hi &= ~(1 << (35-32)); wrmsr(BU_CFG2_MSR, msr); - /* Write protect SMM space with SMMLOCK. */ + /* Set SMM base address for this CPU */ + msr = rdmsr(SMM_BASE_MSR); + msr.lo = SMM_BASE - (lapicid() * 0x400); + wrmsr(SMM_BASE_MSR, msr); + + /* Enable the SMM memory window */ + msr = rdmsr(SMM_MASK_MSR); + msr.lo |= (1 << 0); /* Enable ASEG SMRAM Range */ + wrmsr(SMM_MASK_MSR, msr); + + /* Set SMMLOCK to avoid exploits messing with SMM */ msr = rdmsr(HWCR_MSR); msr.lo |= (1 << 0); wrmsr(HWCR_MSR, msr); diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c index 0608d0a..ce5c810 100644 --- a/src/cpu/amd/model_fxx/model_fxx_init.c +++ b/src/cpu/amd/model_fxx/model_fxx_init.c @@ -24,6 +24,7 @@ #include <cpu/cpu.h> #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> +#include <cpu/x86/smm.h> #include <cpu/amd/multicore.h> #include <cpu/amd/model_fxx_msr.h> @@ -547,6 +548,21 @@ static void model_fxx_init(device_t dev) */ if (id.coreid == 0) init_ecc_memory(id.nodeid); // only do it for core 0 + + /* Set SMM base address for this CPU */ + msr = rdmsr(SMM_BASE_MSR); + msr.lo = SMM_BASE - (lapicid() * 0x400); + wrmsr(SMM_BASE_MSR, msr); + + /* Enable the SMM memory window */ + msr = rdmsr(SMM_MASK_MSR); + msr.lo |= (1 << 0); /* Enable ASEG SMRAM Range */ + wrmsr(SMM_MASK_MSR, msr); + + /* Set SMMLOCK to avoid exploits messing with SMM */ + msr = rdmsr(HWCR_MSR); + msr.lo |= (1 << 0); + wrmsr(HWCR_MSR, msr); } static struct device_operations cpu_dev_ops = { diff --git a/src/cpu/amd/smm/smm_init.c b/src/cpu/amd/smm/smm_init.c index ad1c112..6398688 100644 --- a/src/cpu/amd/smm/smm_init.c +++ b/src/cpu/amd/smm/smm_init.c @@ -30,94 +30,56 @@ #include <cpu/x86/smm.h> #include <string.h> -#define SMM_BASE_MSR 0xc0010111 -#define SMM_ADDR_MSR 0xc0010112 -#define SMM_MASK_MSR 0xc0010113 -#define SMM_BASE 0xa0000 - extern unsigned char _binary_smm_start; extern unsigned char _binary_smm_size; -static int smm_handler_copied = 0; - void smm_init(void) { - msr_t msr; - - msr = rdmsr(HWCR_MSR); - if (msr.lo & (1 << 0)) { - // This sounds like a bug... ? - printk(BIOS_DEBUG, "SMM is still locked from last boot, using old handler.\n"); - return; - } - - /* Only copy SMM handler once, not once per CPU */ - if (!smm_handler_copied) { - msr_t syscfg_orig, mtrr_aseg_orig; - - smm_handler_copied = 1; - - /* Back up MSRs for later restore */ - syscfg_orig = rdmsr(SYSCFG_MSR); - mtrr_aseg_orig = rdmsr(MTRRfix16K_A0000_MSR); - - /* MTRR changes don't like an enabled cache */ - disable_cache(); - - msr = syscfg_orig; - /* Allow changes to MTRR extended attributes */ - msr.lo |= SYSCFG_MSR_MtrrFixDramModEn; - /* turn the extended attributes off until we fix - * them so A0000 is routed to memory - */ - msr.lo &= ~SYSCFG_MSR_MtrrFixDramEn; - wrmsr(SYSCFG_MSR, msr); - - /* set DRAM access to 0xa0000 */ - /* A0000 is memory */ - msr.lo = 0x18181818; - msr.hi = 0x18181818; - wrmsr(MTRRfix16K_A0000_MSR, msr); - - /* enable the extended features */ - msr = syscfg_orig; - msr.lo |= SYSCFG_MSR_MtrrFixDramModEn; - msr.lo |= SYSCFG_MSR_MtrrFixDramEn; - wrmsr(SYSCFG_MSR, msr); - - enable_cache(); - /* copy the real SMM handler */ - memcpy((void *)SMM_BASE, &_binary_smm_start, (size_t)&_binary_smm_size); - wbinvd(); - - /* Restore MTRR */ - disable_cache(); - - /* Restore SYSCFG */ - wrmsr(SYSCFG_MSR, syscfg_orig); - - wrmsr(MTRRfix16K_A0000_MSR, mtrr_aseg_orig); - enable_cache(); - } - - - /* But set SMM base address on all CPUs/cores */ - msr = rdmsr(SMM_BASE_MSR); - msr.lo = SMM_BASE - (lapicid() * 0x400); - wrmsr(SMM_BASE_MSR, msr); - - /* enable the SMM memory window */ - msr = rdmsr(SMM_MASK_MSR); - msr.lo |= (1 << 0); // Enable ASEG SMRAM Range - wrmsr(SMM_MASK_MSR, msr); - - /* Set SMMLOCK to avoid exploits messing with SMM */ - msr = rdmsr(HWCR_MSR); - msr.lo |= (1 << 0); - wrmsr(HWCR_MSR, msr); + msr_t msr, syscfg_orig, mtrr_aseg_orig; + + /* Back up MSRs for later restore */ + syscfg_orig = rdmsr(SYSCFG_MSR); + mtrr_aseg_orig = rdmsr(MTRRfix16K_A0000_MSR); + + /* MTRR changes don't like an enabled cache */ + disable_cache(); + + msr = syscfg_orig; + + /* Allow changes to MTRR extended attributes */ + msr.lo |= SYSCFG_MSR_MtrrFixDramModEn; + /* turn the extended attributes off until we fix + * them so A0000 is routed to memory + */ + msr.lo &= ~SYSCFG_MSR_MtrrFixDramEn; + wrmsr(SYSCFG_MSR, msr); + + /* set DRAM access to 0xa0000 */ + msr.lo = 0x18181818; + msr.hi = 0x18181818; + wrmsr(MTRRfix16K_A0000_MSR, msr); + + /* enable the extended features */ + msr = syscfg_orig; + msr.lo |= SYSCFG_MSR_MtrrFixDramModEn; + msr.lo |= SYSCFG_MSR_MtrrFixDramEn; + wrmsr(SYSCFG_MSR, msr); + + enable_cache(); + /* copy the real SMM handler */ + memcpy((void *)SMM_BASE, &_binary_smm_start, (size_t)&_binary_smm_size); + wbinvd(); + disable_cache(); + + /* Restore SYSCFG and MTRR */ + wrmsr(SYSCFG_MSR, syscfg_orig); + wrmsr(MTRRfix16K_A0000_MSR, mtrr_aseg_orig); + enable_cache(); + + /* CPU MSR are set in CPU init */ } void smm_lock(void) { - /* We lock SMM per CPU core */ + /* We lock SMM in CPU init */ } diff --git a/src/include/cpu/amd/model_10xxx_msr.h b/src/include/cpu/amd/model_10xxx_msr.h index f497eb3..b34a281 100644 --- a/src/include/cpu/amd/model_10xxx_msr.h +++ b/src/include/cpu/amd/model_10xxx_msr.h @@ -22,6 +22,10 @@ #include <cpu/x86/msr.h> +#define SMM_BASE_MSR 0xC0010111 +#define SMM_ADDR_MSR 0xC0010112 +#define SMM_MASK_MSR 0xC0010113 + #define HWCR_MSR 0xC0010015 #define NB_CFG_MSR 0xC001001f #define LS_CFG_MSR 0xC0011020 diff --git a/src/include/cpu/amd/model_fxx_msr.h b/src/include/cpu/amd/model_fxx_msr.h index b4795cb..2ac2d4e 100644 --- a/src/include/cpu/amd/model_fxx_msr.h +++ b/src/include/cpu/amd/model_fxx_msr.h @@ -1,6 +1,10 @@ #ifndef CPU_AMD_MODEL_FXX_MSR_H #define CPU_AMD_MODEL_FXX_MSR_H +#define SMM_BASE_MSR 0xc0010111 +#define SMM_ADDR_MSR 0xc0010112 +#define SMM_MASK_MSR 0xc0010113 + #define HWCR_MSR 0xC0010015 #define NB_CFG_MSR 0xC001001f #define LS_CFG_MSR 0xC0011020 diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 49ee2be..c314c39 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -24,6 +24,9 @@ #ifndef CPU_X86_SMM_H #define CPU_X86_SMM_H +/* used only by C programs so far */ +#define SMM_BASE 0xa0000 + #include <types.h> typedef struct { u16 es_selector;

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New patch to review: 6974e42 Small SMM fixups
by Rudolf Marek 02 Jul '11

02 Jul '11

Rudolf Marek (r.marek(a)assembler.cz) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/81 -gerrit commit 6974e425a31b1c798dd05e346e9ca4521e31079f Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Sat Jul 2 16:03:24 2011 +0200 Small SMM fixups Align the spinlock to the 4 byte boundary (CPU will guarantee atomicity of XCHG). While at it add the PAUSE instruction to spinlock loop to hint the CPU we are just spinlocking. The rep nop could not be used because "as" complains that rep is used without string instructions. Change-Id: I325cd83de3a6557b1bee6758bc151bc81e874f8c Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> --- src/cpu/x86/smm/smihandler.c | 8 ++++++-- 1 files changed, 6 insertions(+), 2 deletions(-) diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c index d44a3ea..a6ab87f 100644 --- a/src/cpu/x86/smm/smihandler.c +++ b/src/cpu/x86/smm/smihandler.c @@ -28,7 +28,7 @@ typedef enum { SMI_LOCKED, SMI_UNLOCKED } smi_semaphore; /* SMI multiprocessing semaphore */ -static volatile smi_semaphore smi_handler_status = SMI_UNLOCKED; +static volatile smi_semaphore smi_handler_status __attribute__ ((aligned (4))) = SMI_UNLOCKED; static int smi_obtain_lock(void) { @@ -121,7 +121,11 @@ void smi_handler(u32 smm_revision) /* For security reasons we don't release the other CPUs * until the CPU with the lock is actually done */ - while (smi_handler_status == SMI_LOCKED) /* wait */ ; + while (smi_handler_status == SMI_LOCKED) { + asm volatile ( + ".byte 0xf3, 0x90\n" /* hint a CPU we are in spinlock (PAUSE instruction, REP NOP) */ + ); + } return; }

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New patch to review: fc9dd35 Fix lint-002-build-dir-handling
by Patrick Georgi 02 Jul '11

02 Jul '11

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/80 -gerrit commit fc9dd354ea48dfe132326f0b9d6ebece3c021bb8 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Jul 2 16:21:31 2011 +0200 Fix lint-002-build-dir-handling That lint test requires some Kconfig defaults and uses allyesconfig for that. Unfortunately that also draws in ccache and scanbuild support, which significantly change the behaviour of the toplevel Makefile. Notably, the ccache support breaks if no ccache is installed. Change-Id: I17cbb7974be33fc077e5cbd5fb616a5b00a47d97 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/lint/lint-002-build-dir-handling | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/util/lint/lint-002-build-dir-handling b/util/lint/lint-002-build-dir-handling index 39e3124..f10db17 100755 --- a/util/lint/lint-002-build-dir-handling +++ b/util/lint/lint-002-build-dir-handling @@ -33,7 +33,7 @@ fi # $1: object directory run_printall() { -$MAKE NOMKDIR=1 DOTCONFIG=$TMPCONFIG obj=$1 printall |sed -e "s,^ *,," -e "s, ,\n,g" -e "s,^ramstage-objs:=,," -e "s,mainboard/[^/]*/[^/]*/,.../," |grep "/static.*\.[co]" |sort |tr '\012\015' ' ' |sed -e "s, *, ,g" -e "s, *$,," +$MAKE CONFIG_CCACHE=n CONFIG_SCANBUILD_ENABLE=n NOMKDIR=1 DOTCONFIG=$TMPCONFIG obj=$1 printall |sed -e "s,^ *,," -e "s, ,\n,g" -e "s,^ramstage-objs:=,," -e "s,mainboard/[^/]*/[^/]*/,.../," |grep "/static.*\.[co]" |sort |tr '\012\015' ' ' |sed -e "s, *, ,g" -e "s, *$,," } # find GNU make

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Patch merged into master: 0362d89 whitespace-only changes in acpi.c, replaced spaces with tabs
by gerrit＠coreboot.org 02 Jul '11

02 Jul '11

the following patch was just integrated into master: commit 0362d89266df43b756ee8a7c9d008ef71ae73011 Author: Cristian Măgherușan-Stanciu <cristi.magherusan(a)gmail.com> Date: Sat Jul 2 00:57:07 2011 +0300 whitespace-only changes in acpi.c, replaced spaces with tabs Change-Id: Ibd598813bec0c93d77afbce8aee330498afbe5f6 Signed-off-by: Cristian Măgherușan-Stanciu <cristi.magherusan(a)gmail.com> See http://review.coreboot.org/74 for details. -gerrit

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Patch set updated: 6195e48 Un-perl commit-msg hook
by Patrick Georgi 02 Jul '11

02 Jul '11

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/78 -gerrit commit 6195e48fbe30cf93a53c2aec379534daa1d95582 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Jul 2 00:35:02 2011 +0200 Un-perl commit-msg hook To simplify installation on mingw a bit (even though git remains a pain), drop the perl dependency the commit-msg hook introduced to the coreboot development environment. It's replaced by awk which we use elsewhere already (and is a more lightweight utility in any case) Change-Id: I67adfe1ec43c898735d4bae4819ceb53e83c303b Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/gitconfig/commit-msg | 61 ++++++++++++++++++-------------------------- 1 files changed, 25 insertions(+), 36 deletions(-) diff --git a/util/gitconfig/commit-msg b/util/gitconfig/commit-msg index 789bad3..4c80420 100755 --- a/util/gitconfig/commit-msg +++ b/util/gitconfig/commit-msg @@ -43,46 +43,35 @@ add_ChangeId() { fi id=`_gen_ChangeId` - perl -e ' - $MSG = shift; - $id = shift; - $CHANGE_ID_AFTER = shift; + T=`mktemp` + cat "$MSG" | awk ' + !/^[a-zA-Z0-9-]+:/ { + print $0; + next; + }; - undef $/; - open(I, $MSG); $_ = <I>; close I; - s|^diff --git a/.*||ms; - s|^#.*$||mg; - exit unless $_; + { + if (lines != "") { + lines = lines "\n"; + }; + lines = lines $0 + }; - @message = split /\n/; - $haveFooter = 0; - $startFooter = @message; - for($line = @message - 1; $line >= 0; $line--) { - $_ = $message[$line]; - - if (/^[a-zA-Z0-9-]+:/ && !m,^[a-z0-9-]+://,) { - $haveFooter++; - next; - } - next if /^[ []/; - $startFooter = $line if ($haveFooter && /^\r?$/); - last; + END { + split(lines, footer, "\n"); + numlines=length(footer); + pre=1; + for (line = 1; line <= numlines; line++) { + if (pre && match(footer[line], "('$CHANGE_ID_AFTER'):") != 1) { + pre=0; + print "Change-Id: I'$id'"; + }; + print footer[line]; } - - @footer = @message[$startFooter+1..@message]; - @message = @message[0..$startFooter]; - push(@footer, "") unless @footer; - - for ($line = 0; $line < @footer; $line++) { - $_ = $footer[$line]; - next if /^($CHANGE_ID_AFTER):/i; - last; + if (pre) { + print "Change-Id: I'$id'"; } - splice(@footer, $line, 0, "Change-Id: I$id"); - - $_ = join("\n", @message, @footer); - open(O, ">$MSG"); print O; close O; - ' "$MSG" "$id" "$CHANGE_ID_AFTER" + }' > $T && mv $T "$MSG" || rm -f $T } _gen_ChangeIdInput() { echo "tree `git write-tree`"

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Patch set updated: d4b9079 usage example of the simplified ACPI code
by Cristian Măgherușan-Stanciu 02 Jul '11

02 Jul '11

Cristian Măgherușan-Stanciu (cristi.magherusan(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/77 -gerrit commit d4b907913375b334f26cfa294cac3212e49f2816 Author: Cristian Măgherușan-Stanciu <cristi.magherusan(a)gmail.com> Date: Sat Jul 2 01:11:11 2011 +0300 usage example of the simplified ACPI code Change-Id: I7dcbf14a327fb347973b4cd9b7b3a4d6cdb31d7f Signed-off-by: Cristian Măgherușan-Stanciu <cristi.magherusan(a)gmail.com> --- src/mainboard/asus/m2v-mx_se/acpi_tables.c | 100 +-------------- src/mainboard/lenovo/t60/acpi_tables.c | 194 +++------------------------- 2 files changed, 20 insertions(+), 274 deletions(-) diff --git a/src/mainboard/asus/m2v-mx_se/acpi_tables.c b/src/mainboard/asus/m2v-mx_se/acpi_tables.c index 73e3768..1471ad9 100644 --- a/src/mainboard/asus/m2v-mx_se/acpi_tables.c +++ b/src/mainboard/asus/m2v-mx_se/acpi_tables.c @@ -94,103 +94,5 @@ unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_ta unsigned long write_acpi_tables(unsigned long start) { - unsigned long current; - acpi_rsdp_t *rsdp; - acpi_srat_t *srat; - acpi_rsdt_t *rsdt; - acpi_mcfg_t *mcfg; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_fadt_t *fadt; - acpi_facs_t *facs; - acpi_slit_t *slit; - acpi_header_t *ssdt; - acpi_header_t *dsdt; - - /* Align ACPI tables to 16 byte. */ - start = (start + 0x0f) & -0x10; - current = start; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start); - - /* We need at least an RSDP and an RSDT table. */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - - /* Clear all table memory. */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, NULL); - acpi_write_rsdt(rsdt); - - /* We explicitly add these tables later on: */ - printk(BIOS_DEBUG, "ACPI: * FACS\n"); - - /* we should align FACS to 64B as per ACPI specs */ - - current = ALIGN(current, 64); - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - acpi_create_facs(facs); - - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - memcpy(dsdt, &AmlCode, dsdt->length); - dsdt->checksum = 0; /* Don't trust iasl to get this right. */ - dsdt->checksum = acpi_checksum((u8*)dsdt, dsdt->length); - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt, - dsdt->length); - printk(BIOS_DEBUG, "ACPI: * FADT\n"); - - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - - printk(BIOS_DEBUG, "ACPI: * HPET\n"); - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - acpi_create_hpet(hpet); - acpi_add_table(rsdp, hpet); - - /* If we want to use HPET timers Linux wants an MADT. */ - printk(BIOS_DEBUG, "ACPI: * MADT\n"); - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - acpi_add_table(rsdp, madt); - - printk(BIOS_DEBUG, "ACPI: * MCFG\n"); - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - acpi_add_table(rsdp, mcfg); - - printk(BIOS_DEBUG, "ACPI: * SRAT\n"); - srat = (acpi_srat_t *) current; - acpi_create_srat(srat); - current += srat->header.length; - acpi_add_table(rsdp, srat); - - /* SLIT */ - printk(BIOS_DEBUG, "ACPI: * SLIT\n"); - slit = (acpi_slit_t *) current; - acpi_create_slit(slit); - current+=slit->header.length; - acpi_add_table(rsdp,slit); - - /* SSDT */ - printk(BIOS_DEBUG, "ACPI: * SSDT\n"); - ssdt = (acpi_header_t *)current; - - acpi_create_ssdt_generator(ssdt, "DYNADATA"); - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - - printk(BIOS_INFO, "ACPI: done.\n"); - return current; + return acpi_write_tables(start, AmlCode); } diff --git a/src/mainboard/lenovo/t60/acpi_tables.c b/src/mainboard/lenovo/t60/acpi_tables.c index 3742c20..4056e75 100644 --- a/src/mainboard/lenovo/t60/acpi_tables.c +++ b/src/mainboard/lenovo/t60/acpi_tables.c @@ -32,9 +32,6 @@ #include "dmi.h" extern const unsigned char AmlCode[]; -#if CONFIG_HAVE_ACPI_SLIC -unsigned long acpi_create_slic(unsigned long current); -#endif #include "southbridge/intel/i82801gx/nvs.h" static void acpi_create_gnvs(global_nvs_t *gnvs) @@ -56,38 +53,6 @@ static void acpi_create_gnvs(global_nvs_t *gnvs) gnvs->did[4] = 0x00000005; } -static void acpi_create_intel_hpet(acpi_hpet_t * hpet) -{ -#define HPET_ADDR 0xfed00000ULL - acpi_header_t *header = &(hpet->header); - acpi_addr_t *addr = &(hpet->addr); - - memset((void *) hpet, 0, sizeof(acpi_hpet_t)); - - /* fill out header fields */ - memcpy(header->signature, "HPET", 4); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, "COREBOOT", 8); - memcpy(header->asl_compiler_id, ASLC, 4); - - header->length = sizeof(acpi_hpet_t); - header->revision = 1; - - /* fill out HPET address */ - addr->space_id = 0; /* Memory */ - addr->bit_width = 64; - addr->bit_offset = 0; - addr->addrl = HPET_ADDR & 0xffffffff; - addr->addrh = HPET_ADDR >> 32; - - hpet->id = 0x8086a201; /* Intel */ - hpet->number = 0x00; - hpet->min_tick = 0x0080; - - header->checksum = - acpi_checksum((void *) hpet, sizeof(acpi_hpet_t)); -} - unsigned long acpi_fill_madt(unsigned long current) { /* Local APICs */ @@ -136,129 +101,31 @@ unsigned long acpi_fill_srat(unsigned long current) void smm_setup_structures(void *gnvs, void *tcg, void *smi1); -#define ALIGN_CURRENT current = ((current + 0x0f) & -0x10) -unsigned long write_acpi_tables(unsigned long start) + +void acpi_patch_dsdt(acpi_header_t *dsdt, unsigned long *current) { - unsigned long current; int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; -#if CONFIG_HAVE_ACPI_SLIC - acpi_header_t *slic; -#endif - acpi_header_t *ssdt; - acpi_header_t *dsdt; void *gnvs; - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - /* - * We explicitly add these tables later on: - */ - printk(BIOS_DEBUG, "ACPI: * HPET\n"); - - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_intel_hpet(hpet); - acpi_add_table(rsdp, hpet); - - /* If we want to use HPET Timers Linux wants an MADT */ - printk(BIOS_DEBUG, "ACPI: * MADT\n"); - - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - - printk(BIOS_DEBUG, "ACPI: * MCFG\n"); - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - - printk(BIOS_DEBUG, "ACPI: * FACS\n"); - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - memcpy(dsdt, &AmlCode, dsdt->length); - - /* Fix up global NVS region for SMI handler. The GNVS region lives - * in the (high) table area. The low memory map looks like this: - * - * 0x00000000 - 0x000003ff Real Mode IVT - * 0x00000020 - 0x0000019c Low MP Table (XXX conflict?) - * 0x00000400 - 0x000004ff BDA (somewhat unused) - * 0x00000500 - 0x0000052f Moved GDT - * 0x00000530 - 0x00000b64 coreboot table - * 0x0007c000 - 0x0007dfff OS boot sector (unused?) - * 0x0007e000 - 0x0007ffff free to use (so no good for acpi+smi) - * 0x00080000 - 0x0009fbff usable ram - * 0x0009fc00 - 0x0009ffff EBDA (unused?) - * 0x000a0000 - 0x000bffff VGA memory - * 0x000c0000 - 0x000cffff VGA option rom - * 0x000d0000 - 0x000dffff free for other option roms? - * 0x000e0000 - 0x000fffff SeaBIOS? (conflict with low tables:) - * 0x000f0000 - 0x000f03ff PIRQ table - * 0x000f0400 - 0x000f66?? ACPI tables - * 0x000f66?? - 0x000f???? DMI tables - */ - - ALIGN_CURRENT; + *current = ALIGN(*current, 64); /* Pack GNVS into the ACPI table area */ for (i=0; i < dsdt->length; i++) { if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in DSDT at offset 0x%04x -> 0x%08x\n", i, (u32)current); - *(u32*)(((u32)dsdt) + i) = current; // 0x92 bytes + printk(BIOS_DEBUG, "ACPI: Patching up global NVS in DSDT at offset 0x%04x -> 0x%08x\n", i, (u32)*current); + *(u32*)(((u32)dsdt) + i) = *current; // 0x92 bytes break; } } /* And fill it */ - acpi_create_gnvs((global_nvs_t *)current); + acpi_create_gnvs((global_nvs_t *)*current); /* Keep pointer around */ - gnvs = (void *)current; + gnvs = (void *)*current; - current += 0x100; - ALIGN_CURRENT; + *current += 0x100; + *current = ALIGN(*current, 64); /* And tell SMI about it */ smm_setup_structures(gnvs, NULL, NULL); @@ -266,48 +133,25 @@ unsigned long write_acpi_tables(unsigned long start) /* We patched up the DSDT, so we need to recalculate the checksum */ dsdt->checksum = 0; dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); +} - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt, - dsdt->length); - -#if CONFIG_HAVE_ACPI_SLIC - printk(BIOS_DEBUG, "ACPI: * SLIC\n"); - slic = (acpi_header_t *)current; - current += acpi_create_slic(current); - ALIGN_CURRENT; - acpi_add_table(rsdp, slic); -#endif - - printk(BIOS_DEBUG, "ACPI: * FADT\n"); - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - - printk(BIOS_DEBUG, "ACPI: * SSDT\n"); - ssdt = (acpi_header_t *)current; - acpi_create_ssdt_generator(ssdt, "COREBOOT"); - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - ALIGN_CURRENT; - - printk(BIOS_DEBUG, "current = %lx\n", current); - +void acpi_dmi_workaround(unsigned long *current) +{ printk(BIOS_DEBUG, "ACPI: * DMI (Linux workaround)\n"); memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE); #if CONFIG_WRITE_HIGH_TABLES == 1 - memcpy((void *)current, dmi_table, DMI_TABLE_SIZE); - current += DMI_TABLE_SIZE; - ALIGN_CURRENT; + memcpy((void *)*current, dmi_table, DMI_TABLE_SIZE); + *current += DMI_TABLE_SIZE; + *current = ALIGN(*current, 64); #endif - printk(BIOS_INFO, "ACPI: done.\n"); +} +unsigned long write_acpi_tables(unsigned long start) +{ /* Enable Dummy DCC ON# for DVI */ printk(BIOS_DEBUG, "Laptop handling...\n"); outb(inb(0x60f) & ~(1 << 5), 0x60f); - return current; + return acpi_write_tables(start, AmlCode); }

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coreboot July 2011