coreboot August 2010

coreboot@coreboot.org

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267 discussions

Alix.2D3 / Coreboot v4 support
by Aurélien 30 Aug '10

30 Aug '10

Hi everyone, I just finished porting Coreboot v4 to the PC Engines Alix.2d3 board ( http://www.pcengines.ch/alix2d3.htm), using the sources for alix.2c3 from coreboot-v3 and alix.1c from coreboot-v4. It boots Linux correctly using the FILO payload. So far everything's okay. For reviews, I attached a patch which should be applied against the current coreboot [r5738] trunk. Please tell me what you think. Known issue with Voyage Linux 0.6 (http://linux.voyage.hk/): The front LEDs won't work out of the box. That's because the Voyage Linux kernel (2.6.26) uses a hard-coded GPIO address, instead of looking at the right one on the PCI bus. Please update this particular driver to a more recent (and correct) version and you should be ok. Board support information for the wiki: Vendor: PC Engines Mainboard: ALIX.2D3 Northbridge: AMD Geode LX Southbridge: AMD Geode CS5536 Super I/O: - CPU: AMD Geode LX Socket: - Status: OK ROM Chip Package: TSOP ROM Chip Protocol: LPC ROM Chip Socketed: N Supported by flashrom: Y VCS: 4 Best regards, -- Aurélien Guillaume

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[PATCH] Support for Asus M4A785-M
by Juhana Helovuo 30 Aug '10

30 Aug '10

Hello, The following patch adds support for Asus M4A785-M mainboard. Tested to work at least with Grub2+Linux and Coreinfo. Not quite perfect yet, but it manages to boot Linux and most on-board devices work, e.g. IDE controller, VGA, Ethernet. Intel HDA sound is still problematic. Hope this patch does not break anything, since it modifies also some code not specific to this board. Signed-off-by: Juhana Helovuo <juhe(a)iki.fi> Best regards, Juhana Helovuo

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build service results for r5756
by repository service 30 Aug '10

30 Aug '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5756 to the coreboot repository. This caused the following changes: Change Log: We call this cache as ram everywhere, so let's call it the same in Kconfig Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Peter Stuge <peter(a)stuge.se> Build Log: Compilation of a-trend:atc-6220 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5756&device=atc-6220&vendo… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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build service results for r5755
by repository service 30 Aug '10

30 Aug '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5755 to the coreboot repository. This caused the following changes: Change Log: Fix intel mtarvon compilation by switching it over to CAR. This should be unproblematic, as there are other boards with the same "socket" that work with CAR already. Tests are highly appreciated though! Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of a-trend:atc-6220 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5755&device=atc-6220&vendo… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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build service results for r5754
by repository service 30 Aug '10

30 Aug '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5754 to the coreboot repository. This caused the following changes: Change Log: Restructured all vendors' Kconfig files to no longer source the boards' Kconfigs from within the choice/endchoice block. This makes it possible to define user visible board specific options. Moved all vendor names and PCI ids to the vendors' Kconfigs. Now all options in each file depend on the same symbol, so replaced all "depends on"s with a single "if". Sorted boards (sort -d), cleaned whitespace. This patch also introduces a dummy option BOARD_SPECIFIC_OPTIONS, which is always "y" and never used. It it simply needed to have something to attach the boards' "select" statements to. Signed-off-by: Jens Rottmann <JRottmann(a)LiPPERTEmbedded.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of a-trend:atc-6220 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5754&device=atc-6220&vendo… Compilation of digitallogic:adl855pc has been fixed Compilation of intel:mtarvon has been fixed Compilation of lanner:em8510 has been fixed If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[commit] r5756 - in trunk/src: console cpu cpu/amd/model_10xxx cpu/amd/model_fxx cpu/amd/model_gx2 cpu/amd/model_lx cpu/intel/socket_FC_PGA370 cpu/x86/mtrr include include/cpu/x86 lib mainboard/amd...
by repository service 30 Aug '10

30 Aug '10

Author: stepan Date: Mon Aug 30 19:53:13 2010 New Revision: 5756 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5756 Log: We call this cache as ram everywhere, so let's call it the same in Kconfig Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/src/console/Makefile.inc trunk/src/cpu/Kconfig trunk/src/cpu/amd/model_10xxx/Kconfig trunk/src/cpu/amd/model_fxx/Kconfig trunk/src/cpu/amd/model_gx2/syspreinit.c trunk/src/cpu/amd/model_lx/syspreinit.c trunk/src/cpu/intel/socket_FC_PGA370/Kconfig trunk/src/cpu/x86/mtrr/earlymtrr.c trunk/src/include/assert.h trunk/src/include/cpu/x86/bist.h trunk/src/lib/generic_sdram.c trunk/src/lib/ramtest.c trunk/src/lib/usbdebug.c trunk/src/mainboard/amd/db800/Kconfig trunk/src/mainboard/amd/dbm690t/Kconfig trunk/src/mainboard/amd/mahogany/Kconfig trunk/src/mainboard/amd/mahogany_fam10/Kconfig trunk/src/mainboard/amd/norwich/Kconfig trunk/src/mainboard/amd/pistachio/Kconfig trunk/src/mainboard/amd/rumba/Kconfig trunk/src/mainboard/amd/serengeti_cheetah/Kconfig trunk/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig trunk/src/mainboard/amd/tilapia_fam10/Kconfig trunk/src/mainboard/arima/hdama/Kconfig trunk/src/mainboard/artecgroup/dbe61/Kconfig trunk/src/mainboard/asrock/939a785gmh/Kconfig trunk/src/mainboard/asus/a8n_e/Kconfig trunk/src/mainboard/asus/a8v-e_se/Kconfig trunk/src/mainboard/asus/m2v-mx_se/Kconfig trunk/src/mainboard/broadcom/blast/Kconfig trunk/src/mainboard/digitallogic/adl855pc/Kconfig trunk/src/mainboard/digitallogic/msm800sev/Kconfig trunk/src/mainboard/getac/p470/Kconfig trunk/src/mainboard/gigabyte/ga_2761gxdk/Kconfig trunk/src/mainboard/gigabyte/m57sli/Kconfig trunk/src/mainboard/gigabyte/ma785gmt/Kconfig trunk/src/mainboard/gigabyte/ma78gm/Kconfig trunk/src/mainboard/hp/dl145_g3/Kconfig trunk/src/mainboard/ibase/mb899/Kconfig trunk/src/mainboard/ibm/e325/Kconfig trunk/src/mainboard/ibm/e326/Kconfig trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig trunk/src/mainboard/intel/d945gclf/Kconfig trunk/src/mainboard/intel/mtarvon/Kconfig trunk/src/mainboard/iwill/dk8_htx/Kconfig trunk/src/mainboard/iwill/dk8s2/Kconfig trunk/src/mainboard/iwill/dk8x/Kconfig trunk/src/mainboard/jetway/pa78vm5/Kconfig trunk/src/mainboard/kontron/986lcd-m/Kconfig trunk/src/mainboard/kontron/kt690/Kconfig trunk/src/mainboard/lanner/em8510/Kconfig trunk/src/mainboard/lippert/frontrunner/Kconfig trunk/src/mainboard/lippert/roadrunner-lx/Kconfig trunk/src/mainboard/lippert/spacerunner-lx/Kconfig trunk/src/mainboard/msi/ms7135/Kconfig trunk/src/mainboard/msi/ms7260/Kconfig trunk/src/mainboard/msi/ms9185/Kconfig trunk/src/mainboard/msi/ms9282/Kconfig trunk/src/mainboard/msi/ms9652_fam10/Kconfig trunk/src/mainboard/newisys/khepri/Kconfig trunk/src/mainboard/nvidia/l1_2pvv/Kconfig trunk/src/mainboard/olpc/btest/Kconfig trunk/src/mainboard/olpc/rev_a/Kconfig trunk/src/mainboard/pcengines/alix1c/Kconfig trunk/src/mainboard/pcengines/alix2d3/Kconfig trunk/src/mainboard/rca/rm4100/Kconfig trunk/src/mainboard/sunw/ultra40/Kconfig trunk/src/mainboard/supermicro/h8dme/Kconfig trunk/src/mainboard/supermicro/h8dmr/Kconfig trunk/src/mainboard/supermicro/h8dmr_fam10/Kconfig trunk/src/mainboard/supermicro/h8qme_fam10/Kconfig trunk/src/mainboard/technexion/tim5690/Kconfig trunk/src/mainboard/technexion/tim8690/Kconfig trunk/src/mainboard/thomson/ip1000/Kconfig trunk/src/mainboard/traverse/geos/Kconfig trunk/src/mainboard/tyan/s2735/Kconfig trunk/src/mainboard/tyan/s2912/Kconfig trunk/src/mainboard/tyan/s2912_fam10/Kconfig trunk/src/mainboard/tyan/s4880/Kconfig trunk/src/mainboard/tyan/s4882/Kconfig trunk/src/mainboard/via/vt8454c/Kconfig trunk/src/mainboard/winent/pl6064/Kconfig trunk/src/mainboard/wyse/s50/Kconfig trunk/src/northbridge/intel/e7501/debug.c trunk/src/northbridge/intel/i3100/raminit.c trunk/src/pc80/Makefile.inc trunk/src/pc80/serial.c Modified: trunk/src/console/Makefile.inc ============================================================================== --- trunk/src/console/Makefile.inc Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/console/Makefile.inc Mon Aug 30 19:53:13 2010 (r5756) @@ -7,7 +7,7 @@ smmobj-y += vtxprintf.o initobj-y += vtxprintf.o -initobj-$(CONFIG_USE_DCACHE_RAM) += console.o +initobj-$(CONFIG_CACHE_AS_RAM) += console.o driver-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.o driver-$(CONFIG_USBDEBUG) += usbdebug_console.o Modified: trunk/src/cpu/Kconfig ============================================================================== --- trunk/src/cpu/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/cpu/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -3,7 +3,7 @@ source src/cpu/via/Kconfig source src/cpu/x86/Kconfig -config USE_DCACHE_RAM +config CACHE_AS_RAM bool default !ROMCC Modified: trunk/src/cpu/amd/model_10xxx/Kconfig ============================================================================== --- trunk/src/cpu/amd/model_10xxx/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/cpu/amd/model_10xxx/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -1,6 +1,6 @@ config CPU_AMD_MODEL_10XXX bool - select USE_DCACHE_RAM + select CACHE_AS_RAM select SSE select SSE2 Modified: trunk/src/cpu/amd/model_fxx/Kconfig ============================================================================== --- trunk/src/cpu/amd/model_fxx/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/cpu/amd/model_fxx/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -1,6 +1,6 @@ config CPU_AMD_MODEL_FXX bool - select USE_DCACHE_RAM + select CACHE_AS_RAM select MMX select SSE select SSE2 Modified: trunk/src/cpu/amd/model_gx2/syspreinit.c ============================================================================== --- trunk/src/cpu/amd/model_gx2/syspreinit.c Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/cpu/amd/model_gx2/syspreinit.c Mon Aug 30 19:53:13 2010 (r5756) @@ -16,7 +16,7 @@ void SystemPreInit(void) { /* they want a jump ... */ -#ifndef CONFIG_USE_DCACHE_RAM +#ifndef CONFIG_CACHE_AS_RAM __asm__ __volatile__("jmp .+2\ninvd\njmp .+2\n"); #endif StartTimer1(); Modified: trunk/src/cpu/amd/model_lx/syspreinit.c ============================================================================== --- trunk/src/cpu/amd/model_lx/syspreinit.c Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/cpu/amd/model_lx/syspreinit.c Mon Aug 30 19:53:13 2010 (r5756) @@ -39,7 +39,7 @@ { /* they want a jump ... */ -#ifndef CONFIG_USE_DCACHE_RAM +#ifndef CONFIG_CACHE_AS_RAM __asm__ __volatile__("jmp .+2\ninvd\njmp .+2\n"); #endif StartTimer1(); Modified: trunk/src/cpu/intel/socket_FC_PGA370/Kconfig ============================================================================== --- trunk/src/cpu/intel/socket_FC_PGA370/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/cpu/intel/socket_FC_PGA370/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -23,7 +23,7 @@ select CPU_INTEL_MODEL_68X select MMX select SSE - select USE_DCACHE_RAM + select CACHE_AS_RAM select TINY_BOOTBLOCK config DCACHE_RAM_BASE Modified: trunk/src/cpu/x86/mtrr/earlymtrr.c ============================================================================== --- trunk/src/cpu/x86/mtrr/earlymtrr.c Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/cpu/x86/mtrr/earlymtrr.c Mon Aug 30 19:53:13 2010 (r5756) @@ -62,7 +62,7 @@ enable_cache(); } -#if !defined(CONFIG_USE_DCACHE_RAM) || (CONFIG_USE_DCACHE_RAM == 0) +#if !defined(CONFIG_CACHE_AS_RAM) || (CONFIG_CACHE_AS_RAM == 0) /* the fixed and variable MTTRs are power-up with random values, * clear them to MTRR_TYPE_UNCACHEABLE for safty. */ Modified: trunk/src/include/assert.h ============================================================================== --- trunk/src/include/assert.h Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/include/assert.h Mon Aug 30 19:53:13 2010 (r5756) @@ -20,7 +20,7 @@ #ifndef __ASSERT_H__ #define __ASSERT_H__ -#if defined(__PRE_RAM__) && !CONFIG_USE_DCACHE_RAM +#if defined(__PRE_RAM__) && !CONFIG_CACHE_AS_RAM /* ROMCC versions */ #define ASSERT(x) { \ Modified: trunk/src/include/cpu/x86/bist.h ============================================================================== --- trunk/src/include/cpu/x86/bist.h Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/include/cpu/x86/bist.h Mon Aug 30 19:53:13 2010 (r5756) @@ -4,7 +4,7 @@ static void report_bist_failure(u32 bist) { if (bist != 0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_EMERG, "BIST failed: %08x", bist); #else print_emerg("BIST failed: "); Modified: trunk/src/lib/generic_sdram.c ============================================================================== --- trunk/src/lib/generic_sdram.c Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/lib/generic_sdram.c Mon Aug 30 19:53:13 2010 (r5756) @@ -6,7 +6,7 @@ static inline void print_debug_sdram_8(const char *strval, uint32_t val) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%s%02x\n", strval, val); #else print_debug(strval); print_debug_hex8(val); print_debug("\n"); Modified: trunk/src/lib/ramtest.c ============================================================================== --- trunk/src/lib/ramtest.c Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/lib/ramtest.c Mon Aug 30 19:53:13 2010 (r5756) @@ -51,7 +51,7 @@ /* * Fill. */ -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "DRAM fill: 0x%08lx-0x%08lx\n", start, stop); #else print_debug("DRAM fill: "); @@ -63,7 +63,7 @@ for(addr = start; addr < stop ; addr += 4) { /* Display address being filled */ if (!(addr & 0xfffff)) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%08lx \r", addr); #else print_debug_hex32(addr); @@ -73,7 +73,7 @@ write_phys(addr, (u32)addr); }; /* Display final address */ -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%08lx\nDRAM filled\n", addr); #else print_debug_hex32(addr); @@ -88,7 +88,7 @@ /* * Verify. */ -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "DRAM verify: 0x%08lx-0x%08lx\n", start, stop); #else print_debug("DRAM verify: "); @@ -101,7 +101,7 @@ unsigned long value; /* Display address being tested */ if (!(addr & 0xfffff)) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%08lx \r", addr); #else print_debug_hex32(addr); @@ -111,7 +111,7 @@ value = read_phys(addr); if (value != addr) { /* Display address with error */ -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_ERR, "Fail: @0x%08lx Read value=0x%08lx\n", addr, value); #else print_err("Fail: @0x"); @@ -122,7 +122,7 @@ #endif i++; if(i>256) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "Aborting.\n"); #else print_debug("Aborting.\n"); @@ -132,14 +132,14 @@ } } /* Display final address */ -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%08lx", addr); #else print_debug_hex32(addr); #endif if (i) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n"); #else print_debug("\nDRAM did _NOT_ verify!\n"); @@ -147,7 +147,7 @@ die("DRAM ERROR"); } else { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\nDRAM range verified.\n"); #else print_debug("\nDRAM range verified.\n"); @@ -163,7 +163,7 @@ * test than a "Is my DRAM faulty?" test. Not all bits * are tested. -Tyson */ -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "Testing DRAM : %08lx - %08lx\n", start, stop); #else print_debug("Testing DRAM : "); @@ -176,7 +176,7 @@ /* Make sure we don't read before we wrote */ phys_memory_barrier(); ram_verify(start, stop); -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "Done.\n"); #else print_debug("Done.\n"); Modified: trunk/src/lib/usbdebug.c ============================================================================== --- trunk/src/lib/usbdebug.c Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/lib/usbdebug.c Mon Aug 30 19:53:13 2010 (r5756) @@ -22,7 +22,7 @@ #if !defined(__ROMCC__) #include <console/console.h> #else -#if CONFIG_USE_DCACHE_RAM==0 +#if CONFIG_CACHE_AS_RAM==0 #define printk(BIOS_DEBUG, fmt, arg...) do {} while(0) #endif #endif Modified: trunk/src/mainboard/amd/db800/Kconfig ============================================================================== --- trunk/src/mainboard/amd/db800/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/amd/db800/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -10,7 +10,7 @@ select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_256 config MAINBOARD_DIR Modified: trunk/src/mainboard/amd/dbm690t/Kconfig ============================================================================== --- trunk/src/mainboard/amd/dbm690t/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/amd/dbm690t/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -16,7 +16,7 @@ select HAVE_OPTION_TABLE select HAVE_MAINBOARD_RESOURCES select HAVE_BUS_CONFIG - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select BOARD_ROMSIZE_KB_1024 Modified: trunk/src/mainboard/amd/mahogany/Kconfig ============================================================================== --- trunk/src/mainboard/amd/mahogany/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/amd/mahogany/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -17,7 +17,7 @@ select HAVE_MAINBOARD_RESOURCES select HAVE_BUS_CONFIG select LIFT_BSP_APIC_ID - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select BOARD_ROMSIZE_KB_1024 Modified: trunk/src/mainboard/amd/mahogany_fam10/Kconfig ============================================================================== --- trunk/src/mainboard/amd/mahogany_fam10/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/amd/mahogany_fam10/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -14,7 +14,7 @@ select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE select HAVE_MAINBOARD_RESOURCES - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select LIFT_BSP_APIC_ID Modified: trunk/src/mainboard/amd/norwich/Kconfig ============================================================================== --- trunk/src/mainboard/amd/norwich/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/amd/norwich/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -9,7 +9,7 @@ select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_256 config MAINBOARD_DIR Modified: trunk/src/mainboard/amd/pistachio/Kconfig ============================================================================== --- trunk/src/mainboard/amd/pistachio/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/amd/pistachio/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -13,7 +13,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select WAIT_BEFORE_CPUS_INIT Modified: trunk/src/mainboard/amd/rumba/Kconfig ============================================================================== --- trunk/src/mainboard/amd/rumba/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/amd/rumba/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -25,7 +25,7 @@ select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5536 select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_PIRQ_TABLE select BOARD_ROMSIZE_KB_256 Modified: trunk/src/mainboard/amd/serengeti_cheetah/Kconfig ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/amd/serengeti_cheetah/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -14,7 +14,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID #select AP_CODE_IN_CAR Modified: trunk/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -13,7 +13,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select SERIAL_CPU_INIT Modified: trunk/src/mainboard/amd/tilapia_fam10/Kconfig ============================================================================== --- trunk/src/mainboard/amd/tilapia_fam10/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/amd/tilapia_fam10/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -14,7 +14,7 @@ select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE select HAVE_MAINBOARD_RESOURCES - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select LIFT_BSP_APIC_ID Modified: trunk/src/mainboard/arima/hdama/Kconfig ============================================================================== --- trunk/src/mainboard/arima/hdama/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/arima/hdama/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_PIRQ_TABLE select HAVE_OPTION_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select BOARD_ROMSIZE_KB_512 Modified: trunk/src/mainboard/artecgroup/dbe61/Kconfig ============================================================================== --- trunk/src/mainboard/artecgroup/dbe61/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/artecgroup/dbe61/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -9,7 +9,7 @@ select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_256 config MAINBOARD_DIR Modified: trunk/src/mainboard/asrock/939a785gmh/Kconfig ============================================================================== --- trunk/src/mainboard/asrock/939a785gmh/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/asrock/939a785gmh/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -18,7 +18,7 @@ select HAVE_OPTION_TABLE select HAVE_BUS_CONFIG select LIFT_BSP_APIC_ID - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select BOARD_ROMSIZE_KB_1024 Modified: trunk/src/mainboard/asus/a8n_e/Kconfig ============================================================================== --- trunk/src/mainboard/asus/a8n_e/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/asus/a8n_e/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 Modified: trunk/src/mainboard/asus/a8v-e_se/Kconfig ============================================================================== --- trunk/src/mainboard/asus/a8v-e_se/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/asus/a8v-e_se/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -10,7 +10,7 @@ select SOUTHBRIDGE_VIA_VT8237R select SOUTHBRIDGE_VIA_K8T890 select SUPERIO_WINBOND_W83627EHG - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_OPTION_TABLE select HAVE_ACPI_TABLES select HAVE_MP_TABLE Modified: trunk/src/mainboard/asus/m2v-mx_se/Kconfig ============================================================================== --- trunk/src/mainboard/asus/m2v-mx_se/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/asus/m2v-mx_se/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -27,7 +27,7 @@ select SOUTHBRIDGE_VIA_VT8237R select SOUTHBRIDGE_VIA_K8M890 select SUPERIO_ITE_IT8712F - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_OPTION_TABLE select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_512 Modified: trunk/src/mainboard/broadcom/blast/Kconfig ============================================================================== --- trunk/src/mainboard/broadcom/blast/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/broadcom/blast/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -13,7 +13,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 select SB_HT_CHAIN_UNITID_OFFSET_ONLY Modified: trunk/src/mainboard/digitallogic/adl855pc/Kconfig ============================================================================== --- trunk/src/mainboard/digitallogic/adl855pc/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/digitallogic/adl855pc/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -11,7 +11,7 @@ select HAVE_PIRQ_TABLE select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_1024 - select USE_DCACHE_RAM + select CACHE_AS_RAM select TINY_BOOTBLOCK config MAINBOARD_DIR Modified: trunk/src/mainboard/digitallogic/msm800sev/Kconfig ============================================================================== --- trunk/src/mainboard/digitallogic/msm800sev/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/digitallogic/msm800sev/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -10,7 +10,7 @@ select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_256 config MAINBOARD_DIR Modified: trunk/src/mainboard/getac/p470/Kconfig ============================================================================== --- trunk/src/mainboard/getac/p470/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/getac/p470/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -42,7 +42,7 @@ select UDELAY_LAPIC select HAVE_SMI_HANDLER select BOARD_ROMSIZE_KB_1024 - select USE_DCACHE_RAM + select CACHE_AS_RAM select GFXUMA select TINY_BOOTBLOCK Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/Kconfig ============================================================================== --- trunk/src/mainboard/gigabyte/ga_2761gxdk/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/gigabyte/ga_2761gxdk/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -11,7 +11,7 @@ select HAVE_BUS_CONFIG select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select K8_REV_F_SUPPORT Modified: trunk/src/mainboard/gigabyte/m57sli/Kconfig ============================================================================== --- trunk/src/mainboard/gigabyte/m57sli/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/gigabyte/m57sli/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -13,7 +13,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select HAVE_ACPI_TABLES Modified: trunk/src/mainboard/gigabyte/ma785gmt/Kconfig ============================================================================== --- trunk/src/mainboard/gigabyte/ma785gmt/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/gigabyte/ma785gmt/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -14,7 +14,7 @@ select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE select HAVE_MAINBOARD_RESOURCES - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select LIFT_BSP_APIC_ID Modified: trunk/src/mainboard/gigabyte/ma78gm/Kconfig ============================================================================== --- trunk/src/mainboard/gigabyte/ma78gm/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/gigabyte/ma78gm/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -14,7 +14,7 @@ select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE select HAVE_MAINBOARD_RESOURCES - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select LIFT_BSP_APIC_ID Modified: trunk/src/mainboard/hp/dl145_g3/Kconfig ============================================================================== --- trunk/src/mainboard/hp/dl145_g3/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/hp/dl145_g3/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -13,7 +13,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select BOARD_ROMSIZE_KB_512 Modified: trunk/src/mainboard/ibase/mb899/Kconfig ============================================================================== --- trunk/src/mainboard/ibase/mb899/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/ibase/mb899/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -19,7 +19,7 @@ select MMCONF_SUPPORT select HAVE_SMI_HANDLER select BOARD_ROMSIZE_KB_512 - select USE_DCACHE_RAM + select CACHE_AS_RAM select GFXUMA select TINY_BOOTBLOCK Modified: trunk/src/mainboard/ibm/e325/Kconfig ============================================================================== --- trunk/src/mainboard/ibm/e325/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/ibm/e325/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select WAIT_BEFORE_CPUS_INIT Modified: trunk/src/mainboard/ibm/e326/Kconfig ============================================================================== --- trunk/src/mainboard/ibm/e326/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/ibm/e326/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select WAIT_BEFORE_CPUS_INIT Modified: trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig ============================================================================== --- trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -9,7 +9,7 @@ select SUPERIO_WINBOND_W83627HF select HAVE_PIRQ_TABLE select PIRQ_ROUTE - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_256 config MAINBOARD_DIR Modified: trunk/src/mainboard/intel/d945gclf/Kconfig ============================================================================== --- trunk/src/mainboard/intel/d945gclf/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/intel/d945gclf/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -41,7 +41,7 @@ select HAVE_ACPI_TABLES select HAVE_SMI_HANDLER select BOARD_ROMSIZE_KB_512 - select USE_DCACHE_RAM + select CACHE_AS_RAM select GFXUMA select TINY_BOOTBLOCK Modified: trunk/src/mainboard/intel/mtarvon/Kconfig ============================================================================== --- trunk/src/mainboard/intel/mtarvon/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/intel/mtarvon/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -7,7 +7,7 @@ select NORTHBRIDGE_INTEL_I3100 select SOUTHBRIDGE_INTEL_I3100 select SUPERIO_INTEL_I3100 - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select HAVE_PIRQ_TABLE select HAVE_MP_TABLE Modified: trunk/src/mainboard/iwill/dk8_htx/Kconfig ============================================================================== --- trunk/src/mainboard/iwill/dk8_htx/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/iwill/dk8_htx/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -14,7 +14,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select SB_HT_CHAIN_UNITID_OFFSET_ONLY Modified: trunk/src/mainboard/iwill/dk8s2/Kconfig ============================================================================== --- trunk/src/mainboard/iwill/dk8s2/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/iwill/dk8s2/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_PIRQ_TABLE select HAVE_OPTION_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select WAIT_BEFORE_CPUS_INIT Modified: trunk/src/mainboard/iwill/dk8x/Kconfig ============================================================================== --- trunk/src/mainboard/iwill/dk8x/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/iwill/dk8x/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select WAIT_BEFORE_CPUS_INIT Modified: trunk/src/mainboard/jetway/pa78vm5/Kconfig ============================================================================== --- trunk/src/mainboard/jetway/pa78vm5/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/jetway/pa78vm5/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -14,7 +14,7 @@ select GENERATE_PIRQ_TABLE select GENERATE_MP_TABLE select HAVE_MAINBOARD_RESOURCES - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select LIFT_BSP_APIC_ID Modified: trunk/src/mainboard/kontron/986lcd-m/Kconfig ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/kontron/986lcd-m/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -19,7 +19,7 @@ select MMCONF_SUPPORT select HAVE_SMI_HANDLER select BOARD_ROMSIZE_KB_1024 - select USE_DCACHE_RAM + select CACHE_AS_RAM select GFXUMA select TINY_BOOTBLOCK Modified: trunk/src/mainboard/kontron/kt690/Kconfig ============================================================================== --- trunk/src/mainboard/kontron/kt690/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/kontron/kt690/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -16,7 +16,7 @@ select HAVE_MP_TABLE select HAVE_MAINBOARD_RESOURCES select GFXUMA - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_1024 Modified: trunk/src/mainboard/lanner/em8510/Kconfig ============================================================================== --- trunk/src/mainboard/lanner/em8510/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/lanner/em8510/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -11,7 +11,7 @@ select HAVE_PIRQ_TABLE select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 - select USE_DCACHE_RAM + select CACHE_AS_RAM select TINY_BOOTBLOCK config MAINBOARD_DIR Modified: trunk/src/mainboard/lippert/frontrunner/Kconfig ============================================================================== --- trunk/src/mainboard/lippert/frontrunner/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/lippert/frontrunner/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -7,7 +7,7 @@ select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5535 select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_PIRQ_TABLE select BOARD_ROMSIZE_KB_256 Modified: trunk/src/mainboard/lippert/roadrunner-lx/Kconfig ============================================================================== --- trunk/src/mainboard/lippert/roadrunner-lx/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/lippert/roadrunner-lx/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -10,7 +10,7 @@ select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR Modified: trunk/src/mainboard/lippert/spacerunner-lx/Kconfig ============================================================================== --- trunk/src/mainboard/lippert/spacerunner-lx/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/lippert/spacerunner-lx/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -11,7 +11,7 @@ select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR Modified: trunk/src/mainboard/msi/ms7135/Kconfig ============================================================================== --- trunk/src/mainboard/msi/ms7135/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/msi/ms7135/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -13,7 +13,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR Modified: trunk/src/mainboard/msi/ms7260/Kconfig ============================================================================== --- trunk/src/mainboard/msi/ms7260/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/msi/ms7260/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select K8_REV_F_SUPPORT Modified: trunk/src/mainboard/msi/ms9185/Kconfig ============================================================================== --- trunk/src/mainboard/msi/ms9185/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/msi/ms9185/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -13,7 +13,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select BOARD_ROMSIZE_KB_512 Modified: trunk/src/mainboard/msi/ms9282/Kconfig ============================================================================== --- trunk/src/mainboard/msi/ms9282/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/msi/ms9282/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select K8_REV_F_SUPPORT select BOARD_ROMSIZE_KB_512 Modified: trunk/src/mainboard/msi/ms9652_fam10/Kconfig ============================================================================== --- trunk/src/mainboard/msi/ms9652_fam10/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/msi/ms9652_fam10/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -10,7 +10,7 @@ select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_OPTION_TABLE select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 Modified: trunk/src/mainboard/newisys/khepri/Kconfig ============================================================================== --- trunk/src/mainboard/newisys/khepri/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/newisys/khepri/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 select SB_HT_CHAIN_UNITID_OFFSET_ONLY Modified: trunk/src/mainboard/nvidia/l1_2pvv/Kconfig ============================================================================== --- trunk/src/mainboard/nvidia/l1_2pvv/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/nvidia/l1_2pvv/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select K8_REV_F_SUPPORT Modified: trunk/src/mainboard/olpc/btest/Kconfig ============================================================================== --- trunk/src/mainboard/olpc/btest/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/olpc/btest/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -7,7 +7,7 @@ select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5536 select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_PIRQ_TABLE select BOARD_ROMSIZE_KB_256 Modified: trunk/src/mainboard/olpc/rev_a/Kconfig ============================================================================== --- trunk/src/mainboard/olpc/rev_a/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/olpc/rev_a/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -7,7 +7,7 @@ select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5536 select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_PIRQ_TABLE select BOARD_ROMSIZE_KB_256 Modified: trunk/src/mainboard/pcengines/alix1c/Kconfig ============================================================================== --- trunk/src/mainboard/pcengines/alix1c/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/pcengines/alix1c/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -10,7 +10,7 @@ select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR Modified: trunk/src/mainboard/pcengines/alix2d3/Kconfig ============================================================================== --- trunk/src/mainboard/pcengines/alix2d3/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/pcengines/alix2d3/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -9,7 +9,7 @@ select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR Modified: trunk/src/mainboard/rca/rm4100/Kconfig ============================================================================== --- trunk/src/mainboard/rca/rm4100/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/rca/rm4100/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -14,7 +14,7 @@ select HAVE_MAINBOARD_RESOURCES select HAVE_SMI_HANDLER select GFXUMA - select USE_DCACHE_RAM + select CACHE_AS_RAM select TINY_BOOTBLOCK config MAINBOARD_DIR Modified: trunk/src/mainboard/sunw/ultra40/Kconfig ============================================================================== --- trunk/src/mainboard/sunw/ultra40/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/sunw/ultra40/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_1024 Modified: trunk/src/mainboard/supermicro/h8dme/Kconfig ============================================================================== --- trunk/src/mainboard/supermicro/h8dme/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/supermicro/h8dme/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET #select AP_CODE_IN_CAR select LIFT_BSP_APIC_ID Modified: trunk/src/mainboard/supermicro/h8dmr/Kconfig ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/supermicro/h8dmr/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select BOARD_ROMSIZE_KB_1024 Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/Kconfig ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr_fam10/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/supermicro/h8dmr_fam10/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -11,7 +11,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select AMDMCT Modified: trunk/src/mainboard/supermicro/h8qme_fam10/Kconfig ============================================================================== --- trunk/src/mainboard/supermicro/h8qme_fam10/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/supermicro/h8qme_fam10/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select AMDMCT Modified: trunk/src/mainboard/technexion/tim5690/Kconfig ============================================================================== --- trunk/src/mainboard/technexion/tim5690/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/technexion/tim5690/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -14,7 +14,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select HAVE_ACPI_TABLES Modified: trunk/src/mainboard/technexion/tim8690/Kconfig ============================================================================== --- trunk/src/mainboard/technexion/tim8690/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/technexion/tim8690/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -14,7 +14,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select WAIT_BEFORE_CPUS_INIT Modified: trunk/src/mainboard/thomson/ip1000/Kconfig ============================================================================== --- trunk/src/mainboard/thomson/ip1000/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/thomson/ip1000/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -14,7 +14,7 @@ select HAVE_MAINBOARD_RESOURCES select HAVE_SMI_HANDLER select GFXUMA - select USE_DCACHE_RAM + select CACHE_AS_RAM select TINY_BOOTBLOCK config MAINBOARD_DIR Modified: trunk/src/mainboard/traverse/geos/Kconfig ============================================================================== --- trunk/src/mainboard/traverse/geos/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/traverse/geos/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -9,7 +9,7 @@ select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_1024 config MAINBOARD_DIR Modified: trunk/src/mainboard/tyan/s2735/Kconfig ============================================================================== --- trunk/src/mainboard/tyan/s2735/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/tyan/s2735/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -14,7 +14,7 @@ select HAVE_MP_TABLE select UDELAY_TSC select HAVE_OPTION_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select USE_WATCHDOG_ON_BOOT select BOARD_ROMSIZE_KB_512 Modified: trunk/src/mainboard/tyan/s2912/Kconfig ============================================================================== --- trunk/src/mainboard/tyan/s2912/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/tyan/s2912/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select K8_REV_F_SUPPORT Modified: trunk/src/mainboard/tyan/s2912_fam10/Kconfig ============================================================================== --- trunk/src/mainboard/tyan/s2912_fam10/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/tyan/s2912_fam10/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -11,7 +11,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select LIFT_BSP_APIC_ID select BOARD_ROMSIZE_KB_1024 Modified: trunk/src/mainboard/tyan/s4880/Kconfig ============================================================================== --- trunk/src/mainboard/tyan/s4880/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/tyan/s4880/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 select SB_HT_CHAIN_UNITID_OFFSET_ONLY Modified: trunk/src/mainboard/tyan/s4882/Kconfig ============================================================================== --- trunk/src/mainboard/tyan/s4882/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/tyan/s4882/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -12,7 +12,7 @@ select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_512 select SB_HT_CHAIN_UNITID_OFFSET_ONLY Modified: trunk/src/mainboard/via/vt8454c/Kconfig ============================================================================== --- trunk/src/mainboard/via/vt8454c/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/via/vt8454c/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -14,7 +14,7 @@ select HAVE_HARD_RESET select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_512 - select USE_DCACHE_RAM + select CACHE_AS_RAM select TINY_BOOTBLOCK config MAINBOARD_DIR Modified: trunk/src/mainboard/winent/pl6064/Kconfig ============================================================================== --- trunk/src/mainboard/winent/pl6064/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/winent/pl6064/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -10,7 +10,7 @@ select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select BOARD_ROMSIZE_KB_512 config MAINBOARD_DIR Modified: trunk/src/mainboard/wyse/s50/Kconfig ============================================================================== --- trunk/src/mainboard/wyse/s50/Kconfig Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/mainboard/wyse/s50/Kconfig Mon Aug 30 19:53:13 2010 (r5756) @@ -25,7 +25,7 @@ select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5536 select UDELAY_TSC - select USE_DCACHE_RAM + select CACHE_AS_RAM select HAVE_PIRQ_TABLE select PIRQ_ROUTE select BOARD_ROMSIZE_KB_256 Modified: trunk/src/northbridge/intel/e7501/debug.c ============================================================================== --- trunk/src/northbridge/intel/e7501/debug.c Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/northbridge/intel/e7501/debug.c Mon Aug 30 19:53:13 2010 (r5756) @@ -39,7 +39,7 @@ for(i = 0; i < 256; i++) { unsigned char val; if ((i & 0x0f) == 0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\n%02x:",i); #else print_debug("\n"); @@ -48,7 +48,7 @@ #endif } val = pci_read_config8(dev, i); -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, " %02x", val); #else print_debug_char(' '); @@ -101,7 +101,7 @@ device = ctrl->channel0[i]; if (device) { int j; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device); #else print_debug("dimm: "); @@ -113,7 +113,7 @@ int status; unsigned char byte; if ((j & 0xf) == 0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\n%02x: ", j); #else print_debug("\n"); @@ -126,7 +126,7 @@ break; } byte = status & 0xff; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%02x ", byte); #else print_debug_hex8(byte); @@ -138,7 +138,7 @@ device = ctrl->channel1[i]; if (device) { int j; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device); #else print_debug("dimm: "); @@ -150,7 +150,7 @@ int status; unsigned char byte; if ((j & 0xf) == 0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\n%02x: ", j); #else print_debug("\n"); @@ -163,7 +163,7 @@ break; } byte = status & 0xff; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%02x ", byte); #else print_debug_hex8(byte); @@ -181,7 +181,7 @@ for(device = 1; device < 0x80; device++) { int j; if( smbus_read_byte(device, 0) < 0 ) continue; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "smbus: %02x", device); #else print_debug("smbus: "); @@ -195,7 +195,7 @@ break; } if ((j & 0xf) == 0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\n%02x: ",j); #else print_debug("\n"); @@ -204,7 +204,7 @@ #endif } byte = status & 0xff; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%02x ", byte); #else print_debug_hex8(byte); @@ -219,7 +219,7 @@ { int i; -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%04x:\n", port); #else print_debug_hex16(port); @@ -228,7 +228,7 @@ for(i=0;i<256;i++) { uint8_t val; if ((i & 0x0f) == 0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "%02x:", i); #else print_debug_hex8(i); @@ -236,7 +236,7 @@ #endif } val = inb(port); -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, " %02x",val); #else print_debug_char(' '); @@ -255,7 +255,7 @@ print_debug("dump_mem:"); for(i=start;i<end;i++) { if((i & 0xf)==0) { -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, "\n%08x:", i); #else print_debug("\n"); @@ -263,7 +263,7 @@ print_debug(":"); #endif } -#if CONFIG_USE_DCACHE_RAM +#if CONFIG_CACHE_AS_RAM printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i)); #else print_debug(" "); Modified: trunk/src/northbridge/intel/i3100/raminit.c ============================================================================== --- trunk/src/northbridge/intel/i3100/raminit.c Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/northbridge/intel/i3100/raminit.c Mon Aug 30 19:53:13 2010 (r5756) @@ -1212,7 +1212,7 @@ pci_write_config16(ctrl->f0, MCHSCRB, data16); /* The memory is now setup, use it */ -#if CONFIG_USE_DCACHE_RAM == 0 +#if CONFIG_CACHE_AS_RAM == 0 cache_lbmem(MTRR_TYPE_WRBACK); #endif } Modified: trunk/src/pc80/Makefile.inc ============================================================================== --- trunk/src/pc80/Makefile.inc Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/pc80/Makefile.inc Mon Aug 30 19:53:13 2010 (r5756) @@ -4,7 +4,7 @@ obj-$(CONFIG_UDELAY_IO) += udelay_io.o obj-y += keyboard.o initobj-$(CONFIG_USE_OPTION_TABLE) += mc146818rtc_early.o -initobj-$(CONFIG_USE_DCACHE_RAM) += serial.o +initobj-$(CONFIG_CACHE_AS_RAM) += serial.o subdirs-y += vga $(obj)/pc80/mc146818rtc.o : $(OPTION_TABLE_H) Modified: trunk/src/pc80/serial.c ============================================================================== --- trunk/src/pc80/serial.c Mon Aug 30 18:52:48 2010 (r5755) +++ trunk/src/pc80/serial.c Mon Aug 30 19:53:13 2010 (r5756) @@ -28,7 +28,7 @@ #define UART_LCS CONFIG_TTYS0_LCS -#if CONFIG_USE_DCACHE_RAM == 0 +#if CONFIG_CACHE_AS_RAM == 0 /* Data */ #define UART_RBR 0x00 @@ -97,7 +97,7 @@ } #else -/* CONFIG_USE_DCACHE_RAM == 1 */ +/* CONFIG_CACHE_AS_RAM == 1 */ extern void uart8250_init(unsigned base_port, unsigned divisor, unsigned lcs); void uart_init(void)

1 0

build service results for r5753
by repository service 30 Aug '10

30 Aug '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5753 to the coreboot repository. This caused the following changes: Change Log: This file was missing from r5751. Signed-off-by: Andreas Schultz <aschultz(a)tpip.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of digitallogic:adl855pc is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5753&device=adl855pc&vendo… Compilation of intel:mtarvon is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5753&device=mtarvon&vendor… Compilation of lanner:em8510 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5753&device=em8510&vendor=… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

build service results for r5752
by repository service 30 Aug '10

30 Aug '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5752 to the coreboot repository. This caused the following changes: Change Log: Support for Lanner EM-8510 Board Signed-off-by: Andreas Schultz <aschultz(a)tpip.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> --- src/mainboard/Kconfig | 8 ++ src/mainboard/lanner/Kconfig | 8 ++ src/mainboard/lanner/em8510/Kconfig | 38 +++++++++++ src/mainboard/lanner/em8510/Makefile.inc | 21 ++++++ src/mainboard/lanner/em8510/chip.h | 23 +++++++ src/mainboard/lanner/em8510/cmos.layout | 74 +++++++++++++++++++++ src/mainboard/lanner/em8510/devicetree.cb | 60 +++++++++++++++++ src/mainboard/lanner/em8510/irq_tables.c | 56 ++++++++++++++++ src/mainboard/lanner/em8510/mainboard.c | 27 ++++++++ src/mainboard/lanner/em8510/romstage.c | 103 +++++++++++++++++++++++++++++ 10 files changed, 418 insertions(+), 0 deletions(-) create mode 100644 src/mainboard/lanner/Kconfig create mode 100644 src/mainboard/lanner/em8510/Kconfig create mode 100644 src/mainboard/lanner/em8510/Makefile.inc create mode 100644 src/mainboard/lanner/em8510/chip.h create mode 100644 src/mainboard/lanner/em8510/cmos.layout create mode 100644 src/mainboard/lanner/em8510/devicetree.cb create mode 100644 src/mainboard/lanner/em8510/irq_tables.c create mode 100644 src/mainboard/lanner/em8510/mainboard.c create mode 100644 src/mainboard/lanner/em8510/romstage.c Build Log: Compilation of digitallogic:adl855pc is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5752&device=adl855pc&vendo… Compilation of intel:mtarvon is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5752&device=mtarvon&vendor… Compilation of lanner:em8510 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5752&device=em8510&vendor=… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

[PATCH] CACHE_AS_RAM
by Stefan Reinauer 30 Aug '10

30 Aug '10

See patch

3 2

build service results for r5751
by repository service 30 Aug '10

30 Aug '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5751 to the coreboot repository. This caused the following changes: Change Log: Rework i855GM/i855GME support Signed-off-by: Andreas Schultz <aschultz(a)tpip.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> --- src/northbridge/intel/i855/Kconfig | 30 + src/northbridge/intel/i855/i855.h | 76 +++ src/northbridge/intel/i855/northbridge.c | 21 + src/northbridge/intel/i855/raminit.c | 1036 +++++++++++++++++++++++++----- src/northbridge/intel/i855/raminit.h | 14 +- 5 files changed, 1002 insertions(+), 175 deletions(-) create mode 100644 src/northbridge/intel/i855/i855.h Build Log: Compilation of digitallogic:adl855pc has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5751&device=adl855pc&vendo… Compilation of intel:mtarvon is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5751&device=mtarvon&vendor… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

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coreboot August 2010